On Fri, Jan 07, 2011 at 12:06:28AM -0500, Keith Hui wrote:
Rows 50, 60 and C0 are the ones that for now really matters. If you think sending through the whole dump (actually -xxx will do) will be easier, I am fine with that too. For my testing, the RAM need not be 256MB, they just needs to be double-sided. And yes, only the dump from 0:0.0 will be needed.
For this board, the DFI P2XBL (sorry, I keep calling it a p2bx instead!), I already have the original Manuf BIOS posted to my web page, md5sumed and has been sitting on their for years. Both, compressed & uncompressed.
(If you're concerned about getting an altered BIOS, can quickly toss in the file name into Google and likely find the original Chinese(?) manufacturer website?)
http://rogerx.freeshell.org/files/linuxbios/440BX.P2XBL/
(FYI: Going up one level will display the other Tyan 1832DL 440BX motherboard original manufactured BIOS as well.)
I also have the log file from a lspci -xxx dump using 3 rows of double sided 256MB RAM. Beware, it's PC133 and not PC100 or PC66. But from what I understand, the bus just throttles to what the RAM is able to do on the bus, in this case, PC100 is the max bus speed. Correct me if I'm wrong though. I will likely have PC100 256MB ram on order, whether it's double sided is likely not known.
The Tyan S1832, however, has 4 slots (so if you're porting to it as well, you must select SDRAMPWR_4DIMM), and I already have that programming done. You'll just want to make sure the board (and RAM) can run properly under coreboot, but I don't need to see any dumps from it for now.
I'll check into this sometime soon.
-
Roger