[LinuxBIOS] r2626 - in trunk/LinuxBIOSv2/src: mainboard/tyan/s1846 northbridge/intel/i440bx

Author: uwe
Date: 2007-05-04 02:51:17 +0200 (Fri, 04 May 2007)
New Revision: 2626

Modified:
   trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c
   trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c
Log:
Cosmetics (trivial).

Signed-off-by: Uwe Hermann 
Acked-by: Uwe Hermann

Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c	2007-05-03 21:36:51 UTC (rev 2625)
+++ trunk/LinuxBIOSv2/src/mainboard/tyan/s1846/auto.c	2007-05-04 00:51:17 UTC (rev 2626)
@@ -101,10 +101,10 @@
     * Do _not_ check the area from 640 KB - 1 MB, as that's not really
     * RAM, but rather reserved for various other things:
     *
-	 *  - 640 KB ­ 768 KB: Video Buffer Area
-	 *  - 768 KB ­ 896 KB: Expansion Area
-	 *  - 896 KB ­ 960 KB: Extended System BIOS Area
-	 *  - 960 KB ­ 1 MB:   Memory (BIOS Area) - System BIOS Area
+	 *  - 640 KB - 768 KB: Video Buffer Area
+	 *  - 768 KB - 896 KB: Expansion Area
+	 *  - 896 KB - 960 KB: Extended System BIOS Area
+	 *  - 960 KB - 1 MB:   Memory (BIOS Area) - System BIOS Area
     *
     * Trying to check these areas will fail.
     */

Modified: trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c
===================================================================
--- trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c	2007-05-03 21:36:51 UTC (rev 2625)
+++ trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/raminit.c	2007-05-04 00:51:17 UTC (rev 2626)
@@ -242,7 +242,7 @@
    RPS, 0x0000, 0x0000,

/* SDRAMC - SDRAM Control Register
-	 * 0x76-0x77
+	 * 0x76 - 0x77
     *
     * [15:10] Reserved
     * [09:08] Idle/Pipeline DRAM Leadoff Timing (IPDLT)
@@ -519,8 +519,6 @@
    /* 4. Mode register set. Wait two memory cycles. */
    PRINT_DEBUG("RAM Enable 4: Mode register set\r\n");
    do_ram_command(ctrl, RAM_COMMAND_MRS, 0x1d0);
-	// TODO: Is 0x1d0 correct?
-	// do_ram_command(ctrl, RAM_COMMAND_MRS, 0x1d0000);
    mdelay(10);
    mdelay(10);