Motherboards DFI NF-570 range, (NF570SLI-M2/G, NF570-M2/G and NF550-M2/G).
This is a suggestion to port coreboot to the NF570 series. I have already posted a patch, but this just duplicates the entire M57SLI stuff just for a two line change. If the build script could set a flag, shown in the example as dfi_nf570, then coreboot would work on the above motherboards.
After discussion on IRC this would be a better implementation
From mptable.c
PCI_INT(0,sbdn+6,1, 23); /* HD Audio */ PCI_INT(0,sbdn+5,0, 20); /* SATA */ PCI_INT(0,sbdn+5,2, 22); /* SATA */ PCI_INT(0,sbdn+5,1, 23); /* SATA */
#ifdef dfi_nf570
PCI_INT(0,sbdn+5,2, 22); /* SATA */
PCI_INT(0,sbdn+8,0, 21); /* GBit Ether */
#else
PCI_INT(0,sbdn+5,2, 21); /* SATA */
PCI_INT(0,sbdn+8,0, 22); /* GBit Ether */
#endif
/* The PCIe slots, each on its own bus */
Taken and modified from the Gigabyte M57SLI tree signed-of-by: Chris Lingard chris@stockwith.co.uk Tested on a DSI NF570-M2/G motherboard
The use of this motherboard eases the learning path into coreboot, because it has a socketed BIOS, and needs no modification. I had never hot plugged a chip nor flashed a BIOS until this week
Chris Lingard
On Wed, Oct 29, 2008 at 2:30 PM, Chris Lingard chris@stockwith.co.uk wrote:
Motherboards DFI NF-570 range, (NF570SLI-M2/G, NF570-M2/G and NF550-M2/G).
This is a suggestion to port coreboot to the NF570 series. I have already
posted a patch, but this just duplicates the entire M57SLI stuff just for a two line change. If the build script could set a flag, shown in the example as dfi_nf570, then coreboot would work on the above motherboards.
After discussion on IRC this would be a better implementation
From mptable.c
PCI_INT(0,sbdn+6,1, 23); /* HD Audio */ PCI_INT(0,sbdn+5,0, 20); /* SATA */ PCI_INT(0,sbdn+5,2, 22); /* SATA */ PCI_INT(0,sbdn+5,1, 23); /* SATA */
#ifdef dfi_nf570
PCI_INT(0,sbdn+5,2, 22); /* SATA */ PCI_INT(0,sbdn+8,0, 21); /* GBit Ether */
#else
PCI_INT(0,sbdn+5,2, 21); /* SATA */ PCI_INT(0,sbdn+8,0, 22); /* GBit Ether */
#endif
/* The PCIe slots, each on its own bus */
Taken and modified from the Gigabyte M57SLI tree signed-of-by: Chris Lingard chris@stockwith.co.uk Tested on a DSI NF570-M2/G motherboard
The use of this motherboard eases the learning path into coreboot, because
it has a socketed BIOS, and needs no modification. I had never hot plugged a chip nor flashed a BIOS until this week
I don't like this for one simple reason, I don't like the idea of trying to explain to users that they have to compile target x with config variable y set to make it work on board z, because once we start down that road it's going to get messy quick.
If we really want to avoid duplicated code, my proposal would be a mainboard Config.lb like the following. I'm stuck in windows atm, so no way to test if it actually would build correctly, but I think it should. There are reasons we've avoided doing stuff like this in the past though, mainly because of the possibility of a change to one target breaking multiple other targets using the same code, and I'm much more comfortable with a bit of duplicated code.
-Corey
1## 2## This file is part of the coreboot project. 3## 4## Copyright (C) 2007 AMD 5## Written by Yinghai Lu yinghailu@amd.com for AMD. 6##
<snip>
72## 73## Build the objects we have code for in this directory. 74## 75
# These files duplicated, reflect different mainboard name and irq tables
76driver mainboard.o 77#needed by irq_tables and mptable and acpi_tables 78object get_bus_conf.o 79 80if HAVE_MP_TABLE object mptable.o end 81if HAVE_PIRQ_TABLE object irq_tables.o end 82#object reset.o 83if USE_DCACHE_RAM 84 85 if CONFIG_USE_INIT
# These don't have to be
86 makerule ../../gigabyte/m57sli/cache_as_ram_auto.o 87 depends "../../gigabyte/m57sli/cache_as_ram_auto.c option_table.h" 88 action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) ../../gigabyte/m57sli/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@" 89 end 90 else 91 makerule ../../gigabyte/m57slicache_as_ram_auto.inc 92 depends "../../gigabyte/m57sli/cache_as_ram_auto.c option_table.h" 93 action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) ../../gigabyte/m57sli/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@" 94 action "perl -e 's/.rodata/.rom.data/g' -pi $@" 95 action "perl -e 's/.text/.section .rom.text/g' -pi $@" 96 end 97 end 98 99end