OK, I am hoping this is the kind of thing that will work for the K8.
First, in cpu/k8, define a file, chip.h:
struct cpu_k8_config { struct chip *north, *south, *east, *west; };
Thenin cpu/k8/Config.lb, add this line: config chip.h
Note this file could be called anything, but chip.h is a habit for me.
In the mainboard config (mainboard/arima/hdama/Config.lb), you set things up as follows:
southbridge amd/amd8111 "amd8111" end southbridge amd/amd8131 "amd8131" end
# pull in all includes, etc. for the k8. # should we have a 'noise keyword' for this, e.g. 'cputype k8'?
dir /cpu/k8
# define the CPUs, their names, and their connections. cpu k8 "cpu0" register "north" = "amd8111" register "east" = "cpu1" end
cpu k8 "cpu1" register "north" = "amd8131" register "west" = "cpu0" end
This will result in initialized structures, per-cpu, that "do the right thing".
I've hit a bug I have to ask Greg about, but this is a rough idea. Comments?
ron
* ron minnich rminnich@lanl.gov [030731 00:44]:
OK, I am hoping this is the kind of thing that will work for the K8.
First, in cpu/k8, define a file, chip.h:
struct cpu_k8_config { struct chip *north, *south, *east, *west; };
I don't think we need both of east and west really. The Bios Developers Guide calls these links "UP", "DOWN" and "ACROSS", for LDT0-2. It might still be interesting to have a topological view on the hardware, but at least for hypertransport setup, east and west is equal.
In the mainboard config (mainboard/arima/hdama/Config.lb), you set things up as follows:
southbridge amd/amd8111 "amd8111"
register "north" = "cpu0" register "ht_width" = "8" # 8bit, even if device reports more register "ht_speed" = "200" # don't drive faster than 200MHz, # in case device reports false # maximum speed
end southbridge amd/amd8131 "amd8131"
register "north" = "cpu1" (for example) register "ht_width" = "8" register "ht_speed" = "200"
end
# pull in all includes, etc. for the k8. # should we have a 'noise keyword' for this, e.g. 'cputype k8'?
noise keyword?
dir /cpu/k8
^^^^^^^^^^^
can this not implicitly be generated from the below description?
# define the CPUs, their names, and their connections. cpu k8 "cpu0" register "north" = "amd8111"
^^^^^ south (iirc)
register "east" = "cpu1" end
cpu k8 "cpu1" register "north" = "amd8131"
^^^^^ south
register "west" = "cpu0" end
Stefan
On Thu, 31 Jul 2003, Stefan Reinauer wrote:
First, in cpu/k8, define a file, chip.h:
struct cpu_k8_config { struct chip *north, *south, *east, *west; };
I don't think we need both of east and west really. The Bios Developers Guide calls these links "UP", "DOWN" and "ACROSS", for LDT0-2. It might still be interesting to have a topological view on the hardware, but at least for hypertransport setup, east and west is equal.
OK. I also occured to me last night that we need this:
struct ht_link { struct chip *chip; unsigned int ht_width, ht_speed; };
then:
southbridge amd/amd8111 "amd8111" register "north" = "{.chip = &cpu0, .ht_width = 8, .ht_speed=200" end
and so on. Make sense? Or not? I don't have the data book so don't know if the 8111 has more than one link.
For the CPUs we then have
struct cpu_k8_config { struct ht_link up, down, across; };
dir /cpu/k8
^^^^^^^^^^^
can this not implicitly be generated from the below description?
yes, and it should be, I had the same thought.
# define the CPUs, their names, and their connections.
cpu k8 "cpu0"
register "down" = "{.chip = &amd8111, .ht_width=8, .ht_speed=200}" . . end
better?
ron
p.s. the chip-specific structure for the PCI bridge will, of course, have a pointer to the top of the PCI tree, and that becomes our link from the static to the dynamic devices.