This is with svn checkout of version 6561 - I have tried with Seabios stable & Seabios master but get the same error. Building under Ubuntu 11.04 64 bit
Makefile:225: warning: overriding commands for target `build/cpu/x86/name/name.ramstage.o' Makefile:225: warning: ignoring old commands for target `build/cpu/x86/name/name.ramstage.o' GEN bootblock/ldscript.ld LINK bootblock.elf OBJCOPY coreboot.bootblock CC lib/memset.romstage.o CC lib/memcpy.romstage.o CC lib/memcmp.romstage.o CC lib/cbfs.romstage.o CC lib/lzma.romstage.o CC lib/ramtest.romstage.o CC lib/cbmem.romstage.o CC lib/uart8250.romstage.o CC console/vtxprintf.romstage.o GEN build.h CC console/console.romstage.o CC console/post.romstage.o CC console/die.romstage.o CC romstage.inc POST romstage.inc GEN romstage/crt0.S CC mainboard/lenovo/t60/crt0.s CC mainboard/lenovo/t60/crt0.romstage.o CC mainboard/lenovo/t60/dock.romstage.o CC arch/x86/lib/romstage_console.romstage.o CC arch/x86/lib/cbfs_and_run.romstage.o CC southbridge/intel/i82801gx/early_smbus.romstage.o CC northbridge/intel/i945/udelay.romstage.o CC northbridge/intel/i945/raminit.romstage.o CC northbridge/intel/i945/early_init.romstage.o CC northbridge/intel/i945/errata.romstage.o CC northbridge/intel/i945/debug.romstage.o GEN romstage/ldscript.ld LINK coreboot.romstage CBFS coreboot.pre CC arch/x86/lib/c_start.ramstage.o CC console/uart8250_console.driver.o CC ec/lenovo/h8/h8.driver.o CC ec/lenovo/pmh7/pmh7.driver.o CC southbridge/intel/i82801gx/i82801gx.driver.o CC southbridge/intel/i82801gx/ac97.driver.o CC southbridge/intel/i82801gx/azalia.driver.o CC southbridge/intel/i82801gx/ide.driver.o CC southbridge/intel/i82801gx/lpc.driver.o CC southbridge/intel/i82801gx/nic.driver.o CC southbridge/intel/i82801gx/pci.driver.o CC southbridge/intel/i82801gx/pcie.driver.o CC southbridge/intel/i82801gx/sata.driver.o CC southbridge/intel/i82801gx/smbus.driver.o CC southbridge/intel/i82801gx/usb.driver.o CC southbridge/intel/i82801gx/usb_ehci.driver.o CC southbridge/ti/pci1x2x/pci1x2x.driver.o CC northbridge/intel/i945/northbridge.driver.o CC northbridge/intel/i945/gma.driver.o CC cpu/intel/model_69x/model_69x_init.driver.o CC cpu/intel/model_6dx/model_6dx_init.driver.o CC cpu/intel/model_6ex/model_6ex_init.driver.o CC cpu/intel/model_6fx/model_6fx_init.driver.o CC mainboard/lenovo/t60/static.ramstage.o CC lib/memset.ramstage.o CC lib/memcpy.ramstage.o CC lib/memcmp.ramstage.o CC lib/memmove.ramstage.o CC lib/malloc.ramstage.o CC lib/delay.ramstage.o CC lib/fallback_boot.ramstage.o CC lib/compute_ip_checksum.ramstage.o CC lib/version.ramstage.o CC lib/cbfs.ramstage.o CC lib/lzma.ramstage.o CC lib/gcc.ramstage.o CC lib/clog2.ramstage.o CC lib/cbmem.ramstage.o CC lib/uart8250.ramstage.o CC boot/hardwaremain.ramstage.o CC boot/selfboot.ramstage.o CC console/printk.ramstage.o CC console/console.ramstage.o CC console/vtxprintf.ramstage.o CC console/vsprintf.ramstage.o CC console/post.ramstage.o CC console/die.ramstage.o CC devices/device.ramstage.o CC devices/root_device.ramstage.o CC devices/device_util.ramstage.o CC devices/pci_device.ramstage.o CC devices/pcix_device.ramstage.o CC devices/pciexp_device.ramstage.o CC devices/agp_device.ramstage.o CC devices/cardbus_device.ramstage.o CC devices/pnp_device.ramstage.o CC devices/pci_ops.ramstage.o CC devices/smbus_ops.ramstage.o CC devices/pci_rom.ramstage.o CC mainboard/lenovo/t60/mainboard.ramstage.o CC mainboard/lenovo/t60/mptable.ramstage.o CC mainboard/lenovo/t60/irq_tables.ramstage.o CC mainboard/lenovo/t60/acpi_tables.ramstage.o IASL build/mainboard/lenovo/t60/dsdt.ramstage.o
Intel ACPI Component Architecture ASL Optimizing Compiler version 20100528 [Oct 15 2010] Copyright (c) 2000 - 2010 Intel Corporation Supports ACPI Specification Revision 4.0a
ASL Input: build/mainboard/lenovo/t60/dsdt.ramstage.asl - 2334 lines, 42093 bytes, 1027 keywords AML Output: build/mainboard/lenovo/t60/dsdt.aml - 11765 bytes, 471 named objects, 556 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 386 Optimizations CC mainboard/lenovo/t60/fadt.ramstage.o CC pc80/mc146818rtc.ramstage.o CC pc80/isa-dma.ramstage.o CC pc80/i8259.ramstage.o CC pc80/keyboard.ramstage.o CC devices/oprom/x86.ramstage.o CC devices/oprom/x86_asm.ramstage.o CC devices/oprom/x86_interrupts.ramstage.o CC ec/acpi/ec.ramstage.o CC arch/x86/boot/boot.ramstage.o CC arch/x86/boot/coreboot_table.ramstage.o CC arch/x86/boot/multiboot.ramstage.o CC arch/x86/boot/gdt.ramstage.o CC arch/x86/boot/tables.ramstage.o CC arch/x86/boot/mpspec.ramstage.o CC arch/x86/boot/pirq_routing.ramstage.o CC arch/x86/boot/acpi.ramstage.o CC arch/x86/boot/acpigen.ramstage.o CC arch/x86/boot/wakeup.ramstage.o CC arch/x86/lib/cpu.ramstage.o CC arch/x86/lib/pci_ops_conf1.ramstage.o CC arch/x86/lib/pci_ops_conf2.ramstage.o CC arch/x86/lib/pci_ops_mmconf.ramstage.o CC arch/x86/lib/pci_ops_auto.ramstage.o CC arch/x86/lib/exception.ramstage.o CC arch/x86/lib/ioapic.ramstage.o CC pc80/vga/vga_io.ramstage.o CC southbridge/intel/i82801gx/reset.ramstage.o CC southbridge/intel/i82801gx/watchdog.ramstage.o CC southbridge/intel/i82801gx/smi.ramstage.o CC northbridge/intel/i945/acpi.ramstage.o CC superio/nsc/pc87382/superio.ramstage.o CC superio/nsc/pc87384/superio.ramstage.o CC cpu/intel/socket_mFCPGA478/socket_mFCPGA478.ramstage.o CC cpu/x86/mtrr/mtrr.ramstage.o CC cpu/x86/lapic/lapic.ramstage.o CC cpu/x86/lapic/lapic_cpu_init.ramstage.o CC cpu/x86/lapic/secondary.ramstage.o CC cpu/x86/lapic/apic_timer.ramstage.o CC cpu/x86/cache/cache.ramstage.o CC lib/memcpy.smm.o CC lib/uart8250.smm.o CC console/printk.smm.o CC console/vtxprintf.smm.o CC mainboard/lenovo/t60/mainboard_smi.smm.o CC mainboard/lenovo/t60/dock.smm.o CC ec/acpi/ec.smm.o CC southbridge/intel/i82801gx/smihandler.smm.o CC northbridge/intel/i945/udelay.smm.o CC cpu/x86/smm/smmhandler.smm.o CC cpu/x86/smm/smihandler.smm.o CC cpu/x86/smm/smiutil.smm.o OBJCOPY cpu/x86/smm/smm_wrap.ramstage.o CC cpu/x86/smm/smmrelocate.ramstage.o CC cpu/intel/microcode/microcode.ramstage.o CC cpu/intel/hyperthreading/intel_sibling.ramstage.o CC cpu/intel/speedstep/acpi.ramstage.o CC cpu/x86/name/name.ramstage.o AR coreboot.a CC coreboot_ram.o CC coreboot_ram GIT SeaBIOS origin/master Switched to branch 'master' Deleted branch coreboot (was 1efb10b). Branch coreboot set up to track remote branch master from origin. Switched to a new branch 'coreboot' CONFIG SeaBIOS origin/master Build default config # # configuration written to /home/josh/bios/coreboot/payloads/external/SeaBIOS/seabios/.config # MAKE SeaBIOS origin/master Build Kconfig config file /home/josh/bios/coreboot/payloads/external/SeaBIOS/seabios/.config:77:warning: override: reassigning to symbol COREBOOT /home/josh/bios/coreboot/payloads/external/SeaBIOS/seabios/.config:78:warning: override: reassigning to symbol DEBUG_SERIAL # # configuration written to /home/josh/bios/coreboot/payloads/external/SeaBIOS/seabios/.config # Compiling whole program out/ccode.16.s Compiling to assembler out/asm-offsets.s Generating offset file out/asm-offsets.h Compiling (16bit) out/code16.o Compiling whole program out/ccode32flat.o Compiling whole program out/code32seg.o Building ld scripts (version "pre-0.6.3-20110509_113214-josh-laptop") Fixed space: 0xe05b-0x10000 total: 8101 slack: 3 Percent slack: 0.0% 16bit size: 39456 32bit segmented size: 2412 32bit flat size: 13972 32bit flat init size: 39392 Linking out/rom16.o out/romlayout16.lds:705 cannot move location counter backwards (from 000000000000ca88 to 000000000000ca6c) make[2]: *** [out/rom16.o] Error 1 make[1]: *** [seabios] Error 2 make: *** [seabios] Error 2
Josh Stump wrote:
This is with svn checkout of version 6561 - I have tried with Seabios stable & Seabios master but get the same error. Building under Ubuntu 11.04 64 bit
..
Linking out/rom16.o out/romlayout16.lds:705 cannot move location counter backwards (from 000000000000ca88 to 000000000000ca6c)
The toolchain in Ubuntu 11.04 isn't capable of building coreboot then. :\
Please build the reference toolchain:
cd util/crossgcc ./buildgcc i386-elf cd ../.. rm -f .xcompile make
//Peter
Thank you kindly. I have now compiled the BIOS. Next challenge is how to get flashrom to flash it. The wiki shows flashrom support. I have downloaded the latest svn version and flashrom does not detect my system. flashrom -L does not list Lenovo T60, any suggestions or shall I get on the flashrom mailing list to ask? Thank you again.
On Mon, May 9, 2011 at 12:22 PM, Peter Stuge peter@stuge.se wrote:
Josh Stump wrote:
This is with svn checkout of version 6561 - I have tried with Seabios
stable
& Seabios master but get the same error. Building under Ubuntu 11.04 64
bit ..
Linking out/rom16.o out/romlayout16.lds:705 cannot move location counter backwards (from 000000000000ca88 to 000000000000ca6c)
The toolchain in Ubuntu 11.04 isn't capable of building coreboot then. :\
Please build the reference toolchain:
cd util/crossgcc ./buildgcc i386-elf cd ../.. rm -f .xcompile make
//Peter
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Josh Stump josh+coreboot@pcinw.net writes:
Thank you kindly. I have now compiled the BIOS. Next challenge is how to get flashrom to flash it. The wiki shows flashrom support. I have downloaded the latest svn version and flashrom does not detect my system. flashrom -L does not list Lenovo T60, any suggestions or shall I get on the flashrom mailing list to ask? Thank you again.
The Vendor BIOS prevents flashing with flashrom. (In fact it doesn't allow the SPI opcodes necessary to detect, erase and write the Flash). So you have to flash it either with an external programmer, or reverse engineer how the Phoenix BIOS protection can be circumvented.
Sven.
Sven Schnelle wrote:
Josh Stump josh+coreboot@pcinw.net writes:
Thank you kindly. I have now compiled the BIOS. Next challenge is how to get flashrom to flash it. The wiki shows flashrom support.
Which wiki and page please?
The Vendor BIOS prevents flashing with flashrom. (In fact it doesn't allow the SPI opcodes necessary to detect, erase and write the Flash). So you have to flash it either with an external programmer, or reverse engineer how the Phoenix BIOS protection can be circumvented.
Yes. The wiki is wrong I'm afraid, the ThinkPads aren't currently supported by flashrom. (Now that's ironic! coreboot support before flashrom! :)
//Peter
http://www.coreboot.org/Supported_Motherboards http://www.coreboot.org/Supported_MotherboardsAnd I am slightly incorrect I must admit. It is the Lenovo T60P that is listed on that page. Do you have a good site with information on an external programmer or are they costly? Any chances of being able to use a Windows based utility to flash, I tried with Pheonix WinPhlash but it gave an error....
On Tue, May 10, 2011 at 12:02 AM, Peter Stuge peter@stuge.se wrote:
Sven Schnelle wrote:
Josh Stump josh+coreboot@pcinw.net writes:
Thank you kindly. I have now compiled the BIOS. Next challenge is how to get flashrom to flash it. The wiki shows flashrom support.
Which wiki and page please?
The Vendor BIOS prevents flashing with flashrom. (In fact it doesn't allow the SPI opcodes necessary to detect, erase and write the Flash). So you have to flash it either with an external programmer, or reverse engineer how the Phoenix BIOS protection can be circumvented.
Yes. The wiki is wrong I'm afraid, the ThinkPads aren't currently supported by flashrom. (Now that's ironic! coreboot support before flashrom! :)
//Peter
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Josh Stump wrote:
Ah, ok. This wiki page is correct. coreboot is separate from flashrom, so being supported by one doesn't automatically mean being supported by the other. Laptops are difficult for both projects.
And I am slightly incorrect I must admit. It is the Lenovo T60P that is listed on that page.
T60 T60p are similar enough.
Do you have a good site with information on an external programmer or are they costly? Any chances of being able to use a Windows based utility to flash, I tried with Pheonix WinPhlash but it gave an error....
I think it gets upset because you want to flash coreboot. :)
Here are some instructions for a hardware that will work with flashrom today: http://flashrom.org/FT2232SPI_Programmer But you need to build a little yourself. Only very little.
I have an alternative approach in mind with a microcontroller board but some firmware still needs to be written. :)
//Peter
Josh Stump wrote:
] Any chances of being able to use a Windows based utility to flash, ] I tried with Pheonix WinPhlash but it gave an error....
The advanced mode of WinPhlash might help. You could uncheck "Verify BIOS part number" and "Verify BIOS checksum". The help file shows how to enable advanced mode by adding Advanced=1 to the [UI] section of phlash.ini. If that doesn't work, you could try the 16-bit version (phlash16.exe).
Even if this lets you flash coreboot using software, you still need a way to recover in case you end up in a non-booting state.
Thanks, Scott
http://www.coreboot.org/Supported_Motherboards http://www.coreboot.org/Supported_MotherboardsAnd I am slightly incorrect I must admit. It is the Lenovo T60P that is listed on that page. Do you have a good site with information on an external programmer or are they costly? Any chances of being able to use a Windows based utility to flash, I tried with Pheonix WinPhlash but it gave an error....
On Tue, May 10, 2011 at 12:02 AM, Peter Stuge peter@stuge.se wrote:
Sven Schnelle wrote:
Josh Stump josh+coreboot@pcinw.net writes:
Thank you kindly. I have now compiled the BIOS. Next challenge is how to get flashrom to flash it. The wiki shows flashrom support.
Which wiki and page please?
The Vendor BIOS prevents flashing with flashrom. (In fact it doesn't allow the SPI opcodes necessary to detect, erase and write the Flash). So you have to flash it either with an external programmer, or reverse engineer how the Phoenix BIOS protection can be circumvented.
Yes. The wiki is wrong I'm afraid, the ThinkPads aren't currently supported by flashrom. (Now that's ironic! coreboot support before flashrom! :)
//Peter
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
http://www.coreboot.org/Supported_Motherboards http://www.coreboot.org/Supported_MotherboardsAnd I am slightly incorrect I must admit. It is the Lenovo T60P that is listed on that page. Do you have a good site with information on an external programmer or are they costly? Any chances of being able to use a Windows based utility to flash, I tried with Pheonix WinPhlash but it gave an error....
On Tue, May 10, 2011 at 12:02 AM, Peter Stuge peter@stuge.se wrote:
Sven Schnelle wrote:
Josh Stump josh+coreboot@pcinw.net writes:
Thank you kindly. I have now compiled the BIOS. Next challenge is how to get flashrom to flash it. The wiki shows flashrom support.
Which wiki and page please?
The Vendor BIOS prevents flashing with flashrom. (In fact it doesn't allow the SPI opcodes necessary to detect, erase and write the Flash). So you have to flash it either with an external programmer, or reverse engineer how the Phoenix BIOS protection can be circumvented.
Yes. The wiki is wrong I'm afraid, the ThinkPads aren't currently supported by flashrom. (Now that's ironic! coreboot support before flashrom! :)
//Peter
-- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot