Author: stepan Date: Wed Mar 17 04:14:54 2010 New Revision: 5242 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5242
Log: more warning fixes.
Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Modified: trunk/src/cpu/intel/socket_PGA370/Kconfig trunk/src/include/reset.h trunk/src/mainboard/digitallogic/adl855pc/Kconfig trunk/src/mainboard/rca/rm4100/Kconfig trunk/src/mainboard/thomson/ip1000/Kconfig trunk/src/mainboard/thomson/ip1000/mainboard_smi.c trunk/src/northbridge/intel/i82830/vga.c trunk/src/southbridge/intel/i82801dx/i82801dx.h trunk/src/southbridge/intel/i82801dx/i82801dx_reset.c trunk/src/southbridge/intel/i82801dx/i82801dx_smi.c trunk/src/superio/smsc/smscsuperio/superio.c
Modified: trunk/src/cpu/intel/socket_PGA370/Kconfig ============================================================================== --- trunk/src/cpu/intel/socket_PGA370/Kconfig Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/cpu/intel/socket_PGA370/Kconfig Wed Mar 17 04:14:54 2010 (r5242) @@ -22,3 +22,10 @@ bool select MMX select UDELAY_TSC + +# Not all CPUs for Socket 370 can do SSE2 +config SSE2 + bool + default n + depends on CPU_INTEL_SOCKET_PGA370 +
Modified: trunk/src/include/reset.h ============================================================================== --- trunk/src/include/reset.h Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/include/reset.h Wed Mar 17 04:14:54 2010 (r5242) @@ -1,6 +1,9 @@ #ifndef RESET_H #define RESET_H
+#if !defined( __ROMCC__ ) +/* ROMCC can't do function prototypes... */ + #if CONFIG_HAVE_HARD_RESET == 1 void hard_reset(void); #else @@ -9,3 +12,4 @@ void soft_reset(void);
#endif +#endif
Modified: trunk/src/mainboard/digitallogic/adl855pc/Kconfig ============================================================================== --- trunk/src/mainboard/digitallogic/adl855pc/Kconfig Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/mainboard/digitallogic/adl855pc/Kconfig Wed Mar 17 04:14:54 2010 (r5242) @@ -7,6 +7,7 @@ select SUPERIO_WINBOND_W83627HF select ROMCC select HAVE_PIRQ_TABLE + select HAVE_HARD_RESET select BOARD_ROMSIZE_KB_1024
config MAINBOARD_DIR
Modified: trunk/src/mainboard/rca/rm4100/Kconfig ============================================================================== --- trunk/src/mainboard/rca/rm4100/Kconfig Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/mainboard/rca/rm4100/Kconfig Wed Mar 17 04:14:54 2010 (r5242) @@ -9,6 +9,7 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_HARD_RESET select HAVE_SMI_HANDLER
config MAINBOARD_DIR
Modified: trunk/src/mainboard/thomson/ip1000/Kconfig ============================================================================== --- trunk/src/mainboard/thomson/ip1000/Kconfig Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/mainboard/thomson/ip1000/Kconfig Wed Mar 17 04:14:54 2010 (r5242) @@ -9,6 +9,7 @@ select HAVE_PIRQ_TABLE select UDELAY_TSC select BOARD_ROMSIZE_KB_512 + select HAVE_HARD_RESET select HAVE_SMI_HANDLER
config MAINBOARD_DIR
Modified: trunk/src/mainboard/thomson/ip1000/mainboard_smi.c ============================================================================== --- trunk/src/mainboard/thomson/ip1000/mainboard_smi.c Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/mainboard/thomson/ip1000/mainboard_smi.c Wed Mar 17 04:14:54 2010 (r5242) @@ -22,6 +22,7 @@ #include <arch/io.h> #include <arch/romcc_io.h> #include <console/console.h> +#include <cpu/x86/smm.h>
int mainboard_io_trap_handler(int smif) {
Modified: trunk/src/northbridge/intel/i82830/vga.c ============================================================================== --- trunk/src/northbridge/intel/i82830/vga.c Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/northbridge/intel/i82830/vga.c Wed Mar 17 04:14:54 2010 (r5242) @@ -25,7 +25,9 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <cbfs.h> +#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL #include <x86emu/x86emu.h> +#endif
static void vga_init(device_t dev) {
Modified: trunk/src/southbridge/intel/i82801dx/i82801dx.h ============================================================================== --- trunk/src/southbridge/intel/i82801dx/i82801dx.h Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/southbridge/intel/i82801dx/i82801dx.h Wed Mar 17 04:14:54 2010 (r5242) @@ -36,6 +36,8 @@ extern void i82801dx_enable(device_t dev); #endif
+#define DEBUG_PERIODIC_SMIS 0 + #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2
Modified: trunk/src/southbridge/intel/i82801dx/i82801dx_reset.c ============================================================================== --- trunk/src/southbridge/intel/i82801dx/i82801dx_reset.c Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/southbridge/intel/i82801dx/i82801dx_reset.c Wed Mar 17 04:14:54 2010 (r5242) @@ -18,6 +18,7 @@ */
#include <arch/io.h> +#include <reset.h>
void hard_reset(void) {
Modified: trunk/src/southbridge/intel/i82801dx/i82801dx_smi.c ============================================================================== --- trunk/src/southbridge/intel/i82801dx/i82801dx_smi.c Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/southbridge/intel/i82801dx/i82801dx_smi.c Wed Mar 17 04:14:54 2010 (r5242) @@ -24,6 +24,7 @@ #include <device/pci.h> #include <console/console.h> #include <arch/io.h> +#include <cpu/cpu.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <string.h> @@ -237,7 +238,7 @@
extern uint8_t smm_relocation_start, smm_relocation_end;
-void smm_relocate(void) +static void smm_relocate(void) { u32 smi_en; u16 pm1_en; @@ -317,7 +318,7 @@ outb(0x00, 0xb2); }
-void smm_install(void) +static void smm_install(void) { /* enable the SMM memory window */ pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM,
Modified: trunk/src/superio/smsc/smscsuperio/superio.c ============================================================================== --- trunk/src/superio/smsc/smscsuperio/superio.c Wed Mar 17 04:14:28 2010 (r5241) +++ trunk/src/superio/smsc/smscsuperio/superio.c Wed Mar 17 04:14:54 2010 (r5242) @@ -345,7 +345,7 @@
/* Enable the specified devices (if present on the chip). */ pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info), - &pnp_dev_info); + &pnp_dev_info[0]);
/* Restore LD_FOO values. */ for (j = 0; j < ARRAY_SIZE(pnp_dev_info); j++)