HT devices in v3

[Myles Watson]

I'm getting stuck in Hypertransport enumeration.  Is there supposed to be a
pci_domain that is the child of a HT link?  If so, what device ID would it
have.

I'm thinking specifically about the 8132 and 8111 on the Serengeti board.
The dts currently looks like this (simplified):

domain@0 {
    	/config/("northbridge/amd/k8/domain");
    	pci@1,0{
    	};
    	pci0@18,0 {
    		/config/("northbridge/amd/k8/pci");
    		pci@0,0 {
    			/config/("southbridge/amd/amd8111/pci.dts");
    			pci@1,0{
    
/config/("southbridge/amd/amd8111/nic.dts");
    			};
    			pci@0,0{
    
/config/("southbridge/amd/amd8111/usb.dts");
    			};
    		};
    		pci@7,0 {
    			/config/("southbridge/amd/amd8111/lpc.dts");
    		};
    	};

I think it should look like this:

domain@0 {
    	/config/("northbridge/amd/k8/domain");
    	pci0@18,0 {
    		/config/("northbridge/amd/k8/pci");
    		pci@0,0 { //Really at 00:6.0
    			/config/("southbridge/amd/amd8111/pci.dts");
    			pci@1,0{
    
/config/("southbridge/amd/amd8111/nic.dts");
    			};
    			pci@0,0{
    
/config/("southbridge/amd/amd8111/usb.dts");
    			};
    		};
    		pci@1,0 { //Really at 00:7.0
    			/config/("southbridge/amd/amd8111/lpc.dts");
    		};
    		pci@2,0{  //Really at 00:a.0 and 00:b.0
    
/config/("southbridge/amd/amd8132/pcix.dts");
    		};
    	};

My reasoning is that the 8132 and the 81111 should be at the same level.
This doesn't work for me in hypertransport enumeration for various reasons.
Before I do a big rewrite, I'd like a little sanity check.

By the way, "dynamic" in the dtsname is bad when you had the device in the
dts.  It means it didn't find your device where you said it was.

Thanks,
Myles

[Marc Jones]

Myles Watson wrote:
> I'm getting stuck in Hypertransport enumeration.  Is there supposed to be a
> pci_domain that is the child of a HT link?  If so, what device ID would it
> have.
>
> I'm thinking specifically about the 8132 and 8111 on the Serengeti board.
> The dts currently looks like this (simplified):
>
> domain@0 {
>    	/config/("northbridge/amd/k8/domain");
>    	pci@1,0{
>    	};
>    	pci0@18,0 {
>    		/config/("northbridge/amd/k8/pci");
>    		pci@0,0 {
>    			/config/("southbridge/amd/amd8111/pci.dts");
>    			pci@1,0{
>
> /config/("southbridge/amd/amd8111/nic.dts");
>    			};
>    			pci@0,0{
>
> /config/("southbridge/amd/amd8111/usb.dts");
>    			};
>    		};
>    		pci@7,0 {
>    			/config/("southbridge/amd/amd8111/lpc.dts");
>    		};
>    	};
>
> I think it should look like this:
>
> domain@0 {
>    	/config/("northbridge/amd/k8/domain");
>    	pci0@18,0 {
>    		/config/("northbridge/amd/k8/pci");
>    		pci@0,0 { //Really at 00:6.0
>    			/config/("southbridge/amd/amd8111/pci.dts");
>    			pci@1,0{
>
> /config/("southbridge/amd/amd8111/nic.dts");
>    			};
>    			pci@0,0{
>
> /config/("southbridge/amd/amd8111/usb.dts");
>    			};
>    		};
>    		pci@1,0 { //Really at 00:7.0
>    			/config/("southbridge/amd/amd8111/lpc.dts");
>    		};
>    		pci@2,0{  //Really at 00:a.0 and 00:b.0
>
> /config/("southbridge/amd/amd8132/pcix.dts");
>    		};
>    	};
>
> My reasoning is that the 8132 and the 81111 should be at the same level.
> This doesn't work for me in hypertransport enumeration for various reasons.
> Before I do a big rewrite, I'd like a little sanity check.
>
> By the way, "dynamic" in the dtsname is bad when you had the device in the
> dts.  It means it didn't find your device where you said it was.
>
> Thanks,
> Myles

Myles,
You are right that they should be on the same level. I am not an expert 
enough on dts but I think you are on the right path. The devices need to 
be put in the correct place so we don't get dynamic. I expect that Ron 
will have some comment.

Thanks,
Marc

[ron minnich]

your serengeti dts is way out of data.

8132 should be same level as 8111.

ron

[Carl-Daniel Hailfinger]

On 23.10.2008 21:15, Myles Watson wrote:
> I'm getting stuck in Hypertransport enumeration.  Is there supposed to be a
> pci_domain that is the child of a HT link?  If so, what device ID would it
> have.
>
> I'm thinking specifically about the 8132 and 8111 on the Serengeti board.
> The dts currently looks like this (simplified):
>
> domain@0 {
>    	/config/("northbridge/amd/k8/domain");
>    	pci@1,0{
>    	};
>    	pci0@18,0 {
>    		/config/("northbridge/amd/k8/pci");
>    		pci@0,0 {
>    			/config/("southbridge/amd/amd8111/pci.dts");
>    			pci@1,0{
>
> /config/("southbridge/amd/amd8111/nic.dts");
>    			};
>    			pci@0,0{
>
> /config/("southbridge/amd/amd8111/usb.dts");
>    			};
>    		};
>    		pci@7,0 {
>    			/config/("southbridge/amd/amd8111/lpc.dts");
>    		};
>    	};
>
> I think it should look like this:
>
> domain@0 {
>    	/config/("northbridge/amd/k8/domain");
>    	pci0@18,0 {
>    		/config/("northbridge/amd/k8/pci");
>    		pci@0,0 { //Really at 00:6.0
>    			/config/("southbridge/amd/amd8111/pci.dts");
>    			pci@1,0{
>
> /config/("southbridge/amd/amd8111/nic.dts");
>    			};
>    			pci@0,0{
>
> /config/("southbridge/amd/amd8111/usb.dts");
>    			};
>    		};
>    		pci@1,0 { //Really at 00:7.0
>    			/config/("southbridge/amd/amd8111/lpc.dts");
>    		};
>    		pci@2,0{  //Really at 00:a.0 and 00:b.0
>
> /config/("southbridge/amd/amd8132/pcix.dts");
>    		};
>    	};
>
> My reasoning is that the 8132 and the 81111 should be at the same level.
> This doesn't work for me in hypertransport enumeration for various reasons.
> Before I do a big rewrite, I'd like a little sanity check.

Hypertransport representation in the dts is non-existent. I shall attack
this in the next few days. Proposals have already been sent to the list,
but the enthusiasm was limited.
> By the way, "dynamic" in the dtsname is bad when you had the device in the
> dts.  It means it didn't find your device where you said it was.

Yes, probably the age-old bug for which I sent a fix some months ago.
IIRC it was rejected back then, but I can't remember the reasons
offhand. Hm. I could make my error detection code in the tree simply
die() instead of outputting a warning. That would make the problem
painfully obvious. I shall update and resend my fix.

Regards,
Carl-Daniel

[ron minnich]

hold off on device tree for a bit. Marc is guiding me in a cleanup
effort and we have a pending patch. Just keep going on via :-)

ron

[Myles Watson]

> hold off on device tree for a bit. Marc is guiding me in a cleanup
> effort and we have a pending patch. Just keep going on via :-)

I wonder how we could best collaborate here.  I'm in the middle of messing
with a lot of files.  I guess if you can just fix it...

Thanks,
Myles

[Myles Watson]

On Thu, Oct 23, 2008 at 4:03 PM, Myles Watson  wrote:
> > hold off on device tree for a bit. Marc is guiding me in a cleanup
> > effort and we have a pending patch. Just keep going on via :-)
>
> I wonder how we could best collaborate here.  I'm in the middle of messing
> with a lot of files.  I guess if you can just fix it...
>
> Thanks,
> Myles

I have to go right now, but here's part of my patch.  It adds the 8132 to
the build, and changes the dts.

Hopefully it either saves you time or confirms what you're doing.

Signed-off-by: Myles  Watson

Thanks,
Myles

[Myles Watson]

I forgot to add this:

Signed-off-by: Myles Watson [e-mail]

Thanks,

Myles

Index: device/Makefile

===================================================================

--- device/Makefile          (revision 951)

+++ device/Makefile       (working copy)

@@ -33,5 +33,10 @@

STAGE2_DEVICE_SRC += hypertransport.c

endif

+# this is only needed for pcix

+ifeq ($(CONFIG_SOUTHBRIDGE_AMD_AMD8132),y)

+STAGE2_DEVICE_SRC += pcix_device.c

+endif

+

$(obj)/device/pci_device.o: $(src)/device/pci_device.c $(obj)/statictree.h

_____

From: Myles Watson [mailto:[e-mail]] 
Sent: Thursday, October 23, 2008 4:16 PM
To: ron minnich; Carl-Daniel Hailfinger
Cc: Coreboot
Subject: Re: [coreboot] HT devices in v3

On Thu, Oct 23, 2008 at 4:03 PM, Myles Watson  wrote:
> hold off on device tree for a bit. Marc is guiding me in a cleanup
> effort and we have a pending patch. Just keep going on via :-)

I wonder how we could best collaborate here.  I'm in the middle of messing
with a lot of files.  I guess if you can just fix it...

Thanks,
Myles

I have to go right now, but here's part of my patch.  It adds the 8132 to
the build, and changes the dts.

Hopefully it either saves you time or confirms what you're doing.

Signed-off-by: Myles  Watson

Thanks,
Myles

[Marc Jones]

Myles Watson wrote:
> On Thu, Oct 23, 2008 at 4:03 PM, Myles Watson <[e-mail] 
> > wrote:
> >
> > hold off on device tree for a bit. Marc is guiding me in a cleanup
> > effort and we have a pending patch. Just keep going on via :-)
> >
>
> I wonder how we could best collaborate here.  I'm in the middle of
> messing
> with a lot of files.  I guess if you can just fix it...
>
> Thanks,
> Myles
>
> I have to go right now, but here's part of my patch.  It adds the 8132 
> to the build, and changes the dts.
>
> Hopefully it either saves you time or confirms what you're doing.
>
> Signed-off-by: Myles  Watson <[e-mail] 
> >

Myles,

The kconfig and dts changes seem to be improved, good work. The area Ron 
and I are working on is phases and device operation function pointers. I 
am not sure about the changes in the 8111.c since it will get called 
like it used to in the code ron has.

Marc

[Myles Watson]

> -----Original Message-----
> From: Marc Jones [mailto:[e-mail]]
> Sent: Thursday, October 23, 2008 5:05 PM
> To: Myles Watson
> Cc: ron minnich; Carl-Daniel Hailfinger; Coreboot
> Subject: Re: [coreboot] HT devices in v3
>
> Myles Watson wrote:
> > On Thu, Oct 23, 2008 at 4:03 PM, Myles Watson <[e-mail]
> > > wrote:
> > >
> > > hold off on device tree for a bit. Marc is guiding me in a cleanup
> > > effort and we have a pending patch. Just keep going on via :-)
> > >
> >
> > I wonder how we could best collaborate here.  I'm in the middle of
> > messing
> > with a lot of files.  I guess if you can just fix it...
> >
> > Thanks,
> > Myles
> >
> > I have to go right now, but here's part of my patch.  It adds the 8132
> > to the build, and changes the dts.
> >
> > Hopefully it either saves you time or confirms what you're doing.
> >
> > Signed-off-by: Myles  Watson <[e-mail]
> > >
>
> Myles,
>
> The kconfig and dts changes seem to be improved, good work. The area Ron
> and I are working on is phases and device operation function pointers. I
> am not sure about the changes in the 8111.c since it will get called
> like it used to in the code ron has.

I'm glad.  That doesn't sound like it will overlap too much.  The 8111
changes were all cosmetic.  I was in a hurry so I didn't include a very good
change log.  The only non white space change was to change lpc_dev to
slot_dev because it could be an lpc or a pci device.

Thanks,
Myles
> Marc

[Marc Jones]

Carl-Daniel Hailfinger wrote:
> Hypertransport representation in the dts is non-existent. I shall attack
> this in the next few days. Proposals have already been sent to the list,
> but the enthusiasm was limited.

I'm sorry I don't recall your proposal. The ht isn't really ht. It is 
really root level pci bus. Everything is a pci bus.....

Marc

[Carl-Daniel Hailfinger]

On 24.10.2008 00:59, Marc Jones wrote:
> Carl-Daniel Hailfinger wrote:
> > Hypertransport representation in the dts is non-existent. I shall attack
> > this in the next few days. Proposals have already been sent to the list,
> > but the enthusiasm was limited.
>
> I'm sorry I don't recall your proposal.

No problem, I'll dig it up and resend.
> The ht isn't really ht. It is really root level pci bus. Everything is
> a pci bus.....

Ah, that makes the structure a lot less complicated. However, are the HT
links in a MP setup also handled as PCI buses? I plan to model them in
the dts as well.

Regards,
Carl-Daniel

[Marc Jones]

Carl-Daniel Hailfinger wrote:
> On 24.10.2008 00:59, Marc Jones wrote:
> > Carl-Daniel Hailfinger wrote:
> > > Hypertransport representation in the dts is non-existent. I shall attack
> > > this in the next few days. Proposals have already been sent to the list,
> > > but the enthusiasm was limited.
> >
> > I'm sorry I don't recall your proposal.
>
> No problem, I'll dig it up and resend.
> > The ht isn't really ht. It is really root level pci bus. Everything is
> > a pci bus.....
>
> Ah, that makes the structure a lot less complicated. However, are the HT
> links in a MP setup also handled as PCI buses? I plan to model them in
> the dts as well.

No, That is all the very complicated coherent ht init. If you want to 
put that in the dts I would just take it from the link map registers. 
Since it is all setup before memory/dts you can just read it and save 
it. The coherent ht bus is separate from the pci bus.

Marc