28 Feb 2009

Author: stepan
Date: 2009-02-28 21:10:20 +0100 (Sat, 28 Feb 2009)
New Revision: 3964
Modified:
   trunk/coreboot-v2/src/arch/i386/smp/mpspec.c
   trunk/coreboot-v2/src/cpu/amd/dualcore/amd_sibling.c
   trunk/coreboot-v2/src/cpu/amd/model_gx2/vsmsetup.c
   trunk/coreboot-v2/src/cpu/amd/model_lx/vsmsetup.c
   trunk/coreboot-v2/src/cpu/intel/hyperthreading/intel_sibling.c
   trunk/coreboot-v2/src/cpu/simple_init/simple_cpu_init.c
   trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c
   trunk/coreboot-v2/src/devices/agp_device.c
   trunk/coreboot-v2/src/devices/device_util.c
   trunk/coreboot-v2/src/devices/emulator/biosemu.c
   trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c
   trunk/coreboot-v2/src/devices/hypertransport.c
   trunk/coreboot-v2/src/devices/pci_device.c
   trunk/coreboot-v2/src/devices/pci_ops.c
   trunk/coreboot-v2/src/devices/pciexp_device.c
   trunk/coreboot-v2/src/devices/pcix_device.c
   trunk/coreboot-v2/src/devices/pnp_device.c
   trunk/coreboot-v2/src/drivers/generic/debug/debug_dev.c
   trunk/coreboot-v2/src/include/device/path.h
   trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c
   trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c
   trunk/coreboot-v2/src/mainboard/arima/hdama/mptable.c
   trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c
   trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/vgabios.c
   trunk/coreboot-v2/src/mainboard/tyan/s2881/mainboard.c
   trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c
   trunk/coreboot-v2/src/northbridge/amd/amdfam10/amdfam10_acpi.c
   trunk/coreboot-v2/src/northbridge/amd/amdfam10/misc_control.c
   trunk/coreboot-v2/src/northbridge/amd/amdfam10/northbridge.c
   trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
   trunk/coreboot-v2/src/northbridge/amd/amdk8/misc_control.c
   trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c
   trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c
   trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c
   trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_acpi.c
   trunk/coreboot-v2/src/southbridge/amd/amd8131/amd8131_bridge.c
   trunk/coreboot-v2/src/southbridge/amd/amd8132/amd8132_bridge.c
   trunk/coreboot-v2/src/southbridge/amd/rs690/rs690.c
   trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c
   trunk/coreboot-v2/src/southbridge/amd/sb600/sb600.c
   trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c
   trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785.c
   trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
   trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
   trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300.c
   trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300_smbus.c
   trunk/coreboot-v2/src/southbridge/intel/i3100/i3100.c
   trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_smbus.c
   trunk/coreboot-v2/src/southbridge/intel/i82801ca/i82801ca.c
   trunk/coreboot-v2/src/southbridge/intel/i82801dbm/i82801dbm.c
   trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er.c
   trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er_smbus.c
   trunk/coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_smbus.c
   trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx.c
   trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx_smbus.c
   trunk/coreboot-v2/src/southbridge/intel/i82870/p64h2_ioapic.c
   trunk/coreboot-v2/src/southbridge/intel/pxhd/pxhd_bridge.c
   trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804.c
   trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_smbus.c
   trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55.c
   trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_smbus.c
   trunk/coreboot-v2/src/southbridge/ricoh/rl5c476/rl5c476.c
   trunk/coreboot-v2/src/southbridge/sis/sis966/sis761.c
   trunk/coreboot-v2/src/southbridge/sis/sis966/sis966.c
   trunk/coreboot-v2/src/superio/fintek/f71805f/superio.c
   trunk/coreboot-v2/src/superio/intel/i3100/superio.c
   trunk/coreboot-v2/src/superio/ite/it8661f/superio.c
   trunk/coreboot-v2/src/superio/ite/it8671f/superio.c
   trunk/coreboot-v2/src/superio/ite/it8673f/superio.c
   trunk/coreboot-v2/src/superio/ite/it8705f/superio.c
   trunk/coreboot-v2/src/superio/ite/it8712f/superio.c
   trunk/coreboot-v2/src/superio/ite/it8716f/superio.c
   trunk/coreboot-v2/src/superio/ite/it8718f/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c
   trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c
   trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c
   trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c
   trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c
   trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c
   trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c
   trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c
   trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c
   trunk/coreboot-v2/src/superio/winbond/w83627dhg/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83627thg/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83627uhg/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83697hf/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c
   trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c
   trunk/coreboot-v2/util/newconfig/config.g
Log:
coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3
a long time ago. This will make it easier to port v2 boards forward to v3 at
some point (and other things)
Signed-off-by: Stefan Reinauer stepan@coresystems.de
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Modified: trunk/coreboot-v2/src/arch/i386/smp/mpspec.c
===================================================================

--- trunk/coreboot-v2/src/arch/i386/smp/mpspec.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/arch/i386/smp/mpspec.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -144,11 +144,11 @@
    		continue;
    	}
    	cpu_flag = MPC_CPU_ENABLED;
-		if (boot_apic_id == cpu->path.u.apic.apic_id) {
+		if (boot_apic_id == cpu->path.apic.apic_id) {
    		cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
    	}
    	smp_write_processor(mc, 
-			cpu->path.u.apic.apic_id, apic_version,
+			cpu->path.apic.apic_id, apic_version,
    		cpu_flag, cpu_features, cpu_feature_flags
    	);
    }
@@ -229,7 +229,7 @@
    		if (child->path.type != DEVICE_PATH_PCI)
    			goto next;
-			slot = (child->path.u.pci.devfn >> 3);
+			slot = (child->path.pci.devfn >> 3);
    		/* round pins */
    		for (i = 0; i < 4; i++)
    			dstirq_x[i] = dstirq[(i + slot) % 4];
Modified: trunk/coreboot-v2/src/cpu/amd/dualcore/amd_sibling.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/dualcore/amd_sibling.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/cpu/amd/dualcore/amd_sibling.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -142,7 +142,7 @@
#if 1
    printk_debug("CPU: %u %d siblings\n",
-		cpu->path.u.apic.apic_id,
+		cpu->path.apic.apic_id,
    	siblings);
 #endif
@@ -151,8 +151,8 @@
    id = get_node_core_id(nb_cfg_54); // pre e0 nb_cfg_54 can not be set
/* See if I am a sibling cpu */
-	//if ((cpu->path.u.apic.apic_id>>(nb_cfg_54?0:3)) & siblings ) { // siblings = 1, 3, 7, 15,....
-	//if ( ( (cpu->path.u.apic.apic_id>>(nb_cfg_54?0:3)) % (siblings+1) ) != 0 ) {
+	//if ((cpu->path.apic.apic_id>>(nb_cfg_54?0:3)) & siblings ) { // siblings = 1, 3, 7, 15,....
+	//if ( ( (cpu->path.apic.apic_id>>(nb_cfg_54?0:3)) % (siblings+1) ) != 0 ) {
    if(id.coreid != 0) {
            if (disable_siblings) {
                         cpu->enabled = 0;
@@ -168,12 +168,12 @@
    	device_t new;
    	/* Build the cpu device path */
    	cpu_path.type = DEVICE_PATH_APIC;
-		cpu_path.u.apic.apic_id = cpu->path.u.apic.apic_id + i * (nb_cfg_54?1:8);
+		cpu_path.apic.apic_id = cpu->path.apic.apic_id + i * (nb_cfg_54?1:8);
                 if(id.nodeid == 0) {
                         // need some special processing, because may the bsp is not lifted, but the core1 is lifted
    		//defined in northbridge.c
                         if(sysconf.enabled_apic_ext_id && (!sysconf.lift_bsp_apicid)) {
-                        	cpu->path.u.apic.apic_id += sysconf.apicid_offset;
+                        	cpu->path.apic.apic_id += sysconf.apicid_offset;
                         }
}
@@ -188,13 +188,13 @@
    		new->initialized = 0;
    	}
-                new->path.u.apic.node_id = cpu->path.u.apic.node_id;
-                new->path.u.apic.core_id = i;
+                new->path.apic.node_id = cpu->path.apic.node_id;
+                new->path.apic.core_id = i;
#if 1
    	printk_debug("CPU: %u has sibling %u\n", 
-			cpu->path.u.apic.apic_id,
-			new->path.u.apic.apic_id);
+			cpu->path.apic.apic_id,
+			new->path.apic.apic_id);
 #endif
if(new->enabled && !new->initialized)
Modified: trunk/coreboot-v2/src/cpu/amd/model_gx2/vsmsetup.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/model_gx2/vsmsetup.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/cpu/amd/model_gx2/vsmsetup.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -651,7 +651,7 @@
    		// busnum is an unsigned char;
    		// devfn is an int, so we mask it off. 
    		busdevfn = (dev->bus->secondary << 8)
-				| (dev->path.u.pci.devfn & 0xff);
+				| (dev->path.pci.devfn & 0xff);
    		printk_debug("0x%x: return 0x%x\n", func, busdevfn);
    		*pebx = busdevfn;
    		retval = 0;
Modified: trunk/coreboot-v2/src/cpu/amd/model_lx/vsmsetup.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/model_lx/vsmsetup.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/cpu/amd/model_lx/vsmsetup.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -661,7 +661,7 @@
    			// busnum is an unsigned char;
    			// devfn is an int, so we mask it off.
    			busdevfn = (dev->bus->secondary << 8)
-				    | (dev->path.u.pci.devfn & 0xff);
+				    | (dev->path.pci.devfn & 0xff);
    			printk_debug("0x%x: return 0x%x\n", func,
    				     busdevfn);
    			*pebx = busdevfn;
Modified: trunk/coreboot-v2/src/cpu/intel/hyperthreading/intel_sibling.c
===================================================================
--- trunk/coreboot-v2/src/cpu/intel/hyperthreading/intel_sibling.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/cpu/intel/hyperthreading/intel_sibling.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -32,12 +32,12 @@
#if 1
    printk_debug("CPU: %u %d siblings\n",
-		cpu->path.u.apic.apic_id,
+		cpu->path.apic.apic_id,
    	siblings);
 #endif
/* See if I am a sibling cpu */
-	if (cpu->path.u.apic.apic_id & (siblings -1)) {
+	if (cpu->path.apic.apic_id & (siblings -1)) {
    	if (disable_siblings) {
    		cpu->enabled = 0;
    	}
@@ -50,7 +50,7 @@
    	device_t new;
    	/* Build the cpu device path */
    	cpu_path.type = DEVICE_PATH_APIC;
-		cpu_path.u.apic.apic_id = cpu->path.u.apic.apic_id + i;
+		cpu_path.apic.apic_id = cpu->path.apic.apic_id + i;
/* Allocate the new cpu device structure */
@@ -62,14 +62,14 @@
#if 1
    	printk_debug("CPU: %u has sibling %u\n", 
-			cpu->path.u.apic.apic_id,
-			new->path.u.apic.apic_id);
+			cpu->path.apic.apic_id,
+			new->path.apic.apic_id);
 #endif
    	/* Start the new cpu */
    	if (!start_cpu(new)) {
    		/* Record the error in cpu? */
    		printk_err("CPU %u would not start!\n",
-				new->path.u.apic.apic_id);
+				new->path.apic.apic_id);
    	}
    }
Modified: trunk/coreboot-v2/src/cpu/simple_init/simple_cpu_init.c
===================================================================
--- trunk/coreboot-v2/src/cpu/simple_init/simple_cpu_init.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/cpu/simple_init/simple_cpu_init.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -17,7 +17,7 @@
    
    /* Get the device path of the boot cpu */
    cpu_path.type = DEVICE_PATH_CPU;
-	cpu_path.u.cpu.id = 0;
+	cpu_path.cpu.id = 0;
/* Find the device struct for the boot cpu */
    info->cpu = alloc_find_dev(cpu_bus, &cpu_path);
Modified: trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c
===================================================================
--- trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/cpu/x86/lapic/lapic_cpu_init.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -223,7 +223,7 @@
    spin_lock(&start_cpu_lock);
/* Get the cpu's apicid */
-	apicid = cpu->path.u.apic.apic_id;
+	apicid = cpu->path.apic.apic_id;
/* Get an index for the new processor */
    index = ++last_cpu_index;
@@ -389,7 +389,7 @@
    	if (!start_cpu(cpu)) {
    		/* Record the error in cpu? */
    		printk_err("CPU 0x%02x would not start!\n",
-				cpu->path.u.apic.apic_id);
+				cpu->path.apic.apic_id);
    	}
 #if SERIAL_CPU_INIT == 1
   #if CONFIG_MAX_CPUS>2
@@ -421,7 +421,7 @@
    	}
    	if (!cpu->initialized) {
    		printk_err("CPU 0x%02x did not initialize!\n", 
-				cpu->path.u.apic.apic_id);
+				cpu->path.apic.apic_id);
    	}
    }
    printk_debug("All AP CPUs stopped\n");
@@ -455,11 +455,11 @@
/* Get the device path of the boot cpu */
    cpu_path.type           = DEVICE_PATH_APIC;
-	cpu_path.u.apic.apic_id = lapicid();
+	cpu_path.apic.apic_id = lapicid();
 #else
    /* Get the device path of the boot cpu */
    cpu_path.type           = DEVICE_PATH_CPU;
-	cpu_path.u.cpu.id       = 0;
+	cpu_path.cpu.id       = 0;
 #endif
/* Find the device structure for the boot cpu */
Modified: trunk/coreboot-v2/src/devices/agp_device.c
===================================================================
--- trunk/coreboot-v2/src/devices/agp_device.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/agp_device.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -40,8 +40,8 @@
    device_t child;
    max = pci_scan_bus(bus, min_devfn, max_devfn, max);
    for(child = bus->children; child; child = child->sibling) {
-		if (	(child->path.u.pci.devfn < min_devfn) ||
-			(child->path.u.pci.devfn > max_devfn))
+		if (	(child->path.pci.devfn < min_devfn) ||
+			(child->path.pci.devfn > max_devfn))
    	{
    		continue;
    	}
Modified: trunk/coreboot-v2/src/devices/device_util.c
===================================================================
--- trunk/coreboot-v2/src/devices/device_util.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/device_util.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -80,7 +80,7 @@
    for (dev = all_devices; dev; dev = dev->next) {
    	if ((dev->path.type == DEVICE_PATH_PCI) &&
    		(dev->bus->secondary == bus) && 
-			(dev->path.u.pci.devfn == devfn)) {
+			(dev->path.pci.devfn == devfn)) {
    		result = dev;
    		break;
    	}
@@ -103,7 +103,7 @@
         for (dev = all_devices; dev; dev = dev->next) {
                 if ((dev->path.type == DEVICE_PATH_I2C) &&
                         (dev->bus->secondary == bus) && 
-                        (dev->path.u.i2c.device == addr)) {
+                        (dev->path.i2c.device == addr)) {
                         result = dev;
                         break; 
                 }       
@@ -166,39 +166,39 @@
 #if PCI_BUS_SEGN_BITS
    		sprintf(buffer, "PCI: %04x:%02x:%02x.%01x",
    			dev->bus->secondary>>8, dev->bus->secondary & 0xff, 
-				PCI_SLOT(dev->path.u.pci.devfn), PCI_FUNC(dev->path.u.pci.devfn));
+				PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #else
    		sprintf(buffer, "PCI: %02x:%02x.%01x",
    			dev->bus->secondary, 
-				PCI_SLOT(dev->path.u.pci.devfn), PCI_FUNC(dev->path.u.pci.devfn));
+				PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #endif
    		break;
    	case DEVICE_PATH_PNP:
    		sprintf(buffer, "PNP: %04x.%01x",
-				dev->path.u.pnp.port, dev->path.u.pnp.device);
+				dev->path.pnp.port, dev->path.pnp.device);
    		break;
    	case DEVICE_PATH_I2C:
    		sprintf(buffer, "I2C: %02x:%02x",
    			dev->bus->secondary,
-				dev->path.u.i2c.device);
+				dev->path.i2c.device);
    		break;
    	case DEVICE_PATH_APIC:
    		sprintf(buffer, "APIC: %02x",
-				dev->path.u.apic.apic_id);
+				dev->path.apic.apic_id);
    		break;
    	case DEVICE_PATH_PCI_DOMAIN:
    		sprintf(buffer, "PCI_DOMAIN: %04x",
-				dev->path.u.pci_domain.domain);
+				dev->path.pci_domain.domain);
    		break;
    	case DEVICE_PATH_APIC_CLUSTER:
    		sprintf(buffer, "APIC_CLUSTER: %01x",
-				dev->path.u.apic_cluster.cluster);
+				dev->path.apic_cluster.cluster);
    		break;
    	case DEVICE_PATH_CPU:
-			sprintf(buffer, "CPU: %02x", dev->path.u.cpu.id);
+			sprintf(buffer, "CPU: %02x", dev->path.cpu.id);
    		break;
    	case DEVICE_PATH_CPU_BUS:
-			sprintf(buffer, "CPU_BUS: %02x", dev->path.u.cpu_bus.id);
+			sprintf(buffer, "CPU_BUS: %02x", dev->path.cpu_bus.id);
    		break;
    	default:
    		printk_err("Unknown device path type: %d\n", dev->path.type);
@@ -227,29 +227,29 @@
    		equal = 1;
    		break;
    	case DEVICE_PATH_PCI:
-			equal = (path1->u.pci.devfn == path2->u.pci.devfn);
+			equal = (path1->pci.devfn == path2->pci.devfn);
    		break;
    	case DEVICE_PATH_PNP:
-			equal = (path1->u.pnp.port == path2->u.pnp.port) &&
-				(path1->u.pnp.device == path2->u.pnp.device);
+			equal = (path1->pnp.port == path2->pnp.port) &&
+				(path1->pnp.device == path2->pnp.device);
    		break;
    	case DEVICE_PATH_I2C:
-			equal = (path1->u.i2c.device == path2->u.i2c.device);
+			equal = (path1->i2c.device == path2->i2c.device);
    		break;
    	case DEVICE_PATH_APIC:
-			equal = (path1->u.apic.apic_id == path2->u.apic.apic_id);
+			equal = (path1->apic.apic_id == path2->apic.apic_id);
    		break;
    	case DEVICE_PATH_PCI_DOMAIN:
-			equal = (path1->u.pci_domain.domain == path2->u.pci_domain.domain);
+			equal = (path1->pci_domain.domain == path2->pci_domain.domain);
    		break;
    	case DEVICE_PATH_APIC_CLUSTER:
-			equal = (path1->u.apic_cluster.cluster == path2->u.apic_cluster.cluster);
+			equal = (path1->apic_cluster.cluster == path2->apic_cluster.cluster);
    		break;
    	case DEVICE_PATH_CPU:
-			equal = (path1->u.cpu.id == path2->u.cpu.id);
+			equal = (path1->cpu.id == path2->cpu.id);
    		break;
    	case DEVICE_PATH_CPU_BUS:
-			equal = (path1->u.cpu_bus.id == path2->u.cpu_bus.id);
+			equal = (path1->cpu_bus.id == path2->cpu_bus.id);
    		break;
    	default:
    		printk_err("Uknown device type: %d\n", path1->type);
Modified: trunk/coreboot-v2/src/devices/emulator/biosemu.c
===================================================================
--- trunk/coreboot-v2/src/devices/emulator/biosemu.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/emulator/biosemu.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -286,7 +286,7 @@
    int i;
    unsigned short initialcs = (addr & 0xF0000) >> 4;
    unsigned short initialip = (addr + 3) & 0xFFFF;
-	unsigned short devfn = dev->bus->secondary << 8 | dev->path.u.pci.devfn;
+	unsigned short devfn = dev->bus->secondary << 8 | dev->path.pci.devfn;
    X86EMU_intrFuncs intFuncs[256];
X86EMU_setMemBase(0, 0x100000);
Modified: trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c
===================================================================
--- trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -27,7 +27,7 @@
    	dev = dev_find_device(X86_DX, X86_CX, dev);
    	if (dev != 0) {
    		X86_BH = dev->bus->secondary;
-			X86_BL = dev->path.u.pci.devfn;
+			X86_BL = dev->path.pci.devfn;
    		X86_AH = SUCCESSFUL;
    		X86_EFLAGS &= ~FB_CF;	/* clear carry flag */
    		ret = 1;
@@ -42,7 +42,7 @@
    	dev = dev_find_class(X86_ECX, dev);
    	if (dev != 0) {
    		X86_BH = dev->bus->secondary;
-			X86_BL = dev->path.u.pci.devfn;
+			X86_BL = dev->path.pci.devfn;
    		X86_AH = SUCCESSFUL;
    		X86_EFLAGS &= ~FB_CF;	/* clear carry flag */
    		ret = 1;
Modified: trunk/coreboot-v2/src/devices/hypertransport.c
===================================================================
--- trunk/coreboot-v2/src/devices/hypertransport.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/hypertransport.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -56,7 +56,7 @@
     */
    while(last && last->sibling && 
    	(last->sibling->path.type == DEVICE_PATH_PCI) &&
-		(last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) 
+		(last->sibling->path.pci.devfn > last->path.pci.devfn)) 
    {
    	last = last->sibling;
    }
@@ -338,7 +338,7 @@
                 uint32_t id;
                 dummy.bus              = bus;
                 dummy.path.type        = DEVICE_PATH_PCI;
-                dummy.path.u.pci.devfn = PCI_DEVFN(0, 0);
+                dummy.path.pci.devfn = PCI_DEVFN(0, 0);
                 id = pci_read_config32(&dummy, PCI_VENDOR_ID);
                 if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
                     (id == 0x0000ffff) || (id == 0xffff0000) ) ) {
@@ -355,7 +355,7 @@
    	unsigned pos, flags;
    	dummy.bus              = bus;
    	dummy.path.type        = DEVICE_PATH_PCI;
-		dummy.path.u.pci.devfn = devfn;
+		dummy.path.pci.devfn = devfn;
    	id = pci_read_config32(&dummy, PCI_VENDOR_ID);
    	if (	(id == 0xffffffff) || (id == 0x00000000) || 
    		(id == 0x0000ffff) || (id == 0xffff0000)) {
@@ -503,9 +503,9 @@
    	/* Update the Unitd id in the device structure */
    	static_count = 1;
    	for(func = dev; func; func = func->sibling) {
-			func->path.u.pci.devfn += (next_unitid << 3);
-			static_count = (func->path.u.pci.devfn >> 3) 
-				- (dev->path.u.pci.devfn >> 3) + 1;
+			func->path.pci.devfn += (next_unitid << 3);
+			static_count = (func->path.pci.devfn >> 3) 
+				- (dev->path.pci.devfn >> 3) + 1;
    		last_func = func;
    	}
    	/* Compute the number of unitids consumed */
@@ -561,7 +561,7 @@
                 pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
for(func = real_last_dev; func; func = func->sibling) {
-                        func->path.u.pci.devfn -= ((real_last_unitid - HT_CHAIN_END_UNITID_BASE) << 3);
+                        func->path.pci.devfn -= ((real_last_unitid - HT_CHAIN_END_UNITID_BASE) << 3);
    		last_func = func;
                 }
Modified: trunk/coreboot-v2/src/devices/pci_device.c
===================================================================
--- trunk/coreboot-v2/src/devices/pci_device.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/pci_device.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -868,7 +868,7 @@
    			dev_path(*list));
    		continue;
    	}
-		if ((*list)->path.u.pci.devfn == devfn) {
+		if ((*list)->path.pci.devfn == devfn) {
    		/* Unlink from the list */
    		dev = *list;
    		*list = (*list)->sibling;
@@ -919,7 +919,7 @@
    	struct device dummy;
    	dummy.bus              = bus;
    	dummy.path.type        = DEVICE_PATH_PCI;
-		dummy.path.u.pci.devfn = devfn;
+		dummy.path.pci.devfn = devfn;
    	id = pci_read_config32(&dummy, PCI_VENDOR_ID);
    	/* Have we found somthing?
    	 * Some broken boards return 0 if a slot is empty.
Modified: trunk/coreboot-v2/src/devices/pci_ops.c
===================================================================
--- trunk/coreboot-v2/src/devices/pci_ops.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/pci_ops.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -41,35 +41,35 @@
 uint8_t pci_read_config8(device_t dev, unsigned where)
 {
    struct bus *pbus = get_pbus(dev);
-	return ops_pci_bus(pbus)->read8(pbus, dev->bus->secondary, dev->path.u.pci.devfn, where);
+	return ops_pci_bus(pbus)->read8(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
 }
uint16_t pci_read_config16(device_t dev, unsigned where)
 {
    struct bus *pbus = get_pbus(dev);
-	return ops_pci_bus(pbus)->read16(pbus, dev->bus->secondary, dev->path.u.pci.devfn, where);
+	return ops_pci_bus(pbus)->read16(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
 }
uint32_t pci_read_config32(device_t dev, unsigned where)
 {
    struct bus *pbus = get_pbus(dev);
-	return ops_pci_bus(pbus)->read32(pbus, dev->bus->secondary, dev->path.u.pci.devfn, where);
+	return ops_pci_bus(pbus)->read32(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
 }
void pci_write_config8(device_t dev, unsigned where, uint8_t val)
 {
    struct bus *pbus = get_pbus(dev);
-	ops_pci_bus(pbus)->write8(pbus, dev->bus->secondary, dev->path.u.pci.devfn, where, val);
+	ops_pci_bus(pbus)->write8(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
 }
void pci_write_config16(device_t dev, unsigned where, uint16_t val)
 {
    struct bus *pbus = get_pbus(dev);
-	ops_pci_bus(pbus)->write16(pbus, dev->bus->secondary, dev->path.u.pci.devfn, where, val);
+	ops_pci_bus(pbus)->write16(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
 }
void pci_write_config32(device_t dev, unsigned where, uint32_t val)
 {
    struct bus *pbus = get_pbus(dev);
-	ops_pci_bus(pbus)->write32(pbus, dev->bus->secondary, dev->path.u.pci.devfn, where, val);
+	ops_pci_bus(pbus)->write32(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
 }
Modified: trunk/coreboot-v2/src/devices/pciexp_device.c
===================================================================
--- trunk/coreboot-v2/src/devices/pciexp_device.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/pciexp_device.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -45,8 +45,8 @@
    device_t child;
    max = pci_scan_bus(bus, min_devfn, max_devfn, max);
    for(child = bus->children; child; child = child->sibling) {
-		if (	(child->path.u.pci.devfn < min_devfn) ||
-			(child->path.u.pci.devfn > max_devfn))
+		if (	(child->path.pci.devfn < min_devfn) ||
+			(child->path.pci.devfn > max_devfn))
    	{
    		continue;
    	}
Modified: trunk/coreboot-v2/src/devices/pcix_device.c
===================================================================
--- trunk/coreboot-v2/src/devices/pcix_device.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/pcix_device.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -67,8 +67,8 @@
    device_t child;
    max = pci_scan_bus(bus, min_devfn, max_devfn, max);
    for(child = bus->children; child; child = child->sibling) {
-		if (	(child->path.u.pci.devfn < min_devfn) ||
-			(child->path.u.pci.devfn > max_devfn))
+		if (	(child->path.pci.devfn < min_devfn) ||
+			(child->path.pci.devfn > max_devfn))
    	{
    		continue;
    	}
Modified: trunk/coreboot-v2/src/devices/pnp_device.c
===================================================================
--- trunk/coreboot-v2/src/devices/pnp_device.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/devices/pnp_device.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -34,19 +34,19 @@
void pnp_write_config(device_t dev, uint8_t reg, uint8_t value)
 {
-	outb(reg, dev->path.u.pnp.port);
-	outb(value, dev->path.u.pnp.port + 1);
+	outb(reg, dev->path.pnp.port);
+	outb(value, dev->path.pnp.port + 1);
 }
uint8_t pnp_read_config(device_t dev, uint8_t reg)
 {
-	outb(reg, dev->path.u.pnp.port);
-	return inb(dev->path.u.pnp.port + 1);
+	outb(reg, dev->path.pnp.port);
+	return inb(dev->path.pnp.port + 1);
 }
void pnp_set_logical_device(device_t dev)
 {
-	pnp_write_config(dev, 0x07, dev->path.u.pnp.device & 0xff);
+	pnp_write_config(dev, 0x07, dev->path.pnp.device & 0xff);
 }
void pnp_set_enable(device_t dev, int enable)
@@ -55,7 +55,7 @@
tmp = pnp_read_config(dev, 0x30);
    /* handle the virtual devices, which share same LDN register */
-	bitpos = (dev->path.u.pnp.device >> 8) & 0x7;
+	bitpos = (dev->path.pnp.device >> 8) & 0x7;
if (enable) {
    	tmp |= (1 << bitpos);
@@ -70,7 +70,7 @@
    uint8_t tmp, bitpos;
    tmp = pnp_read_config(dev, 0x30);
    /* handle the virtual devices, which share same LDN register */
-	bitpos = (dev->path.u.pnp.device >> 8) & 0x7;
+	bitpos = (dev->path.pnp.device >> 8) & 0x7;
    return !!(tmp & (1 << bitpos));
 }
@@ -251,7 +251,7 @@
    int i;
path.type       = DEVICE_PATH_PNP;
-	path.u.pnp.port = base_dev->path.u.pnp.port;
+	path.pnp.port = base_dev->path.pnp.port;
    
    /* Setup the ops and resources on the newly allocated devices */
    for(i = 0; i < functions; i++) {
@@ -259,7 +259,7 @@
    	if (info[i].function == -1)
    		continue;
-		path.u.pnp.device = info[i].function;
+		path.pnp.device = info[i].function;
    	dev = alloc_find_dev(base_dev->bus, &path);
    	
    	/* Don't initialize a device multiple times */
Modified: trunk/coreboot-v2/src/drivers/generic/debug/debug_dev.c
===================================================================
--- trunk/coreboot-v2/src/drivers/generic/debug/debug_dev.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/drivers/generic/debug/debug_dev.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -234,7 +234,7 @@
 #endif
    if (!dev->enabled)
    	return;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
 #if CONFIG_CHIP_NAME
    case 0:
    	parent = dev->bus->dev;
Modified: trunk/coreboot-v2/src/include/device/path.h
===================================================================
--- trunk/coreboot-v2/src/include/device/path.h	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/include/device/path.h	2009-02-28 20:10:20 UTC (rev 3964)
@@ -69,7 +69,7 @@
    	struct apic_cluster_path apic_cluster;
    	struct cpu_path          cpu;
    	struct cpu_bus_path      cpu_bus;
-	} u;
+	};
 };
Modified: trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/mainboard/amd/dbm690t/mainboard.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -105,24 +105,24 @@
byte =
        pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,
-				sm_dev->path.u.pci.devfn, 0xA9);
+				sm_dev->path.pci.devfn, 0xA9);
    byte |= (1 << 5);	/* Set Gpio9 as input */
    pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,
-			     sm_dev->path.u.pci.devfn, 0xA9, byte);
+			     sm_dev->path.pci.devfn, 0xA9, byte);
ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
    byte =
        pci_cf8_conf1.read8(&pbus, ide_dev->bus->secondary,
-				ide_dev->path.u.pci.devfn, 0x56);
+				ide_dev->path.pci.devfn, 0x56);
    byte &= ~(7 << 0);
    if ((1 << 5) & pci_cf8_conf1.
-	    read8(&pbus, sm_dev->bus->secondary, sm_dev->path.u.pci.devfn,
+	    read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn,
    	  0xAA))
    	byte |= 2 << 0;	/* mode 2 */
    else
    	byte |= 5 << 0;	/* mode 5 */
    pci_cf8_conf1.write8(&pbus, ide_dev->bus->secondary,
-			     ide_dev->path.u.pci.devfn, 0x56, byte);
+			     ide_dev->path.pci.devfn, 0x56, byte);
 }
/*
@@ -158,10 +158,10 @@
    sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
    word =
        pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.u.pci.devfn, 0x56);
+				 sm_dev->path.pci.devfn, 0x56);
    word |= 1 << 7;
    pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.u.pci.devfn, 0x56, word);
+			      sm_dev->path.pci.devfn, 0x56, word);
/* set GPIO 64 internal pull-up */
    byte = pm2_ioread(0xf0);
Modified: trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/mainboard/amd/pistachio/mainboard.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -169,26 +169,26 @@
    sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
    dword =
        pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.u.pci.devfn, 0x64);
+				 sm_dev->path.pci.devfn, 0x64);
    dword |= 1 << 19;
    pci_cf8_conf1.write32(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.u.pci.devfn, 0x64, dword);
+			      sm_dev->path.pci.devfn, 0x64, dword);
/* Enable Client Management Index/Data registers */
    dword =
        pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.u.pci.devfn, 0x78);
+				 sm_dev->path.pci.devfn, 0x78);
    dword |= 1 << 11;	/* Cms_enable */
    pci_cf8_conf1.write32(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.u.pci.devfn, 0x78, dword);
+			      sm_dev->path.pci.devfn, 0x78, dword);
/* MiscfuncEnable */
    byte =
        pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,
-				sm_dev->path.u.pci.devfn, 0x41);
+				sm_dev->path.pci.devfn, 0x41);
    byte |= (1 << 5);
    pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,
-			     sm_dev->path.u.pci.devfn, 0x41, byte);
+			     sm_dev->path.pci.devfn, 0x41, byte);
/* set GPM5 as input */
    /* set index register 0C50h to 13h (miscellaneous control) */
@@ -230,10 +230,10 @@
    /* set GPIO 64 to input */
    word =
        pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.u.pci.devfn, 0x56);
+				 sm_dev->path.pci.devfn, 0x56);
    word |= 1 << 7;
    pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.u.pci.devfn, 0x56, word);
+			      sm_dev->path.pci.devfn, 0x56, word);
/* set GPIO 64 internal pull-up */
    byte = pm2_ioread(0xf0);
Modified: trunk/coreboot-v2/src/mainboard/arima/hdama/mptable.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/arima/hdama/mptable.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/mainboard/arima/hdama/mptable.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -45,12 +45,12 @@
                         continue;
                 }
                 cpu_flag = MPC_CPU_ENABLED;
-                if (boot_apic_id == cpu->path.u.apic.apic_id) {
+                if (boot_apic_id == cpu->path.apic.apic_id) {
                         cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
                 }
-		if(cpu->path.u.apic.apic_id == order_id) {
+		if(cpu->path.apic.apic_id == order_id) {
                     smp_write_processor(mc,
-                        cpu->path.u.apic.apic_id, apic_version,
+                        cpu->path.apic.apic_id, apic_version,
                         cpu_flag, cpu_features, cpu_feature_flags);
    	    break;
    	}
@@ -100,8 +100,8 @@
    for(dev = all_devices; dev; dev = dev->next) {
    	if (dev->path.type != DEVICE_PATH_APIC)
    		continue;
-		if (dev->path.u.apic.apic_id > max_apicid) {
-			max_apicid = dev->path.u.apic.apic_id;
+		if (dev->path.apic.apic_id > max_apicid) {
+			max_apicid = dev->path.apic.apic_id;
    	}
    }
    return max_apicid;
Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/realmode/vgabios.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -297,7 +297,7 @@
      	// check signature again
    	buf = (unsigned char *) 0xc0000;
    	if (buf[0]==0x55 && buf[1]==0xAA) {
-			busdevfn = (dev->bus->secondary << 8) | dev->path.u.pci.devfn;
+			busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
    		printk_debug("bus/devfn = %#x\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
@@ -725,7 +725,7 @@
    		// busnum is an unsigned char;
    		// devfn is an int, so we mask it off. 
    		busdevfn = (dev->bus->secondary << 8)
-				| (dev->path.u.pci.devfn & 0xff);
+				| (dev->path.pci.devfn & 0xff);
    		printk_debug("0x%x: return 0x%x\n", func, busdevfn);
    		*pebx = busdevfn;
    		retval = 0;
Modified: trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/vgabios.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/vgabios.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/mainboard/emulation/qemu-x86/vgabios.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -368,7 +368,7 @@
      	// check signature again
    	buf = (unsigned char *) 0xc0000;
    	if (buf[0]==0x55 && buf[1]==0xAA) {
-			busdevfn = (dev->bus->secondary << 8) | dev->path.u.pci.devfn;
+			busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
    		printk_debug("bus/devfn = %#x\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
@@ -725,7 +725,7 @@
    		// busnum is an unsigned char;
    		// devfn is an int, so we mask it off. 
    		busdevfn = (dev->bus->secondary << 8)
-				| (dev->path.u.pci.devfn & 0xff);
+				| (dev->path.pci.devfn & 0xff);
    		printk_debug("0x%x: return 0x%x\n", func, busdevfn);
    		*pebx = busdevfn;
    		retval = 0;
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2881/mainboard.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/tyan/s2881/mainboard.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/mainboard/tyan/s2881/mainboard.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -45,7 +45,7 @@
/* Find the ADT7463 device. */
    path.type = DEVICE_PATH_I2C;
-	path.u.i2c.device = 0x2d;
+	path.i2c.device = 0x2d;
    adt7463 = find_dev_path(smbus_dev->link, &path);
    if (!adt7463)
    	die("ADT7463 not found\n");
@@ -137,8 +137,8 @@
    root->links++;
path.type = DEVICE_PATH_PNP;
-	path.u.pnp.port = 0;
-	path.u.pnp.device = 0;
+	path.pnp.port = 0;
+	path.pnp.device = 0;
    dummy = alloc_dev(&root->link[link_i], &path);
    dummy->ops = &dummy_operations;
Modified: trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c
===================================================================
--- trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/mainboard/via/epia-m/vgabios.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -369,7 +369,7 @@
      	// check signature again
    	buf = (unsigned char *) 0xc0000;
    	if (buf[0]==0x55 && buf[1]==0xAA) {
-			busdevfn = (dev->bus->secondary << 8) | dev->path.u.pci.devfn;
+			busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
    		printk_debug("bus/devfn = %#x\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
@@ -726,7 +726,7 @@
    		// busnum is an unsigned char;
    		// devfn is an int, so we mask it off. 
    		busdevfn = (dev->bus->secondary << 8)
-				| (dev->path.u.pci.devfn & 0xff);
+				| (dev->path.pci.devfn & 0xff);
    		printk_debug("0x%x: return 0x%x\n", func, busdevfn);
    		*pebx = busdevfn;
    		retval = 0;
Modified: trunk/coreboot-v2/src/northbridge/amd/amdfam10/amdfam10_acpi.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdfam10/amdfam10_acpi.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/northbridge/amd/amdfam10/amdfam10_acpi.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -41,7 +41,7 @@
    	if (!cpu->enabled) {
    		continue;
    	}
-		current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, cpu_index, cpu->path.u.apic.apic_id);
+		current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, cpu_index, cpu->path.apic.apic_id);
    	cpu_index++;
    }
    return current;
@@ -79,8 +79,8 @@
    	if (!cpu->enabled) {
    		continue;
    	}
-		printk_debug("SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.u.apic.node_id, cpu->path.u.apic.apic_id);
-		current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.u.apic.node_id, cpu->path.u.apic.apic_id);
+		printk_debug("SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.apic_id);
+		current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.apic.node_id, cpu->path.apic.apic_id);
    	cpu_index++;
    }
    return current;
@@ -357,13 +357,13 @@
    	if (!cpu->enabled) {
    		 continue;
    	}
-		printk_debug("ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.u.apic.node_id, cpu->path.u.apic.core_id);
+		printk_debug("ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.core_id);
current	  = ( current + 0x0f) & -0x10;
    	ssdt = (acpi_header_t *)current;
    	current += ((acpi_header_t *)AmlCode_sspr)->length;
    	memcpy((void *)ssdt, (void *)AmlCode_sspr, ((acpi_header_t *)AmlCode_sspr)->length);
-		update_sspr((void*)ssdt,cpu->path.u.apic.node_id, cpu_index);
+		update_sspr((void*)ssdt,cpu->path.apic.node_id, cpu_index);
    	/* recalculate checksum */
    	ssdt->checksum = 0;
    	ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
Modified: trunk/coreboot-v2/src/northbridge/amd/amdfam10/misc_control.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdfam10/misc_control.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/northbridge/amd/amdfam10/misc_control.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -59,7 +59,7 @@
    pci_dev_read_resources(dev);
/* If we are not the first processor don't allocate the gart apeture */
-	if (dev->path.u.pci.devfn != PCI_DEVFN(CDB, 3)) {
+	if (dev->path.pci.devfn != PCI_DEVFN(CDB, 3)) {
    	return;
    }
Modified: trunk/coreboot-v2/src/northbridge/amd/amdfam10/northbridge.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdfam10/northbridge.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/northbridge/amd/amdfam10/northbridge.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -114,13 +114,13 @@
    unsigned busn;
    busn = dev->bus->secondary;
    if(busn != CBB) {
-		return (dev->path.u.pci.devfn >> 3) - CDB + 32;
+		return (dev->path.pci.devfn >> 3) - CDB + 32;
    } else {
-		return (dev->path.u.pci.devfn >> 3) - CDB;
+		return (dev->path.pci.devfn >> 3) - CDB;
    }
#else
-	return (dev->path.u.pci.devfn >> 3) - CDB;
+	return (dev->path.pci.devfn >> 3) - CDB;
 #endif
 }
@@ -1289,7 +1289,7 @@
    				printk_debug("%s\n",dev_path(dev_mc));
    				while(dev_mc){
    					printk_debug("%s move to ",dev_path(dev_mc));
-						dev_mc->path.u.pci.devfn -= PCI_DEVFN(0x18,0);
+						dev_mc->path.pci.devfn -= PCI_DEVFN(0x18,0);
    					printk_debug("%s\n",dev_path(dev_mc));
    					dev_mc = dev_mc->sibling;
    				}
@@ -1395,7 +1395,7 @@
/* Build the cpu device path */
    		cpu_path.type = DEVICE_PATH_APIC;
-			cpu_path.u.apic.apic_id = i * (nb_cfg_54?(siblings+1):1) + j * (nb_cfg_54?1:64); // ?
+			cpu_path.apic.apic_id = i * (nb_cfg_54?(siblings+1):1) + j * (nb_cfg_54?1:64); // ?
/* See if I can find the cpu */
    		cpu = find_dev_path(cpu_bus, &cpu_path);
@@ -1417,16 +1417,16 @@
/* Report what I have done */
    		if (cpu) {
-				cpu->path.u.apic.node_id = i;
-				cpu->path.u.apic.core_id = j;
+				cpu->path.apic.node_id = i;
+				cpu->path.apic.core_id = j;
    #if (ENABLE_APIC_EXT_ID == 1) && (APIC_ID_OFFSET>0)
    			 if(sysconf.enabled_apic_ext_id) {
    				if(sysconf.lift_bsp_apicid) {
-						cpu->path.u.apic.apic_id += sysconf.apicid_offset;
+						cpu->path.apic.apic_id += sysconf.apicid_offset;
    				} else
    				{
-						if (cpu->path.u.apic.apic_id != 0)
-							cpu->path.u.apic.apic_id += sysconf.apicid_offset;
+						if (cpu->path.apic.apic_id != 0)
+							cpu->path.apic.apic_id += sysconf.apicid_offset;
    				 }
    			}
    #endif
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/amdk8_acpi.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -60,7 +60,7 @@
    	if (!cpu->enabled) {
    		continue;
    	}
-		current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, cpu_index, cpu->path.u.apic.apic_id);
+		current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, cpu_index, cpu->path.apic.apic_id);
    	cpu_index++;
    }
    return current;
@@ -98,8 +98,8 @@
    	if (!cpu->enabled) {
    		continue;
    	}
-		printk_debug("SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.u.apic.node_id, cpu->path.u.apic.apic_id);
-		current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.u.apic.node_id, cpu->path.u.apic.apic_id);
+		printk_debug("SRAT: lapic cpu_index=%02x, node_id=%02x, apic_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.apic_id);
+		current += acpi_create_srat_lapic((acpi_srat_lapic_t *)current, cpu->path.apic.node_id, cpu->path.apic.apic_id);
    	cpu_index++;
    }
    return current;
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/misc_control.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/misc_control.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/misc_control.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -43,7 +43,7 @@
    pci_dev_read_resources(dev);
/* If we are not the first processor don't allocate the gart apeture */
-	if (dev->path.u.pci.devfn != PCI_DEVFN(0x18, 3)) {
+	if (dev->path.pci.devfn != PCI_DEVFN(0x18, 3)) {
    	return;
    }
@@ -162,7 +162,7 @@
    }
    else if(is_cpu_pre_d0()) {
    	uint32_t dcl;
-		f2_dev = dev_find_slot(0, dev->path.u.pci.devfn - 3 + 2);
+		f2_dev = dev_find_slot(0, dev->path.pci.devfn - 3 + 2);
    	/* Errata 98 
    	 * Set Clk Ramp Hystersis to 7
    	 * Clock Power/Timing Low
@@ -180,7 +180,7 @@
    }
 #endif
    /* Optimize the Link read pointers */
-	f0_dev = dev_find_slot(0, dev->path.u.pci.devfn - 3);
+	f0_dev = dev_find_slot(0, dev->path.pci.devfn - 3);
    if (f0_dev) {
    	int link;
    	cmd_ref = cmd = pci_read_config32(dev, 0xdc);
Modified: trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/northbridge/amd/amdk8/northbridge.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -98,7 +98,7 @@
static unsigned int amdk8_nodeid(device_t dev)
 {
-	return (dev->path.u.pci.devfn >> 3) - 0x18;
+	return (dev->path.pci.devfn >> 3) - 0x18;
 }
static unsigned int amdk8_scan_chain(device_t dev, unsigned nodeid, unsigned link, unsigned sblink, unsigned int max, unsigned offset_unitid)
@@ -1277,7 +1277,7 @@
/* Build the cpu device path */
    		cpu_path.type = DEVICE_PATH_APIC;
-			cpu_path.u.apic.apic_id = i * (nb_cfg_54?(siblings+1):1) + j * (nb_cfg_54?1:8);
+			cpu_path.apic.apic_id = i * (nb_cfg_54?(siblings+1):1) + j * (nb_cfg_54?1:8);
/* See if I can find the cpu */
    		cpu = find_dev_path(cpu_bus, &cpu_path);
@@ -1299,15 +1299,15 @@
/* Report what I have done */
    		if (cpu) {
-				cpu->path.u.apic.node_id = i;
-				cpu->path.u.apic.core_id = j;
+				cpu->path.apic.node_id = i;
+				cpu->path.apic.core_id = j;
    			if(sysconf.enabled_apic_ext_id) {
    				if(sysconf.lift_bsp_apicid) {
-						cpu->path.u.apic.apic_id += sysconf.apicid_offset;
+						cpu->path.apic.apic_id += sysconf.apicid_offset;
    				} else
    				{
-					       if (cpu->path.u.apic.apic_id != 0)
-						       cpu->path.u.apic.apic_id += sysconf.apicid_offset;
+					       if (cpu->path.apic.apic_id != 0)
+						       cpu->path.apic.apic_id += sysconf.apicid_offset;
    				}
    			}
    			printk_debug("CPU: %s %s\n",
Modified: trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/northbridge/via/cn700/vgabios.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -369,7 +369,7 @@
      	// check signature again
    	buf = (unsigned char *) 0xc0000;
    	if (buf[0]==0x55 && buf[1]==0xAA) {
-			busdevfn = (dev->bus->secondary << 8) | dev->path.u.pci.devfn;
+			busdevfn = (dev->bus->secondary << 8) | dev->path.pci.devfn;
    		printk_debug("bus/devfn = %#x\n", busdevfn);
real_mode_switch_call_vga(busdevfn);
@@ -726,7 +726,7 @@
    		// busnum is an unsigned char;
    		// devfn is an int, so we mask it off. 
    		busdevfn = (dev->bus->secondary << 8)
-				| (dev->path.u.pci.devfn & 0xff);
+				| (dev->path.pci.devfn & 0xff);
    		printk_debug("0x%x: return 0x%x\n", func, busdevfn);
    		*pebx = busdevfn;
    		retval = 0;
Modified: trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -17,17 +17,17 @@
        (bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) 
    {
    	unsigned devfn;
-		devfn = bus_dev->path.u.pci.devfn + (1 << 3);
+		devfn = bus_dev->path.pci.devfn + (1 << 3);
    	lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
-		index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
-		if (dev->path.u.pci.devfn == 2) { /* EHCI */
+		index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
+		if (dev->path.pci.devfn == 2) { /* EHCI */
    		index = 16;
    	}
    } else {
    	unsigned devfn;
-		devfn = (dev->path.u.pci.devfn) & ~7;
+		devfn = (dev->path.pci.devfn) & ~7;
    	lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
-		index = dev->path.u.pci.devfn & 7;
+		index = dev->path.pci.devfn & 7;
    }
    if ((!lpc_dev) || (index >= 17)) {
    	return;
Modified: trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_acpi.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_acpi.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/amd8111/amd8111_acpi.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -26,7 +26,7 @@
    unsigned device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
    
    return do_smbus_recv_byte(res->base, device);
@@ -37,7 +37,7 @@
    unsigned device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
return do_smbus_send_byte(res->base, device, val);
@@ -49,7 +49,7 @@
    unsigned device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
    
    return do_smbus_read_byte(res->base, device, address);
@@ -60,7 +60,7 @@
    unsigned device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
    
    return do_smbus_write_byte(res->base, device, address, val);
Modified: trunk/coreboot-v2/src/southbridge/amd/amd8131/amd8131_bridge.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/amd8131/amd8131_bridge.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/amd8131/amd8131_bridge.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -46,8 +46,8 @@
    if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
    	info->master_devices++;
    }
-	if (PCI_FUNC(dev->path.u.pci.devfn) > info->max_func) {
-		info->max_func = PCI_FUNC(dev->path.u.pci.devfn);
+	if (PCI_FUNC(dev->path.pci.devfn) > info->max_func) {
+		info->max_func = PCI_FUNC(dev->path.pci.devfn);
    }
 }
@@ -76,7 +76,7 @@
    	if (sib == dev) {
    		continue;
    	}
-		if (PCI_SLOT(sib->path.u.pci.devfn) != PCI_SLOT(dev->path.u.pci.devfn)) {
+		if (PCI_SLOT(sib->path.pci.devfn) != PCI_SLOT(dev->path.pci.devfn)) {
    		continue;
    	}
    	sib_funcs++;
Modified: trunk/coreboot-v2/src/southbridge/amd/amd8132/amd8132_bridge.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/amd8132/amd8132_bridge.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/amd8132/amd8132_bridge.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -83,8 +83,8 @@
    if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
    	info->master_devices++;
    }
-	if (PCI_FUNC(dev->path.u.pci.devfn) > info->max_func) {
-		info->max_func = PCI_FUNC(dev->path.u.pci.devfn);
+	if (PCI_FUNC(dev->path.pci.devfn) > info->max_func) {
+		info->max_func = PCI_FUNC(dev->path.pci.devfn);
    }
 }
Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/rs690/rs690.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/rs690/rs690.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -144,7 +144,7 @@
    	/* NOT REACHED */
    }
-	dev_ind = dev->path.u.pci.devfn >> 3;
+	dev_ind = dev->path.pci.devfn >> 3;
    switch (dev_ind) {
    case 0:		/* bus0, dev0, fun0; */
    	printk_info("Bus-0, Dev-0, Fun-0.\n");
Modified: trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/rs690/rs690_cmn.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -51,9 +51,9 @@
    /*get BAR3 base address for nbcfg0x1c */
    u32 addr = pci_read_config32(nb_dev, 0x1c);
    printk_debug("addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary,
-		     dev->path.u.pci.devfn);
+		     dev->path.pci.devfn);
    addr |= dev->bus->secondary << 20 |	/* bus num */
-	    dev->path.u.pci.devfn << 12 | reg;
+	    dev->path.pci.devfn << 12 | reg;
    return *((u32 *) addr);
 }
@@ -64,9 +64,9 @@
    /*get BAR3 base address for nbcfg0x1c */
    u32 addr = pci_read_config32(nb_dev, 0x1c);
    /*printk_debug("write: addr=%x,bus=%x,devfn=%x\n", addr, dev->bus->secondary,
-		     dev->path.u.pci.devfn);*/
+		     dev->path.pci.devfn);*/
    addr |= dev->bus->secondary << 20 |	/* bus num */
-	    dev->path.u.pci.devfn << 12 | reg_pos;
+	    dev->path.pci.devfn << 12 | reg_pos;
reg = reg_old = *((u32 *) addr);
    reg &= ~mask;
Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -146,13 +146,13 @@
    bus_dev = dev->bus->dev;
    if ((bus_dev->vendor == PCI_VENDOR_ID_ATI) &&
        (bus_dev->device == PCI_DEVICE_ID_ATI_SB600_PCI)) {
-		devfn = (bus_dev->path.u.pci.devfn) & ~7;
+		devfn = (bus_dev->path.pci.devfn) & ~7;
    	sm_dev = find_sm_dev(bus_dev, devfn);
    	if (!sm_dev)
    		return;
/* something under 00:01.0 */
-		switch (dev->path.u.pci.devfn) {
+		switch (dev->path.pci.devfn) {
    	case 5 << 3:
    		;
    	}
@@ -160,7 +160,7 @@
    	return;
    }
-	i = (dev->path.u.pci.devfn) & ~7;
+	i = (dev->path.pci.devfn) & ~7;
    i += (2 << 3);
    for (devfn = (0x14 << 3); devfn <= i; devfn += (1 << 3)) {
    	sm_dev = find_sm_dev(dev, devfn);
@@ -170,7 +170,7 @@
    if (!sm_dev)
    	return;
-	switch (dev->path.u.pci.devfn - (devfn - (0x14 << 3))) {
+	switch (dev->path.pci.devfn - (devfn - (0x14 << 3))) {
    case (0x12 << 3) | 0:
    	index = 8;
    	set_sm_enable_bits(sm_dev, 0xac, 1 << index,
@@ -183,7 +183,7 @@
    case (0x13 << 3) | 3:
    case (0x13 << 3) | 4:
    case (0x13 << 3) | 5:
-		index = dev->path.u.pci.devfn & 7;
+		index = dev->path.pci.devfn & 7;
    	index++;
    	index %= 6;
    	set_sm_enable_bits(sm_dev, 0x68, 1 << index,
@@ -213,7 +213,7 @@
    	break;
    case (0x14 << 3) | 5:
    case (0x14 << 3) | 6:
-		index = dev->path.u.pci.devfn & 7;
+		index = dev->path.pci.devfn & 7;
    	index -= 5;
    	set_pmio_enable_bits(sm_dev, 0x59, 1 << index,
    			     (dev->enabled ? 0 : 1) << index);
Modified: trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/amd/sb600/sb600_sm.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -302,7 +302,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x10);
@@ -316,7 +316,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x10);
@@ -330,7 +330,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x10);
@@ -344,7 +344,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x10);
Modified: trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -21,21 +21,21 @@
    	(bus_dev->device == 0x0036 )) // device under PCI-X Bridge
    {
    	unsigned devfn;
-		devfn = bus_dev->path.u.pci.devfn + (1 << 3);
+		devfn = bus_dev->path.pci.devfn + (1 << 3);
    	sb_pci_main_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
-//		index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
+//		index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
    } else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
                 (bus_dev->device == 0x0104)) // device under PCI Bridge( under PCI-X )
         {
                 unsigned devfn;
-                devfn = bus_dev->bus->dev->path.u.pci.devfn + (1 << 3);
+                devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3);
                 sb_pci_main_dev = dev_find_slot(bus_dev->bus->dev->bus->secondary, devfn);
-//                index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
+//                index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
         }
    else { // same bus
    	unsigned devfn;
    	uint32_t id;
-		devfn = (dev->path.u.pci.devfn) & ~7;
+		devfn = (dev->path.pci.devfn) & ~7;
    	if( dev->vendor == PCI_VENDOR_ID_SERVERWORKS ) { 
    		if(dev->device == 0x0036) //PCI-X Bridge
    		{ devfn += (1<<3); }
@@ -43,7 +43,7 @@
    		{ devfn -= (1<<3); }
    	}
    	sb_pci_main_dev = dev_find_slot(dev->bus->secondary, devfn);
-//		index = dev->path.u.pci.devfn & 7;
+//		index = dev->path.pci.devfn & 7;
    }
    if (!sb_pci_main_dev) {
    	return;
Modified: trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sata.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sata.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -25,7 +25,7 @@
         volatile unsigned int *mmio_reg;
    int i;
-	if(!(dev->path.u.pci.devfn & 7)) { // only set it in Func0
+	if(!(dev->path.pci.devfn & 7)) { // only set it in Func0
    	byte = pci_read_config8(dev, 0x78);
    	byte |= (1<<7);
         	pci_write_config8(dev, 0x78, byte);
Modified: trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -71,7 +71,7 @@
         struct resource *res;
    struct bus *pbus;
-        device = dev->path.u.i2c.device;
+        device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x90);
@@ -85,7 +85,7 @@
         struct resource *res;
         struct bus *pbus;
-        device = dev->path.u.i2c.device;
+        device = dev->path.i2c.device;
         pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x90);
@@ -98,7 +98,7 @@
         struct resource *res;
         struct bus *pbus;
-        device = dev->path.u.i2c.device;
+        device = dev->path.i2c.device;
         pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x90);
@@ -111,7 +111,7 @@
         struct resource *res;
         struct bus *pbus;
-        device = dev->path.u.i2c.device;
+        device = dev->path.i2c.device;
         pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x90);
Modified: trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -12,11 +12,11 @@
/* See if we are on the behind the 6300 pci bridge */
    lpc_dev = dev_find_slot(dev->bus->secondary, PCI_DEVFN(0x1f, 0));
-	if((dev->path.u.pci.devfn &0xf8)== 0xf8) {
-		index = dev->path.u.pci.devfn & 7;
+	if((dev->path.pci.devfn &0xf8)== 0xf8) {
+		index = dev->path.pci.devfn & 7;
    }
-	else if((dev->path.u.pci.devfn &0xf8)== 0xe8) {
-		index = (dev->path.u.pci.devfn & 7) +8;
+	else if((dev->path.pci.devfn &0xf8)== 0xe8) {
+		index = (dev->path.pci.devfn & 7) +8;
    }
    if ((!lpc_dev) || (index >= 16) || ((1<<index)&0x3091)) {
    	return;
Modified: trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300_smbus.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300_smbus.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/esb6300/esb6300_smbus.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -13,7 +13,7 @@
    unsigned device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(bus->dev, 0x20);
    
    return do_smbus_read_byte(res->base, device, address);
Modified: trunk/coreboot-v2/src/southbridge/intel/i3100/i3100.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i3100/i3100.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i3100/i3100.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -41,8 +41,8 @@
    lpc_dev = dev_find_slot(0x0, PCI_DEVFN(0x1f, 0x0));
    pci_write_config32(lpc_dev, 0xf0, 0xa0000000 | (1 << 0));
    disable = (volatile u32 *) 0xa0003418;
-	func = PCI_FUNC(dev->path.u.pci.devfn);
-	switch (PCI_SLOT(dev->path.u.pci.devfn)) {
+	func = PCI_FUNC(dev->path.pci.devfn);
+	switch (PCI_SLOT(dev->path.pci.devfn)) {
    case 0x1f: /* LPC (fn0), SATA (fn2), SMBus (fn3) */
    	*disable |= (1 << (func == 0x0 ? 14 : func));
    	break;
Modified: trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_smbus.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_smbus.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i3100/i3100_smbus.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -34,7 +34,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
    res = find_resource(pbus->dev, 0x20);
Modified: trunk/coreboot-v2/src/southbridge/intel/i82801ca/i82801ca.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82801ca/i82801ca.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82801ca/i82801ca.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -22,16 +22,16 @@
    //		 D31:F1, D31:F3, D31:F5, D31:F6, 
    //		 D29:F0, D29:F1, D29:F2
-    if (PCI_SLOT(dev->path.u.pci.devfn) == 31) {
-    	index = PCI_FUNC(dev->path.u.pci.devfn);
+    if (PCI_SLOT(dev->path.pci.devfn) == 31) {
+    	index = PCI_FUNC(dev->path.pci.devfn);
if ((index == 1) || (index == 3) || (index == 5) || (index == 6))
    		bHasDisableBit = 1;
-    } else if (PCI_SLOT(dev->path.u.pci.devfn) == 29) {
-    	index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
+    } else if (PCI_SLOT(dev->path.pci.devfn) == 29) {
+    	index = 8 + PCI_FUNC(dev->path.pci.devfn);
-		if (PCI_FUNC(dev->path.u.pci.devfn) < 3)
+		if (PCI_FUNC(dev->path.pci.devfn) < 3)
    		bHasDisableBit = 1;
     }
Modified: trunk/coreboot-v2/src/southbridge/intel/i82801dbm/i82801dbm.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82801dbm/i82801dbm.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82801dbm/i82801dbm.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -21,8 +21,8 @@
    //		 D31: F0, F1, F3, F5, F6, 
    //		 D29: F0, F1, F2, F7
-    if (PCI_SLOT(dev->path.u.pci.devfn) == 31) {
-    	index = PCI_FUNC(dev->path.u.pci.devfn);
+    if (PCI_SLOT(dev->path.pci.devfn) == 31) {
+    	index = PCI_FUNC(dev->path.pci.devfn);
switch (index) {
    		case 0:
@@ -40,10 +40,10 @@
    	if (index == 0)
    		index = 14;		// D31:F0 bit is an exception
-    } else if (PCI_SLOT(dev->path.u.pci.devfn) == 29) {
-    	index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
+    } else if (PCI_SLOT(dev->path.pci.devfn) == 29) {
+    	index = 8 + PCI_FUNC(dev->path.pci.devfn);
-		if ((PCI_FUNC(dev->path.u.pci.devfn) < 3) || (PCI_FUNC(dev->path.u.pci.devfn) == 7))
+		if ((PCI_FUNC(dev->path.pci.devfn) < 3) || (PCI_FUNC(dev->path.pci.devfn) == 7))
    		bHasDisableBit = 1;
     }
Modified: trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -12,11 +12,11 @@
/* See if we are behind the i82801er pci bridge */
    lpc_dev = dev_find_slot(dev->bus->secondary, PCI_DEVFN(0x1f, 0));
-	if((dev->path.u.pci.devfn &0xf8)== 0xf8) {
-		index = dev->path.u.pci.devfn & 7;
+	if((dev->path.pci.devfn &0xf8)== 0xf8) {
+		index = dev->path.pci.devfn & 7;
    }
-	else if((dev->path.u.pci.devfn &0xf8)== 0xe8) {
-		index = (dev->path.u.pci.devfn & 7) +8;
+	else if((dev->path.pci.devfn &0xf8)== 0xe8) {
+		index = (dev->path.pci.devfn & 7) +8;
    }
    if ((!lpc_dev) || (index >= 16) || ((1<<index)&0x3091)) {
    	return;
Modified: trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er_smbus.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er_smbus.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82801er/i82801er_smbus.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -13,7 +13,7 @@
    unsigned device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(bus->dev, 0x20);
    
    return do_smbus_read_byte(res->base, device, address);
Modified: trunk/coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_smbus.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_smbus.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82801gx/i82801gx_smbus.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -31,7 +31,7 @@
    u16 device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(bus->dev, 0x20);
return do_smbus_read_byte(res->base, device, address);
Modified: trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -40,10 +40,10 @@
     * exists it can be disabled. Workarounds for ICH variants that don't
     * follow this should be done by checking the device ID.
     */
-	if (PCI_SLOT(dev->path.u.pci.devfn) == 31) {
-		index = PCI_FUNC(dev->path.u.pci.devfn);
-	} else if (PCI_SLOT(dev->path.u.pci.devfn) == 29) {
-		index = 8 + PCI_FUNC(dev->path.u.pci.devfn);
+	if (PCI_SLOT(dev->path.pci.devfn) == 31) {
+		index = PCI_FUNC(dev->path.pci.devfn);
+	} else if (PCI_SLOT(dev->path.pci.devfn) == 29) {
+		index = 8 + PCI_FUNC(dev->path.pci.devfn);
    }
/* Function 0 is a bit of an exception. */
Modified: trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx_smbus.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx_smbus.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82801xx/i82801xx_smbus.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -32,7 +32,7 @@
    unsigned device;	/* TODO: u16? */
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(bus->dev, 0x20);
return do_smbus_read_byte(res->base, device, address);
Modified: trunk/coreboot-v2/src/southbridge/intel/i82870/p64h2_ioapic.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/i82870/p64h2_ioapic.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/i82870/p64h2_ioapic.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -63,8 +63,8 @@
     pWindowRegister = (volatile uint32_t*)(memoryBase + 0x10);
printk_debug("IOAPIC %d at %02x:%02x.%01x  MBAR = %x DataAddr = %x\n",
-                 apic_id, dev->bus->secondary, PCI_SLOT(dev->path.u.pci.devfn), 
-                 PCI_FUNC(dev->path.u.pci.devfn), pIndexRegister, pWindowRegister);
+                 apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), 
+                 PCI_FUNC(dev->path.pci.devfn), pIndexRegister, pWindowRegister);
apic_id <<= 24;             // Convert ID to bitmask
Modified: trunk/coreboot-v2/src/southbridge/intel/pxhd/pxhd_bridge.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/intel/pxhd/pxhd_bridge.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/intel/pxhd/pxhd_bridge.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -15,11 +15,11 @@
 {
    device_t bridge;
    uint16_t value;
-	if ((dev->path.u.pci.devfn & 1) == 0) {
+	if ((dev->path.pci.devfn & 1) == 0) {
    	/* Can we enable/disable the bridges? */
      	return;
    }
-	bridge = dev_find_slot(dev->bus->secondary, dev->path.u.pci.devfn & ~1);
+	bridge = dev_find_slot(dev->bus->secondary, dev->path.pci.devfn & ~1);
    if (!bridge) {
    	printk_err("Cannot find bridge for ioapic: %s\n",
    		   dev_path(dev));
Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -61,7 +61,7 @@
    	deviceid = dev->device;
    }
-	devfn = (dev->path.u.pci.devfn) & ~7;
+	devfn = (dev->path.pci.devfn) & ~7;
    switch (deviceid) {
    case PCI_DEVICE_ID_NVIDIA_CK804_SM:
    	index = 16;
Modified: trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_smbus.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_smbus.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/nvidia/ck804/ck804_smbus.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -20,7 +20,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
@@ -34,7 +34,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
@@ -48,7 +48,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
@@ -62,7 +62,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
Modified: trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -84,7 +84,7 @@
    	deviceid = dev->device;
    }
-	devfn = (dev->path.u.pci.devfn) & ~7;
+	devfn = (dev->path.pci.devfn) & ~7;
    switch(deviceid) {
    	case PCI_DEVICE_ID_NVIDIA_MCP55_HT:
    		return;
@@ -124,7 +124,7 @@
    	case PCI_DEVICE_ID_NVIDIA_MCP55_SATA1: //three
    		devfn -= (4<<3);
    		index = 22;
-			i = (dev->path.u.pci.devfn) & 7;
+			i = (dev->path.pci.devfn) & 7;
    		if(i>0) {
    			index -= (i+3);
    		}
Modified: trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_smbus.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_smbus.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/nvidia/mcp55/mcp55_smbus.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -38,7 +38,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
@@ -52,7 +52,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
@@ -66,7 +66,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
@@ -80,7 +80,7 @@
    struct resource *res;
    struct bus *pbus;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    pbus = get_pbus_smbus(dev);
res = find_resource(pbus->dev, 0x20 + (pbus->link * 4));
Modified: trunk/coreboot-v2/src/southbridge/ricoh/rl5c476/rl5c476.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/ricoh/rl5c476/rl5c476.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/ricoh/rl5c476/rl5c476.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -54,7 +54,7 @@
    pci_write_config16(dev,0x82,0x00a0);
/* set up second slot as compact flash port if asked to do so */
-	if( enable_cf_boot && (PCI_FUNC(dev->path.u.pci.devfn) == 1)){ 
+	if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
/* make sure isa interrupts are enabled */
    	pci_write_config16(dev,0x3e,0x0780);
@@ -154,7 +154,7 @@
    struct resource *resource;
/* for cf socket we need an extra memory window for the control structure of the cf itself */
-	if( enable_cf_boot && (PCI_FUNC(dev->path.u.pci.devfn) == 1)){ 
+	if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){ 
    	resource = new_resource(dev,1);    /* fake index as it isn't in pci config space */
    	resource->flags |= IORESOURCE_MEM ;
    	resource->size = 0x1000;
@@ -168,7 +168,7 @@
 {
    struct resource *resource;
    printk_debug("%s In set resources \n",dev_path(dev));
-	if( enable_cf_boot && (PCI_FUNC(dev->path.u.pci.devfn) == 1)){
+	if( enable_cf_boot && (PCI_FUNC(dev->path.pci.devfn) == 1)){
    	resource = find_resource(dev,1);
    	if( !(resource->flags & IORESOURCE_STORED) ){
    		resource->flags |= IORESOURCE_STORED ;
Modified: trunk/coreboot-v2/src/southbridge/sis/sis966/sis761.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/sis/sis966/sis761.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/sis/sis966/sis761.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -80,7 +80,7 @@
    pci_dev_read_resources(dev);
/* If we are not the first processor don't allocate the gart apeture */
-	if (dev->path.u.pci.devfn != PCI_DEVFN(0x0, 0)) {
+	if (dev->path.pci.devfn != PCI_DEVFN(0x0, 0)) {
    	printk_debug("sis761_not_the_first_processor !!!\n");
    	return;
    }
Modified: trunk/coreboot-v2/src/southbridge/sis/sis966/sis966.c
===================================================================
--- trunk/coreboot-v2/src/southbridge/sis/sis966/sis966.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/southbridge/sis/sis966/sis966.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -83,7 +83,7 @@
    	deviceid = dev->device;
    }
-	devfn = (dev->path.u.pci.devfn) & ~7;
+	devfn = (dev->path.pci.devfn) & ~7;
    switch(deviceid) {
    	case PCI_DEVICE_ID_SIS_SIS966_USB:
    		devfn -= (1<<3);
@@ -115,7 +115,7 @@
    	case PCI_DEVICE_ID_SIS_SIS966_SATA:
    		devfn -= (4<<3);
    		index = 22;
-			i = (dev->path.u.pci.devfn) & 7;
+			i = (dev->path.pci.devfn) & 7;
    		if(i>0) {
    			index -= (i+3);
    		}
Modified: trunk/coreboot-v2/src/superio/fintek/f71805f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/fintek/f71805f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/fintek/f71805f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -31,12 +31,12 @@
static void pnp_enter_conf_state(device_t dev) 
 {
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
static void pnp_exit_conf_state(device_t dev) 
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void f71805f_init(device_t dev)
@@ -47,7 +47,7 @@
    if (!dev->enabled)
    	return;
    
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    /* TODO: Might potentially need code for HWM or FDC etc. */
    case F71805F_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
Modified: trunk/coreboot-v2/src/superio/intel/i3100/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/intel/i3100/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/intel/i3100/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -28,14 +28,14 @@
static void pnp_enter_ext_func_mode(device_t dev)
 {
-	outb(0x80, dev->path.u.pnp.port);
-	outb(0x86, dev->path.u.pnp.port);
+	outb(0x80, dev->path.pnp.port);
+	outb(0x86, dev->path.pnp.port);
 }
static void pnp_exit_ext_func_mode(device_t dev)
 {
-	outb(0x68, dev->path.u.pnp.port);
-	outb(0x08, dev->path.u.pnp.port);
+	outb(0x68, dev->path.pnp.port);
+	outb(0x08, dev->path.pnp.port);
 }
static void i3100_init(device_t dev)
@@ -49,7 +49,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case I3100_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/ite/it8661f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8661f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/ite/it8661f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -38,7 +38,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case IT8661F_FDC: /* TODO. */
    	break;
    case IT8661F_SP1:
Modified: trunk/coreboot-v2/src/superio/ite/it8671f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8671f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/ite/it8671f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -37,7 +37,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case IT8671F_FDC: /* TODO. */
    	break;
    case IT8671F_SP1:
Modified: trunk/coreboot-v2/src/superio/ite/it8673f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8673f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/ite/it8673f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -37,7 +37,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case IT8673F_FDC: /* TODO. */
    	break;
    case IT8673F_SP1:
Modified: trunk/coreboot-v2/src/superio/ite/it8705f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8705f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/ite/it8705f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -38,7 +38,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case IT8705F_FDC: /* TODO. */
    	break;
    case IT8705F_SP1:
Modified: trunk/coreboot-v2/src/superio/ite/it8712f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8712f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/ite/it8712f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -32,14 +32,14 @@
 /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
 static void pnp_enter_ext_func_mode(device_t dev)
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x01, dev->path.u.pnp.port);
-	outb(0x55, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x01, dev->path.pnp.port);
+	outb(0x55, dev->path.pnp.port);
-	if (dev->path.u.pnp.port == 0x4e) {
-		outb(0xaa, dev->path.u.pnp.port);
+	if (dev->path.pnp.port == 0x4e) {
+		outb(0xaa, dev->path.pnp.port);
    } else {
-		outb(0x55, dev->path.u.pnp.port);
+		outb(0x55, dev->path.pnp.port);
    }
 }
@@ -59,7 +59,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case IT8712F_FDC: /* TODO. */
    	break;
    case IT8712F_SP1:
Modified: trunk/coreboot-v2/src/superio/ite/it8716f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8716f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/ite/it8716f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -35,14 +35,14 @@
 /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
 static void pnp_enter_ext_func_mode(device_t dev)
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x01, dev->path.u.pnp.port);
-	outb(0x55, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x01, dev->path.pnp.port);
+	outb(0x55, dev->path.pnp.port);
-	if (dev->path.u.pnp.port == 0x4e) {
-		outb(0xaa, dev->path.u.pnp.port);
+	if (dev->path.pnp.port == 0x4e) {
+		outb(0xaa, dev->path.pnp.port);
    } else {
-		outb(0x55, dev->path.u.pnp.port);
+		outb(0x55, dev->path.pnp.port);
    }
 }
@@ -95,7 +95,7 @@
    conf = dev->chip_info;
/* TODO: FDC, PP, KBCM, MIDI, GAME, IR. */
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case IT8716F_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/ite/it8718f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/ite/it8718f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/ite/it8718f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -37,7 +37,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case IT8718F_FDC: /* TODO. */
    	break;
    case IT8718F_SP1:
Modified: trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc8374/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -25,7 +25,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC8374_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc87309/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -36,7 +36,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case PC87309_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc87351/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -31,7 +31,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC87351_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc87360/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -25,7 +25,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC87360_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc87366/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -25,7 +25,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC87366_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc87417/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -27,7 +27,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC87417_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc87427/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -24,7 +24,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC87427_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc97307/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -18,7 +18,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC97307_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/nsc/pc97317/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -18,7 +18,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case PC97317_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/smsc/fdc37m60x/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -37,7 +37,7 @@
conf = dev->chip_info;
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case FDC37M60X_FDC: /* TODO. */
    	break;
    case FDC37M60X_PP: /* TODO. */
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/smsc/lpc47b272/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -140,7 +140,7 @@
    if (!dev->enabled)
    	return;
    
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47B272_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
@@ -171,7 +171,7 @@
 //
 static void pnp_enter_conf_state(device_t dev) 
 {
-	outb(0x55, dev->path.u.pnp.port);
+	outb(0x55, dev->path.pnp.port);
 }
//----------------------------------------------------------------------------------
@@ -182,7 +182,7 @@
 //
 static void pnp_exit_conf_state(device_t dev) 
 {
-    outb(0xaa, dev->path.u.pnp.port);
+    outb(0xaa, dev->path.pnp.port);
 }
#if 0
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/smsc/lpc47b397/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -20,10 +20,10 @@
static void pnp_enter_conf_state(device_t dev) {
-	outb(0x55, dev->path.u.pnp.port);
+	outb(0x55, dev->path.pnp.port);
 }
 static void pnp_exit_conf_state(device_t dev) {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
@@ -56,7 +56,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47B397_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
@@ -96,7 +96,7 @@
pnp_enable_resources(dev);
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47B397_HWM:
    	printk_debug("lpc47b397 SensorBus Register Access enabled\r\n");
    	pnp_set_logical_device(dev);
@@ -153,7 +153,7 @@
    struct resource *res;
    int result;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
@@ -169,7 +169,7 @@
    unsigned device;
    struct resource *res;
-	device = dev->path.u.i2c.device;
+	device = dev->path.i2c.device;
    res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
pnp_write_index(res->base+HWM_INDEX, 0, device); // why 0?
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/smsc/lpc47m10x/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -138,7 +138,7 @@
    if (!dev->enabled)
    	return;
    
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47M10X2_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
@@ -169,7 +169,7 @@
 //
 static void pnp_enter_conf_state(device_t dev) 
 {
-	outb(0x55, dev->path.u.pnp.port);
+	outb(0x55, dev->path.pnp.port);
 }
//----------------------------------------------------------------------------------
@@ -180,7 +180,7 @@
 //
 static void pnp_exit_conf_state(device_t dev) 
 {
-    outb(0xaa, dev->path.u.pnp.port);
+    outb(0xaa, dev->path.pnp.port);
 }
#if 0
Modified: trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/smsc/lpc47n217/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -158,7 +158,7 @@
    if (!dev->enabled)
    	return;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47N217_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
@@ -211,7 +211,7 @@
 {
    ASSERT(!(iobase & 0x3));
    
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47N217_PP: 
    	pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
    	break;
@@ -232,7 +232,7 @@
void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
 {
-	if (dev->path.u.pnp.device == LPC47N217_PP) {
+	if (dev->path.pnp.device == LPC47N217_PP) {
    	const uint8_t PP_DMA_MASK = 0x0F;
    	const uint8_t PP_DMA_SELECTION_REGISTER = 0x26;
    	uint8_t current_config = pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
@@ -253,7 +253,7 @@
    uint8_t current_config;
    uint8_t new_config;
    
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47N217_PP: 
    	irq_config_register = 0x27;
    	irq_config_mask = 0x0F;
@@ -289,7 +289,7 @@
    uint8_t current_power;
    uint8_t new_power;
    
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case LPC47N217_PP: 
    	power_register = 0x01;
    	power_mask = 0x04;
@@ -334,7 +334,7 @@
 //
 static void pnp_enter_conf_state(device_t dev) 
 {
-	outb(0x55, dev->path.u.pnp.port);
+	outb(0x55, dev->path.pnp.port);
 }
//----------------------------------------------------------------------------------
@@ -345,7 +345,7 @@
 //
 static void pnp_exit_conf_state(device_t dev) 
 {
-    outb(0xaa, dev->path.u.pnp.port);
+    outb(0xaa, dev->path.pnp.port);
 }
#if 0
Modified: trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -143,7 +143,7 @@
  */
 static inline void smsc_pnp_enter_conf_state(device_t dev)
 {
-	outb(0x55, dev->path.u.pnp.port);
+	outb(0x55, dev->path.pnp.port);
 }
/**
@@ -155,7 +155,7 @@
  */
 static inline void smsc_pnp_exit_conf_state(device_t dev)
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
/** Wrapper for pnp_set_resources(). */
@@ -213,7 +213,7 @@
    	return;
/* A Super I/O was found, so initialize the respective device. */
-	ld = dev->path.u.pnp.device;
+	ld = dev->path.pnp.device;
    if (ld == logical_device_table[i].devs[LD_SP1]) {
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c
===================================================================
--- trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/via/vt1211/vt1211.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -50,19 +50,19 @@
static void pnp_enter_ext_func_mode(device_t dev) 
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
static void pnp_exit_ext_func_mode(device_t dev) 
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void vt1211_set_iobase(device_t dev, unsigned index, unsigned iobase)
 {
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    	case VT1211_FDC:
    	case VT1211_PP:
    	case VT1211_SP1:
@@ -98,7 +98,7 @@
    	return;
    }
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case VT1211_FDC:
    case VT1211_PP:
    	break;
@@ -135,7 +135,7 @@
    struct resource *resource;
#if CONFIG_CONSOLE_SERIAL8250 == 1
-	if( dev->path.u.pnp.device == 2 ){
+	if( dev->path.pnp.device == 2 ){
    	for( i = 0 ; i < dev->resources; i++){
    		resource = &dev->resource[i];
    		resource->flags |= IORESOURCE_STORED;
Modified: trunk/coreboot-v2/src/superio/winbond/w83627dhg/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83627dhg/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83627dhg/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -28,13 +28,13 @@
static void pnp_enter_ext_func_mode(device_t dev)
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
static void pnp_exit_ext_func_mode(device_t dev)
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void w83627dhg_init(device_t dev)
@@ -47,7 +47,7 @@
conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83627DHG_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83627ehg/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -36,13 +36,13 @@
static void pnp_enter_ext_func_mode(device_t dev)
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
static void pnp_exit_ext_func_mode(device_t dev)
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
@@ -73,7 +73,7 @@
get_option(&power_on, "power_on_after_fail");
    pnp_enter_ext_func_mode(dev);
-	pnp_write_index(dev->path.u.pnp.port, 7, 0x0a);
+	pnp_write_index(dev->path.pnp.port, 7, 0x0a);
    value = pnp_read_config(dev, 0xe4);
    value &= ~(3 << 5);
    if (power_on) {
@@ -112,7 +112,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83627EHG_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
@@ -149,7 +149,7 @@
    pnp_enter_ext_func_mode(dev);
    pnp_enable_resources(dev);
-	switch (dev->path.u.pnp.device) {
+	switch (dev->path.pnp.device) {
    case W83627EHG_HWM:
    	printk_debug("w83627ehg hwm smbus enabled\n");
    	enable_hwm_smbus(dev);
Modified: trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83627hf/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -20,12 +20,12 @@
static void pnp_enter_ext_func_mode(device_t dev)
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
 static void pnp_exit_ext_func_mode(device_t dev)
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
@@ -56,7 +56,7 @@
get_option(&power_on, "power_on_after_fail");
    pnp_enter_ext_func_mode(dev);
-	pnp_write_index(dev->path.u.pnp.port,7,0x0a);
+	pnp_write_index(dev->path.pnp.port,7,0x0a);
    value = pnp_read_config(dev, 0xE4);
    value &= ~(3<<5);
    if(power_on) {
@@ -104,7 +104,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83627HF_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
@@ -141,7 +141,7 @@
 {
    pnp_enter_ext_func_mode(dev);
    pnp_enable_resources(dev);
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83627HF_HWM:
    	printk_debug("w83627hf hwm smbus enabled\n");
    	enable_hwm_smbus(dev);
Modified: trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83627thf/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -18,12 +18,12 @@
static void w83627thf_enter_ext_func_mode(device_t dev) 
 {
-        outb(0x87, dev->path.u.pnp.port);
-        outb(0x87, dev->path.u.pnp.port);
+        outb(0x87, dev->path.pnp.port);
+        outb(0x87, dev->path.pnp.port);
 }
 static void w83627thf_exit_ext_func_mode(device_t dev) 
 {
-        outb(0xaa, dev->path.u.pnp.port);
+        outb(0xaa, dev->path.pnp.port);
 }
static void w83627thf_init(device_t dev)
@@ -37,7 +37,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83627THF_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/winbond/w83627thg/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83627thg/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83627thg/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -17,12 +17,12 @@
static void w83627thg_enter_ext_func_mode(device_t dev) 
 {
-        outb(0x87, dev->path.u.pnp.port);
-        outb(0x87, dev->path.u.pnp.port);
+        outb(0x87, dev->path.pnp.port);
+        outb(0x87, dev->path.pnp.port);
 }
 static void w83627thg_exit_ext_func_mode(device_t dev) 
 {
-        outb(0xaa, dev->path.u.pnp.port);
+        outb(0xaa, dev->path.pnp.port);
 }
static void w83627thg_init(device_t dev)
@@ -36,7 +36,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83627THG_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/winbond/w83627uhg/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83627uhg/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83627uhg/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -33,13 +33,13 @@
static void w83627uhg_enter_ext_func_mode(device_t dev)
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
static void w83627uhg_exit_ext_func_mode(device_t dev)
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
/*
@@ -79,7 +79,7 @@
    	return;
conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83627UHG_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	/* set_uart_clock_source(dev, 0); */
Modified: trunk/coreboot-v2/src/superio/winbond/w83697hf/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83697hf/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83697hf/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -32,13 +32,13 @@
static void pnp_enter_ext_func_mode(device_t dev)
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
static void pnp_exit_ext_func_mode(device_t dev)
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void w83697hf_init(device_t dev)
@@ -50,7 +50,7 @@
    	return;
conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83697HF_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83977f/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -32,12 +32,12 @@
static void w83977f_enter_ext_func_mode(device_t dev) 
 {
-	outb(0x87, dev->path.u.pnp.port);
-	outb(0x87, dev->path.u.pnp.port);
+	outb(0x87, dev->path.pnp.port);
+	outb(0x87, dev->path.pnp.port);
 }
 static void w83977f_exit_ext_func_mode(device_t dev) 
 {
-	outb(0xaa, dev->path.u.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
static void w83977f_init(device_t dev)
@@ -49,7 +49,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83977F_SP1:
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/src/superio/winbond/w83977tf/superio.c	2009-02-28 20:10:20 UTC (rev 3964)
@@ -25,12 +25,12 @@
static void w83977tf_enter_ext_func_mode(device_t dev) 
 {
-        outb(0x87, dev->path.u.pnp.port);
-        outb(0x87, dev->path.u.pnp.port);
+        outb(0x87, dev->path.pnp.port);
+        outb(0x87, dev->path.pnp.port);
 }
 static void w83977tf_exit_ext_func_mode(device_t dev) 
 {
-        outb(0xaa, dev->path.u.pnp.port);
+        outb(0xaa, dev->path.pnp.port);
 }
static void w83977tf_init(device_t dev)
@@ -44,7 +44,7 @@
    	return;
    }
    conf = dev->chip_info;
-	switch(dev->path.u.pnp.device) {
+	switch(dev->path.pnp.device) {
    case W83977TF_SP1: 
    	res0 = find_resource(dev, PNP_IDX_IO0);
    	init_uart8250(res0->base, &conf->com1);
Modified: trunk/coreboot-v2/util/newconfig/config.g
===================================================================
--- trunk/coreboot-v2/util/newconfig/config.g	2009-02-28 17:19:55 UTC (rev 3963)
+++ trunk/coreboot-v2/util/newconfig/config.g	2009-02-28 20:10:20 UTC (rev 3964)
@@ -93,6 +93,7 @@
    dict = 4
    statement = 5
    dump = 6
+	gengraph = 7
def __init__(self, *level):
    	self.__level = level
@@ -108,7 +109,8 @@
    		print str
global debug
-debug = debug_info(debug_info.none)
+debug = debug_info(debug_info.dumptree)
+debug = debug_info(debug_info.object)
# -----------------------------------------------------------------------------
 #                    Error Handling
@@ -703,6 +705,18 @@
    	else:
    		name = "%s %s" % (name, self.path)
    	return name
+
+	def graph_name(self):
+		name = "{ {_dev%d|" % self.instance
+		if (self.part):
+			name = "%s%s" % (name, self.part)
+		else:
+			name = "%s%s" % (name, self.chip_or_device)
+		if (self.type_name):
+			name = "%s}|%s}" % (name, self.type_name)
+		else:
+			name = "%s}|%s}" % (name, self.parent.type_name)
+		return name
    		
    def dumpme(self, lvl):
    	"""Dump information about this part for debugging"""
@@ -938,7 +952,7 @@
    		fatal("Invalid device id")
    	if ((function < 0) or (function > 7)):
    		fatal("Invalid pci function %s" % function )
-		self.set_path(".type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x%x,%d)}}" % (slot, function))
+		self.set_path(".type=DEVICE_PATH_PCI,{.pci={ .devfn = PCI_DEVFN(0x%x,%d)}}" % (slot, function))
def addpnppath(self, port, device):
    	""" Add a relative path to a pnp device hanging off our parent """
@@ -946,44 +960,44 @@
    		fatal("Invalid port")
    	if ((device < 0) or (device > 0xffff)):
    		fatal("Invalid device")
-		self.set_path(".type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x%x, .device = 0x%x }}" % (port, device))
+		self.set_path(".type=DEVICE_PATH_PNP,{.pnp={ .port = 0x%x, .device = 0x%x }}" % (port, device))
    	
    def addi2cpath(self, device):
    	""" Add a relative path to a i2c device hanging off our parent """
    	if ((device < 0) or (device > 0x7f)):
    		fatal("Invalid device")
-		self.set_path(".type=DEVICE_PATH_I2C,.u={.i2c={ .device = 0x%x }}" % (device))
+		self.set_path(".type=DEVICE_PATH_I2C,{.i2c={ .device = 0x%x }}" % (device))
def addapicpath(self, apic_id):
    	""" Add a relative path to a cpu device hanging off our parent """
    	if ((apic_id < 0) or (apic_id > 255)):
    		fatal("Invalid device")
-		self.set_path(".type=DEVICE_PATH_APIC,.u={.apic={ .apic_id = 0x%x }}" % (apic_id))
+		self.set_path(".type=DEVICE_PATH_APIC,{.apic={ .apic_id = 0x%x }}" % (apic_id))
def addpci_domainpath(self, pci_domain):
    	""" Add a pci_domain number to a chip """
    	if ((pci_domain < 0) or (pci_domain > 0xffff)):
    		fatal("Invalid pci_domain: 0x%x is out of the range 0 to 0xffff" % pci_domain)
-		self.set_path(".type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x%x }}" % (pci_domain))
+		self.set_path(".type=DEVICE_PATH_PCI_DOMAIN,{.pci_domain={ .domain = 0x%x }}" % (pci_domain))
def addapic_clusterpath(self, cluster):
    	""" Add an apic cluster to a chip """
    	if ((cluster < 0) or (cluster > 15)):
    		fatal("Invalid apic cluster: %d is out of the range 0 to ff" % cluster)
-		self.set_path(".type=DEVICE_PATH_APIC_CLUSTER,.u={.apic_cluster={ .cluster = 0x%x }}" % (cluster))
+		self.set_path(".type=DEVICE_PATH_APIC_CLUSTER,{.apic_cluster={ .cluster = 0x%x }}" % (cluster))
def addcpupath(self, cpu_id):
    	""" Add a relative path to a cpu device hanging off our parent """
    	if ((cpu_id < 0) or (cpu_id > 255)):
    		fatal("Invalid device")
-		self.set_path(".type=DEVICE_PATH_CPU,.u={.cpu={ .id = 0x%x }}" % (cpu_id))
+		self.set_path(".type=DEVICE_PATH_CPU,{.cpu={ .id = 0x%x }}" % (cpu_id))
def addcpu_buspath(self, id):
    	""" Add a cpu_bus to a chip """
    	if ((id < 0) or (id > 255)):
    		fatal("Invalid device")
-		self.set_path(".type=DEVICE_PATH_CPU_BUS,.u={.cpu_bus={ .id = 0x%x }}" % (id))
+		self.set_path(".type=DEVICE_PATH_CPU_BUS,{.cpu_bus={ .id = 0x%x }}" % (id))
def usesoption(self, name):
    	"""Declare option that can be used by this part"""
@@ -1011,6 +1025,8 @@
def setdict(dict, name, value):
    debug.info(debug.dict, "setdict sets %s to %s" % (name, value))
+	if name in dict.keys():
+		print "Duplicate in dict: %s" % name
    dict[name] = value
# options. 
@@ -2310,7 +2326,9 @@
    file.write("#include <device/pci.h>\n")
    for path in image.getconfigincludes().values():
    	file.write("#include "%s"\n" % path)
+	file.write("\n/* pass 0 */\n")
    gencode(image.getroot(), file, 0)
+	file.write("\n/* pass 1 */\n")
    gencode(image.getroot(), file, 1)
    file.close()
@@ -2334,6 +2352,75 @@
    	kid = kid.next_sibling
    debug.info(debug.gencode, "DONE GENCODE")
+def writegraph(image):
+	filename = os.path.join(img_dir, "static.dot")
+	print "Creating", filename
+	file = safe_open(filename, 'w+')
+	file.write("digraph devicetree {\n")
+	file.write("	rankdir=LR\n")
+	genranks(image.getroot(), file, 0)
+	gennodes(image.getroot(), file)
+	gengraph(image.getroot(), file)
+	file.write("}\n")
+	file.close()
+
+def genranks(part, file, level):
+	#file.write("	# Level %d\n" % level )
+	file.write("	{ rank = same; "dev_%s_%d"" % (part.type_name,part.instance ))
+	sib = part.next_sibling
+	while (sib):
+		file.write("; "dev_%s_%d"" % (sib.type_name, sib.instance))
+		sib = sib.next_sibling
+	file.write("}\n" )
+	# now dump the children 
+	if (part.children):
+		genranks(part.children, file, level + 1)
+
+	kid = part.next_sibling
+	while (kid):
+		if (kid.children):
+			genranks(kid.children, file, level + 1)
+		kid = kid.next_sibling
+
+
+def gennodes(part, file):
+	file.write("	dev_%s_%d[shape=record, label="%s"];\n" % (part.type_name,part.instance,part.graph_name() ))
+	sib = part.next_sibling
+	while (sib):
+		file.write("	dev_%s_%d[shape=record, label="%s"];\n" % (sib.type_name,sib.instance,sib.graph_name() ))
+		sib = sib.next_sibling
+	# now dump the children
+	if (part.children):
+		gennodes(part.children, file)
+
+	kid = part.next_sibling
+	while (kid):
+		if (kid.children):
+			gennodes(kid.children, file)
+		kid = kid.next_sibling
+
+
+def gengraph(part, file):
+	if (part.parent != part):
+		file.write("	dev_%s_%d -> dev_%s_%d;\n" % \
+				(part.parent.type_name, part.parent.instance, \
+				 part.type_name, part.instance ))
+	sib = part.next_sibling
+	while (sib):
+		file.write("	dev_%s_%d -> dev_%s_%d;\n" % \
+				(sib.parent.type_name, sib.parent.instance, \
+				 sib.type_name, sib.instance ))
+		sib = sib.next_sibling
+
+	kid = part.next_sibling
+	while (kid):
+		if (kid.children):
+			gengraph(kid.children, file)
+		kid = kid.next_sibling
+
+	if (part.children):
+		gengraph(part.children, file)
+
 def verifyparse():
    """Add any run-time checks to verify that parsing the configuration
    was successful"""
@@ -2423,6 +2510,7 @@
    	writeinitincludes(image)
    	writeimagemakefile(image)
    	writeldoptions(image)
+		writegraph(image)
writemakefilesettings(target_dir)
    writemakefile(target_dir)

    