Been playing with this board and have ran into a weird problem. I cant get a PS2 keyboard to work with this motherboard under coreboot. Ive used direct PS2 keyboard connections, Ive used PS2 splitters and PS2 KVMs and none work. PS2 init as an option is present and selected in the coreboot config (CONFIG_DRIVERS_PS2_KEYBOARD=y)
Im using current master of coreboot, and have tried the keyboard via the PS2 port in multiple permutations of direct connect, with splitter and also via KVM. None of which work. Ive tried with different payloads including coreinfo and seabios, none of which work.
This is proving to be a challenge as im trying to make this board the first port of a desktop board to heads firmware. Its worked well so far, the only sticking point is the PS2 keyboard functionality. USB keyboard is not really an option when using heads+qubes.
I cant find any refernece to ps2 or 8042 in the serial console, until the SeaBIOS payload takes over. That displays the following;
Found 1 ltp ports
Found 1 serial ports
Got ps2 nak (status=51)
Does anyone have any thoughts or pointers?
Cheers
Santity check;
PS2 keyboard, connected directly to PS2 port, works fine with stock ASUS firmware.
On 10/05/2019 00:20, Simon Newton wrote:
Strangely, the solution to this problem is to tell coreboot to *not* handle the PS2 init and leave it to the payload.
using value
CONFIG_DRVIER_PS2_KEYBOARD is not set
results in the ps2 keyboard working fine when the payload init's it.
I checked devicetree and the mappings look correct from the ioport dump and superio dump, so unsure of why the coreboot init would cause this problem, but the solution seems to be "let the payload handle it"
Cheers Simon
On 10/05/2019 00:38, Simon Newton wrote:
Hello,
Sorry for the late reply, I've been unable to answer earlier.
On Fri, May 10, 2019, 17:31 Simon Newton simon@simonnewton.com wrote:
Yes, the keyboard only needs to be initialized once. Only if the payload does not do PS/2 init then coreboot should do it. I've never needed to tell coreboot to init PS/2 on my boards when using SeaBIOS because of that.
I checked devicetree and the mappings look correct from the ioport dump
and superio dump, so unsure of why the coreboot init would cause this problem, but the solution seems to be "let the payload handle it"
Cheers Simon
Best regards,
Angel Pons
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Angel Pons -
Simon Newton