Hi,
there is a new project up for the Artec Dongle II firmware/software development on opencores.org
http://www.opencores.org/projects.cgi/web/artec_dongle_ii_fpga/overview
with it's DONE and TODO lists (the later is grater at the moment) so all the help is welcome.
All the best, Jüri Toomessoo
jyrit wrote:
http://www.opencores.org/projects.cgi/web/artec_dongle_ii_fpga/overview
Not so impressed with the (lack of) hardware improvements. :\
The rotary encoder is a nice touch.
If you can find an archive of the milksop firmware maybe it has a bus arbiter, I don't remember, but it did do very similar things.
//Peter
Peter Stuge <peter <at> stuge.se> writes:
Not so impressed with the (lack of) hardware improvements. :\
There is actually lot of thought put in into the hardware to get all the requested features with small changes. The write time of 4 MByte image to added PSRAM is now 4 sec. (using the same FTDI chip this prob. can be reduced to about 2 sec. with VHDL tweaks). The "BitBang" mode of the FTDI chip makes it possible to update the firmware without any need for ByteBlaster cable. There is UltraCap so that the PSRAM retains it's image up to 2 hours. :)
There is automatic power switch now. There is EPROM to make it possible to remove the physical jumpers. There are SMD leds
Cyclone III has faster up time than Cyclone I but it still might not be fast enough. On the other hand there is the existing updater code that can be reused and Cyclone III is cheaper than Actel FPGA's and there are other reasons why we went with Cyclone III.
That's all that was on the Santa's list for Peter :D
All the best, Santa