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Hello all,
First, I want to thank everybody involved in coreboot for making it possible.
I started porting coreboot code to the ASUS K8V-X SE Motherboard. It uses a Socket 754, with the VIA K8T800 / VT8237R southbridge combination, and Winbond W83627EHF SuperIO.
I took the K8T890 code, adapted the PCI ID's, and removed the PCIe code for the southbridge. The VT8237R is already supported (Yay!), and looking at the datasheet, The SuperIO is almost identical (I couldn't find any difference)to the already supported W83627EHG.
I took the mainboard code for the ASUS A8V-E SE as the starting point.
It mostly works, except for an issue with initializing the PNP: 002e.207 device, which is (should be) the MIDI port, according to the datasheet and superiotool. The initialization code reaches pnp_get_ioresource() in src/devices/pnp_device.c, to the following point:
/* Find the first bit that moves. */ while ((moving & step) == 0) { gran--; step >>= 1; }
I put some printk's before the block, and the entering values are: moving = 0, and step = 32768; this leads to an infinite loop.
Is there an underlying assumption that moving will never be zero, or is it safe to change the following to:
/* Find the first bit that moves. */ while ((moving & step) == 0) { gran--; step >>= 1; if(step == 0) break; }
If I do something like this, I can get SeaBIOS to load (but not boot yet).
It might be that I'm doing something terribly wrong earlier on; therefore, if you need to look at the K8T800 or motherboard code, I can create a patch against the last svn commit (I'm curently developing over r6247).
Alex G.