Hello,
I try to make biostar m6tld running, and created patch for 440lx using 440bx code as template. Patch in attachment
Best regards Maciej
It looks fine to me, although I think you can drop the Config.lb.
Acked-by: Ronald G. Minnich rminnich@gmail.com
On Fri, 27 Nov 2009, ron minnich wrote:
It looks fine to me, although I think you can drop the Config.lb.
I left it because many other targets have it too.
Acked-by: Ronald G. Minnich rminnich@gmail.com
I noticed that i forgot to add
Signed-off by: Maciej Pijanka maciej.pijanka@gmail.com
ps. If noone else see serious problems with this patch/code and have commit rights please commit.
Maciej
Maciej Pijanka wrote:
Hello,
I try to make biostar m6tld running, and created patch for 440lx using 440bx code as template. Patch in attachment
Best regards Maciej
Awesome! Committed as r4967... Do you have a mainboard patch to go with it, too?
When you say "try" what was / is the problem?
All the best
Stefan
On Sat, 28 Nov 2009, Stefan Reinauer wrote:
Maciej Pijanka wrote:
Hello,
I try to make biostar m6tld running, and created patch for 440lx using 440bx code as template. Patch in attachment
Best regards Maciej
Awesome! Committed as r4967... Do you have a mainboard patch to go with it, too?
For some quality of patch, yes, but board dies around loading payload, and i did not have enough time so far to debug, last attempt stuck when coreboot at machine showed me gdb beacon.
When you say "try" what was / is the problem?
I am not sure if all code is correct, and there are few missing parts, ie cas latency is hard coded to 3, agp is disabled (and i failed to find why i cant change APBASE), also i have weird problem with reading/writing on this machine with read_config16/write_config16 because they return incorrect data. I mean register *is* 16bit accessible, (it was DRT iirc), but two 8bit reads glued with shift and or give other result than 16bit read, but i don't have log with output of 16bit read on hand right now.
Maciej
On Sat, Nov 28, 2009 at 2:30 AM, Maciej Pijanka maciej.pijanka@gmail.com wrote:
I mean register *is* 16bit accessible, (it was DRT iirc), but two 8bit reads glued with shift and or give other result than 16bit read, but i don't have log with output of 16bit read on hand right now.
There are weird cases where 8 bit accesses go to "a different place" than a wider access. The first one that comes to mind is using cf8 for pci config accesses but cf9 to reset the machine.
ron