Patch set updated for coreboot: 5efd84c in vt8237r_enable(), write function enables only to ISA bridge config space

[Florian Zumbiehl]

Florian Zumbiehl just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/368

-gerrit

commit 5efd84c282f8f82ab562577c9efbb78c21a0e799
Author: Florian Zumbiehl 
Date:   Tue Nov 1 20:16:16 2011 +0100

in vt8237r_enable(), write function enables only to ISA bridge config space

vt8237r_enable() so far wrote the function enable values to the same
    offset in the config space of every one of the vt8237's functions,
    even though the register is located in the ISA bridge only.

Change-Id: I639586dc238132f5b8d2f320b794948718281b9c
    Signed-off-by: Florian Zumbiehl 
---
 src/southbridge/via/vt8237r/vt8237r.c |   14 ++++++++++++--
 1 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index 5ba3815..586df66 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -66,11 +66,21 @@ void dump_south(device_t dev)

static void vt8237r_enable(struct device *dev)
 {
+	u16 vid, did;
    struct southbridge_via_vt8237r_config *sb =
        (struct southbridge_via_vt8237r_config *)dev->chip_info;

-	pci_write_config8(dev, 0x50, sb->fn_ctrl_lo);
-	pci_write_config8(dev, 0x51, sb->fn_ctrl_hi);
+	if (dev->path.type == DEVICE_PATH_PCI) {
+		vid = pci_read_config16(dev, PCI_VENDOR_ID);
+		did = pci_read_config16(dev, PCI_DEVICE_ID);
+		if (vid == PCI_VENDOR_ID_VIA &&
+			(did == PCI_DEVICE_ID_VIA_VT8237R_LPC ||
+			 did == PCI_DEVICE_ID_VIA_VT8237A_LPC ||
+			 did == PCI_DEVICE_ID_VIA_VT8237S_LPC)) {
+			pci_write_config8(dev, 0x50, sb->fn_ctrl_lo);
+			pci_write_config8(dev, 0x51, sb->fn_ctrl_hi);
+		}
+	}

/* TODO: If SATA is disabled, move IDE to fn0 to conform PCI specs. */
 }