Patch set updated for coreboot: 80fbf23 i82801gx: Use CMOS variable if available for power-on on power failure

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/443

-gerrit

commit 80fbf232709d8a95fda8f58de9aa3305600dd7b4
Author: Patrick Georgi 
Date:   Tue Nov 22 10:28:46 2011 +0100

i82801gx: Use CMOS variable if available for power-on on power failure

We used a hard coded value for some reason. Don't do that, but use CMOS
    instead.

Change-Id: Ib83aa07a3e55bed075150354a060317ebc9d5ba7
    Signed-off-by: Patrick Georgi 
---
 src/southbridge/intel/i82801gx/smihandler.c |   12 ++++++++----
 1 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 48375e4..5cc25e7 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -279,12 +279,16 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
    u8 reg8;
    u32 reg32;
    u8 slp_typ;
-	/* FIXME: the power state on boot should be read from
-	 * CMOS or even better from GNVS. Right now it's hard
-	 * coded at compile time.
-	 */
    u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;

+	// save and recover RTC port values
+	u8 tmp70, tmp72;
+	tmp70 = inb(0x70);
+	tmp72 = inb(0x72);
+	get_option(&s5pwr, "power_on_after_fail");
+	outb(tmp70, 0x70);
+	outb(tmp72, 0x72);
+
    /* First, disable further SMIs */
    reg8 = inb(pmbase + SMI_EN);
    reg8 &= ~SLP_SMI_EN;