Dear coreboot readers!
This is the automatic build system of coreboot.
The developer "oxygene" checked in revision 5898 to the coreboot repository. This caused the following changes:
Change Log: Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig, rename it slightly, make it visible only on relevant northbridges, drop it entirely from via boards (as they seem to have picked it up from AMD code without using it themselves), and make it default to false for all boards.
Some romstages used to set this to "true" (ie. "print debug output"), but I didn't follow up on it in Kconfig - if you need it to debug CAR, enable it yourself.
Signed-off-by: Patrick Georgi patrick.georgi@coresystems.de Acked-by: Peter Stuge peter@stuge.se
Build Log: Compilation of digitallogic:adl855pc is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5898&device=adl855pc&am... Compilation of intel:d810e2cb is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5898&device=d810e2cb&am... Compilation of lanner:em8510 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5898&device=em8510&... Compilation of rca:rm4100 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5898&device=rm4100&... Compilation of thomson:ip1000 is still broken See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=5898&device=ip1000&...
If something broke during this checkin please be a pain in oxygene's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should be backed out.
Best regards, coreboot automatic build system
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