答复: Cache On and ECC clear

[YhLu]

Eric,

I verified the exchange the cpufixup after the cache_on...mtrr_check in cpu.
c for S2882.

Found one interesting thing
1. In fallback mode, it does not pause after "Clearing LinuxBIOS memory "
and "Copying LinuxBIOS to ram".
2. In normal node, it does pause after the "Clearing" and "Copying" ( 5s and
4s).

What could cause that?

Regards

YH
-----邮件原件-----
发件人: ron minnich [mailto:[e-mail]] 
发送时间: 2004年3月28日 21:03
收件人: Eric W. Biederman
抄送: Li-Ta Lo; LinuxBIOS
主题: Re: Cache On and ECC clear

On 28 Mar 2004, Eric W. Biederman wrote:
> But please break it out into it's own separate inline function.
>
> It has two very strong requirements.
> That we never trigger a hardware read on the addresses were are

clearing
> before we have triggered a hardware write.  The fact I setup the area
>    as uncached but write-combining ensures this.
> 2) That this code runs very fast.  It needs to be able to run at 6.4GB/s
>    when you have dual channel PC3200 DDR installed.  This is one of the
>    reasons we run it on a per cpu basis.  The loop can only run at 4.0GB/s
>    from the other cpu.

ok, if it stays assembly this explanation will be put in with it.

ron

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YhLu  writes:
> Eric,
>
> I verified the exchange the cpufixup after the cache_on...mtrr_check in cpu.
> c for S2882.
>
> Found one interesting thing
> In fallback mode, it does not pause after "Clearing LinuxBIOS memory "
>
> and "Copying LinuxBIOS to ram".
> 2. In normal node, it does pause after the "Clearing" and "Copying" ( 5s and
> 4s).
>
> What could cause that?

So we are talking about quantities all within the first 1MB of ram...

This sounds like something is goofy with the mtrrs.  At least that
is the usual suspect when something is running slowly.

Eric