New patch to review for coreboot: 1d41941 Define uma_memory_base and uma_memory_size just once
Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1204
-gerrit
commit 1d419416ad63b40b73ff6b724f3d35963fbd73d7 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Tue Jul 10 14:54:17 2012 +0300
Define uma_memory_base and uma_memory_size just once
Use of the variables is very scattered. It may be possible to get rid of these two globals with a follow-up.
Change-Id: I07ccd98c55a6bcaa8294ad9704b88d7afb341456 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/cpu/amd/mtrr/amd_mtrr.c | 4 ---- src/cpu/x86/mtrr/mtrr.c | 4 ---- src/devices/device.c | 5 +++++ src/include/device/device.h | 4 ++++ src/mainboard/advansus/a785e-i/mainboard.c | 1 - src/mainboard/amd/bimini_fam10/mainboard.c | 1 - src/mainboard/amd/dbm690t/mainboard.c | 1 - src/mainboard/amd/dinar/mainboard.c | 1 - src/mainboard/amd/inagua/mainboard.c | 1 - src/mainboard/amd/mahogany/mainboard.c | 2 -- src/mainboard/amd/mahogany_fam10/mainboard.c | 2 -- src/mainboard/amd/persimmon/mainboard.c | 1 - src/mainboard/amd/pistachio/mainboard.c | 1 - src/mainboard/amd/south_station/mainboard.c | 1 - src/mainboard/amd/tilapia_fam10/mainboard.c | 2 -- src/mainboard/amd/torpedo/mainboard.c | 1 - src/mainboard/amd/union_station/mainboard.c | 1 - src/mainboard/asrock/939a785gmh/mainboard.c | 2 -- src/mainboard/asrock/e350m1/mainboard.c | 1 - src/mainboard/asus/m2v-mx_se/mainboard.c | 4 ---- src/mainboard/asus/m4a78-em/mainboard.c | 2 -- src/mainboard/asus/m4a785-m/mainboard.c | 2 -- src/mainboard/asus/m5a88-v/mainboard.c | 1 - src/mainboard/avalue/eax-785e/mainboard.c | 1 - src/mainboard/gigabyte/ma785gm/mainboard.c | 2 -- src/mainboard/gigabyte/ma785gmt/mainboard.c | 2 -- src/mainboard/gigabyte/ma78gm/mainboard.c | 2 -- src/mainboard/iei/kino-780am2-fam10/mainboard.c | 2 -- src/mainboard/jetway/pa78vm5/mainboard.c | 2 -- src/mainboard/kontron/kt690/mainboard.c | 1 - src/mainboard/siemens/sitemp_g1p1/mainboard.c | 1 - src/mainboard/technexion/tim5690/mainboard.c | 1 - src/mainboard/technexion/tim8690/mainboard.c | 1 - src/northbridge/amd/agesa/family10/northbridge.c | 4 ---- src/northbridge/amd/agesa/family12/northbridge.c | 4 ---- src/northbridge/amd/agesa/family14/northbridge.c | 4 ---- src/northbridge/amd/agesa/family15/northbridge.c | 4 ---- src/northbridge/amd/agesa/family15tn/northbridge.c | 4 ---- src/northbridge/amd/amdfam10/northbridge.c | 4 ---- src/northbridge/amd/amdk8/northbridge.c | 4 ---- src/northbridge/intel/i82810/northbridge.c | 3 --- src/northbridge/intel/i82830/northbridge.c | 3 --- src/northbridge/intel/i945/northbridge.c | 3 --- src/northbridge/intel/sandybridge/northbridge.c | 3 --- src/northbridge/intel/sch/northbridge.c | 3 --- src/southbridge/amd/rs690/cmn.c | 2 -- src/southbridge/amd/rs780/cmn.c | 2 -- src/southbridge/amd/rs780/gfx.c | 2 -- src/southbridge/amd/rs780/rs780.c | 1 - src/southbridge/via/k8t890/dram.c | 4 ---- 50 files changed, 9 insertions(+), 105 deletions(-)
diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c index 5c48cfd..7fabb44 100644 --- a/src/cpu/amd/mtrr/amd_mtrr.c +++ b/src/cpu/amd/mtrr/amd_mtrr.c @@ -6,10 +6,6 @@ #include <cpu/x86/cache.h> #include <cpu/x86/msr.h>
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_size; -#endif - static unsigned long resk(uint64_t value) { unsigned long resultk; diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index f8b2591..851c8c4 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -40,10 +40,6 @@ #include <arch/cpu.h> #include <arch/acpi.h>
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static unsigned int mtrr_msr[] = { MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR, MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR, diff --git a/src/devices/device.c b/src/devices/device.c index ebac1a0..e45efdc 100644 --- a/src/devices/device.c +++ b/src/devices/device.c @@ -54,6 +54,11 @@ struct resource *free_resources = NULL;
DECLARE_SPIN_LOCK(dev_lock)
+ +/* IGD UMA memory */ +uint64_t uma_memory_base = 0; +uint64_t uma_memory_size = 0; + /** * Allocate a new device structure. * diff --git a/src/include/device/device.h b/src/include/device/device.h index c4332e5..eae7f3b 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -103,6 +103,10 @@ extern struct device *all_devices; /* list of all devices */ extern struct resource *free_resources; extern struct bus *free_links;
+/* IGD UMA memory */ +extern uint64_t uma_memory_base; +extern uint64_t uma_memory_size; + /* Generic device interface functions */ device_t alloc_dev(struct bus *parent, struct device_path *path); void dev_enumerate(void); diff --git a/src/mainboard/advansus/a785e-i/mainboard.c b/src/mainboard/advansus/a785e-i/mainboard.c index afa82f3..3504ac2 100644 --- a/src/mainboard/advansus/a785e-i/mainboard.c +++ b/src/mainboard/advansus/a785e-i/mainboard.c @@ -28,7 +28,6 @@ #include "SBPLATFORM.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size;
u8 is_dev3_present(void); void set_pcie_dereset(void); diff --git a/src/mainboard/amd/bimini_fam10/mainboard.c b/src/mainboard/amd/bimini_fam10/mainboard.c index 241d905..4d685e2 100644 --- a/src/mainboard/amd/bimini_fam10/mainboard.c +++ b/src/mainboard/amd/bimini_fam10/mainboard.c @@ -28,7 +28,6 @@ #include <southbridge/amd/sb800/sb800.h> #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size;
u8 is_dev3_present(void); void set_pcie_dereset(void); diff --git a/src/mainboard/amd/dbm690t/mainboard.c b/src/mainboard/amd/dbm690t/mainboard.c index 8841291..c5515b4 100644 --- a/src/mainboard/amd/dbm690t/mainboard.c +++ b/src/mainboard/amd/dbm690t/mainboard.c @@ -42,7 +42,6 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size;
/******************************************************** * dbm690t uses a BCM5789 as on-board NIC. diff --git a/src/mainboard/amd/dinar/mainboard.c b/src/mainboard/amd/dinar/mainboard.c index 360e1df..8eea6da 100644 --- a/src/mainboard/amd/dinar/mainboard.c +++ b/src/mainboard/amd/dinar/mainboard.c @@ -67,7 +67,6 @@ void set_pcie_dereset(void *nbconfig) } }
-uint64_t uma_memory_base, uma_memory_size;
/************************************************* * enable the dedicated function in dinar board. diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index d35b175..41aa907 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -71,7 +71,6 @@ void set_pcie_dereset(void) RWMEM(ACPI_MMIO_BASE + GPIO_BASE + SB_GPIO_REG50, AccWidthUint8, ~(0xFF), 0x48); }
-uint64_t uma_memory_base, uma_memory_size;
/************************************************* * enable the dedicated function in INAGUA board. diff --git a/src/mainboard/amd/mahogany/mainboard.c b/src/mainboard/amd/mahogany/mainboard.c index 989070c..a263f6e 100644 --- a/src/mainboard/amd/mahogany/mainboard.c +++ b/src/mainboard/amd/mahogany/mainboard.c @@ -29,8 +29,6 @@ #include "southbridge/amd/sb700/smbus.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c index 1f1941b..16dff47 100644 --- a/src/mainboard/amd/mahogany_fam10/mainboard.c +++ b/src/mainboard/amd/mahogany_fam10/mainboard.c @@ -29,8 +29,6 @@ #include "southbridge/amd/sb700/smbus.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index 76a9ae6..c0db1c0 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -50,7 +50,6 @@ void set_pcie_dereset(void) { }
-uint64_t uma_memory_base, uma_memory_size;
/************************************************* * enable the dedicated function in persimmon board. diff --git a/src/mainboard/amd/pistachio/mainboard.c b/src/mainboard/amd/pistachio/mainboard.c index e5d0efa..6f62b58 100644 --- a/src/mainboard/amd/pistachio/mainboard.c +++ b/src/mainboard/amd/pistachio/mainboard.c @@ -39,7 +39,6 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, #define ADT7475_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7475_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size;
/******************************************************** * pistachio uses a BCM5787 as on-board NIC. diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c index ed65b34..bb6c522 100644 --- a/src/mainboard/amd/south_station/mainboard.c +++ b/src/mainboard/amd/south_station/mainboard.c @@ -28,7 +28,6 @@ #include "SBPLATFORM.h" /* Platfrom Specific Definitions */ #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size;
void set_pcie_reset(void); void set_pcie_dereset(void); diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c index e2ef3f9..1777c2b 100644 --- a/src/mainboard/amd/tilapia_fam10/mainboard.c +++ b/src/mainboard/amd/tilapia_fam10/mainboard.c @@ -39,8 +39,6 @@ #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/amd/torpedo/mainboard.c b/src/mainboard/amd/torpedo/mainboard.c index 7248bfb..ee9ffa4 100644 --- a/src/mainboard/amd/torpedo/mainboard.c +++ b/src/mainboard/amd/torpedo/mainboard.c @@ -50,7 +50,6 @@ void set_pcie_dereset(void) { }
-uint64_t uma_memory_base, uma_memory_size;
/************************************************* * enable the dedicated function in torpedo board. diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index c5b481d..81777d8 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -47,7 +47,6 @@ void set_pcie_dereset(void) { }
-uint64_t uma_memory_base, uma_memory_size;
/************************************************* * enable the dedicated function in unionstation board. diff --git a/src/mainboard/asrock/939a785gmh/mainboard.c b/src/mainboard/asrock/939a785gmh/mainboard.c index 0b566e4..d1b06c5 100644 --- a/src/mainboard/asrock/939a785gmh/mainboard.c +++ b/src/mainboard/asrock/939a785gmh/mainboard.c @@ -29,8 +29,6 @@ #include "southbridge/amd/sb700/smbus.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/asrock/e350m1/mainboard.c b/src/mainboard/asrock/e350m1/mainboard.c index 8642e28..bf13746 100644 --- a/src/mainboard/asrock/e350m1/mainboard.c +++ b/src/mainboard/asrock/e350m1/mainboard.c @@ -46,7 +46,6 @@ void set_pcie_dereset(void) { }
-uint64_t uma_memory_base, uma_memory_size;
/************************************************* * enable the dedicated function in e350m1 board. diff --git a/src/mainboard/asus/m2v-mx_se/mainboard.c b/src/mainboard/asus/m2v-mx_se/mainboard.c index c936fa9..d5b9304 100644 --- a/src/mainboard/asus/m2v-mx_se/mainboard.c +++ b/src/mainboard/asus/m2v-mx_se/mainboard.c @@ -24,10 +24,6 @@ #include <southbridge/via/k8t890/k8t890.h> #include "chip.h"
-#if CONFIG_GFXUMA -uint64_t uma_memory_base, uma_memory_size; -#endif - int add_mainboard_resources(struct lb_memory *mem) { #if CONFIG_GFXUMA diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c index 10ecb64..2b4e97c 100644 --- a/src/mainboard/asus/m4a78-em/mainboard.c +++ b/src/mainboard/asus/m4a78-em/mainboard.c @@ -29,8 +29,6 @@ #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c index 3b68143..3693300 100644 --- a/src/mainboard/asus/m4a785-m/mainboard.c +++ b/src/mainboard/asus/m4a785-m/mainboard.c @@ -38,8 +38,6 @@ #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/asus/m5a88-v/mainboard.c b/src/mainboard/asus/m5a88-v/mainboard.c index 38b9648..291510c 100644 --- a/src/mainboard/asus/m5a88-v/mainboard.c +++ b/src/mainboard/asus/m5a88-v/mainboard.c @@ -28,7 +28,6 @@ #include "SBPLATFORM.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size;
u8 is_dev3_present(void); void set_pcie_dereset(void); diff --git a/src/mainboard/avalue/eax-785e/mainboard.c b/src/mainboard/avalue/eax-785e/mainboard.c index 52befa5..89a0e96 100644 --- a/src/mainboard/avalue/eax-785e/mainboard.c +++ b/src/mainboard/avalue/eax-785e/mainboard.c @@ -28,7 +28,6 @@ #include "SBPLATFORM.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size;
u8 is_dev3_present(void); void set_pcie_dereset(void); diff --git a/src/mainboard/gigabyte/ma785gm/mainboard.c b/src/mainboard/gigabyte/ma785gm/mainboard.c index 254df00..ea3f27e 100644 --- a/src/mainboard/gigabyte/ma785gm/mainboard.c +++ b/src/mainboard/gigabyte/ma785gm/mainboard.c @@ -29,8 +29,6 @@ #include "southbridge/amd/sb700/smbus.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); int is_dev3_present(void); diff --git a/src/mainboard/gigabyte/ma785gmt/mainboard.c b/src/mainboard/gigabyte/ma785gmt/mainboard.c index 8d669ba..174c08d 100644 --- a/src/mainboard/gigabyte/ma785gmt/mainboard.c +++ b/src/mainboard/gigabyte/ma785gmt/mainboard.c @@ -39,8 +39,6 @@ #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); int is_dev3_present(void); diff --git a/src/mainboard/gigabyte/ma78gm/mainboard.c b/src/mainboard/gigabyte/ma78gm/mainboard.c index ee353ed..b81ebaa 100644 --- a/src/mainboard/gigabyte/ma78gm/mainboard.c +++ b/src/mainboard/gigabyte/ma78gm/mainboard.c @@ -30,8 +30,6 @@ #include "southbridge/amd/sb700/smbus.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/iei/kino-780am2-fam10/mainboard.c b/src/mainboard/iei/kino-780am2-fam10/mainboard.c index ef02c89..6d20523 100644 --- a/src/mainboard/iei/kino-780am2-fam10/mainboard.c +++ b/src/mainboard/iei/kino-780am2-fam10/mainboard.c @@ -29,8 +29,6 @@ #include "southbridge/amd/sb700/smbus.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c index e992f74..329b4f6 100644 --- a/src/mainboard/jetway/pa78vm5/mainboard.c +++ b/src/mainboard/jetway/pa78vm5/mainboard.c @@ -30,8 +30,6 @@ #include "southbridge/amd/sb700/smbus.h" #include "chip.h"
-uint64_t uma_memory_base, uma_memory_size; - void set_pcie_dereset(void); void set_pcie_reset(void); u8 is_dev3_present(void); diff --git a/src/mainboard/kontron/kt690/mainboard.c b/src/mainboard/kontron/kt690/mainboard.c index c2a401e..fcb2462 100644 --- a/src/mainboard/kontron/kt690/mainboard.c +++ b/src/mainboard/kontron/kt690/mainboard.c @@ -42,7 +42,6 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size;
/******************************************************** * dbm690t uses a BCM5789 as on-board NIC. diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.c b/src/mainboard/siemens/sitemp_g1p1/mainboard.c index 0d7b8da..840e060 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mainboard.c +++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.c @@ -162,7 +162,6 @@ extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address); extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val);
-uint64_t uma_memory_base, uma_memory_size; static u32 smbus_io_base = SMBUS_IO_BASE; static u32 adt7475_address = ADT7475_ADDRESS;
diff --git a/src/mainboard/technexion/tim5690/mainboard.c b/src/mainboard/technexion/tim5690/mainboard.c index 6350230..ab21212 100644 --- a/src/mainboard/technexion/tim5690/mainboard.c +++ b/src/mainboard/technexion/tim5690/mainboard.c @@ -83,7 +83,6 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val); #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size;
/* The content of IT8712F_CONFIG_REG_LDN (index 0x07) must be set to the LDN the register belongs to, before you can access the register. */ diff --git a/src/mainboard/technexion/tim8690/mainboard.c b/src/mainboard/technexion/tim8690/mainboard.c index 18abbc9..45b1b4d 100644 --- a/src/mainboard/technexion/tim8690/mainboard.c +++ b/src/mainboard/technexion/tim8690/mainboard.c @@ -42,7 +42,6 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, #define ADT7461_write_byte(address, val) \ do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
-uint64_t uma_memory_base, uma_memory_size;
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 3a1eb7b..12d83ad 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -908,10 +908,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) } #endif
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void amdfam10_domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 50694c7..6a591c5 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -338,10 +338,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) } #endif
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void read_resources(device_t dev) { u32 nodeid; diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 9e6b257..021a1db 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -326,10 +326,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) } #endif
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void read_resources(device_t dev) { u32 nodeid; diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index c76c963..d9da183 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -626,10 +626,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) } #endif
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index ef5f1d8..efc8e68 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -613,10 +613,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) } #endif
-#if CONFIG_GFXUMA == 1 -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM == 1 diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index dd2a9af..41434e8 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -847,10 +847,6 @@ static void disable_hoist_memory(unsigned long hole_startk, int node_id) #include <cbmem.h> #endif
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void amdfam10_domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 621c0f1..8b9140d 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -822,10 +822,6 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id) #include <cbmem.h> #endif
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void amdk8_domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c index 78e3728..3337417 100644 --- a/src/northbridge/intel/i82810/northbridge.c +++ b/src/northbridge/intel/i82810/northbridge.c @@ -62,9 +62,6 @@ static const struct pci_driver i810e_northbridge_driver __pci_driver = { .device = 0x7124, };
-/* IGD UMA memory */ -uint64_t uma_memory_base=0, uma_memory_size=0; - int add_northbridge_resources(struct lb_memory *mem) { printk(BIOS_DEBUG, "Adding IGD UMA memory area\n"); diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c index 93bdc28..22f59dc 100644 --- a/src/northbridge/intel/i82830/northbridge.c +++ b/src/northbridge/intel/i82830/northbridge.c @@ -52,9 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = { .device = 0x3575, };
-/* IGD memory */ -uint64_t uma_memory_base=0, uma_memory_size=0; - int add_northbridge_resources(struct lb_memory *mem) { printk(BIOS_DEBUG, "Adding IGD UMA memory area\n"); diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 40b1aaa..58e70d7 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -68,9 +68,6 @@ static int get_pcie_bar(u32 *base, u32 *len) return 0; }
-/* IDG memory */ -uint64_t uma_memory_base=0, uma_memory_size=0; - static void add_fixed_resources(struct device *dev, int index) { struct resource *resource; diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 6419f8c..b261c9d 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -118,9 +118,6 @@ static int get_pcie_bar(u32 *base, u32 *len) return 0; }
-/* IDG memory */ -uint64_t uma_memory_base=0, uma_memory_size=0; - static void add_fixed_resources(struct device *dev, int index) { struct resource *resource; diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c index 57245b6..047d7da 100644 --- a/src/northbridge/intel/sch/northbridge.c +++ b/src/northbridge/intel/sch/northbridge.c @@ -73,9 +73,6 @@ static int get_pcie_bar(u32 *base, u32 *len) return 0; }
-/* IDG memory */ -u64 uma_memory_base = 0, uma_memory_size = 0; - static void add_fixed_resources(struct device *dev, int index) { struct resource *resource; diff --git a/src/southbridge/amd/rs690/cmn.c b/src/southbridge/amd/rs690/cmn.c index 5e06d4f..68c46e9 100644 --- a/src/southbridge/amd/rs690/cmn.c +++ b/src/southbridge/amd/rs690/cmn.c @@ -315,8 +315,6 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port) */ void rs690_set_tom(device_t nb_dev) { - extern uint64_t uma_memory_base; - /* set TOM */ pci_write_config32(nb_dev, 0x90, uma_memory_base); nbmc_write_index(nb_dev, 0x1e, uma_memory_base); diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c index 40a7262..5c72a04 100644 --- a/src/southbridge/amd/rs780/cmn.c +++ b/src/southbridge/amd/rs780/cmn.c @@ -356,8 +356,6 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port) */ void rs780_set_tom(device_t nb_dev) { - extern uint64_t uma_memory_base; - /* set TOM */ pci_write_config32(nb_dev, 0x90, uma_memory_base); //nbmc_write_index(nb_dev, 0x1e, uma_memory_base); diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c index e07aa10..904e154 100644 --- a/src/southbridge/amd/rs780/gfx.c +++ b/src/southbridge/amd/rs780/gfx.c @@ -43,8 +43,6 @@ extern int is_dev3_present(void); void set_pcie_reset(void); void set_pcie_dereset(void);
-extern uint64_t uma_memory_base, uma_memory_size; - /* Trust the original resource allocation. Don't do it again. */ #undef DONT_TRUST_RESOURCE_ALLOCATION //#define DONT_TRUST_RESOURCE_ALLOCATION diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c index 9b153aa..f1029ca 100644 --- a/src/southbridge/amd/rs780/rs780.c +++ b/src/southbridge/amd/rs780/rs780.c @@ -221,7 +221,6 @@ static void rs780_nb_gfx_dev_table(device_t nb_dev, device_t dev) /* Program Straps. */ romstrap2 = 1 << 26; // enables audio function #if CONFIG_GFXUMA - extern uint64_t uma_memory_size; // bits 7-9: aperture size // 0-7: 128mb, 256mb, 64mb, 32mb, 512mb, 1g, 2g, 4g if (uma_memory_size == 0x02000000) romstrap2 |= 3 << 7; diff --git a/src/southbridge/via/k8t890/dram.c b/src/southbridge/via/k8t890/dram.c index 7e450cc..11c8481 100644 --- a/src/southbridge/via/k8t890/dram.c +++ b/src/southbridge/via/k8t890/dram.c @@ -71,10 +71,6 @@ static void dram_enable(struct device *dev)
}
-#if CONFIG_GFXUMA -extern uint64_t uma_memory_base, uma_memory_size; -#endif - static void dram_enable_k8m890(struct device *dev) { #if CONFIG_GFXUMA
-
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