Hello Wolfgang,
It is correct that you can't use this right away but the memory configurations can be made. We have done this for several FT3B SoC based boards.
We can do this for your board as well. Please contact me off-line if you are interested.
Best Regards,
Wim Vervoorn
Eltan B.V.
Ambachtstraat 23
5481 SM Schijndel
The Netherlands
T : +31-(0)73-594 46 64
E : wvervoorn@eltan.com
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From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Wolfgang Kamp - datakamp Sent: Thursday, May 07, 2015 3:19 PM To: coreboot@coreboot.org Subject: [coreboot] AGESA PI for Olivehill+
Hi Bruce,
is it right that the AGESA Pi binary for AMD Olivehill+ board is not usable for custom board implementations of FT3B GSOC?
For example, if we use memory down design in star topology, AGESA will fail to initialize DDR3.
Regards,
Wolfgang