Use less magic values in GeodeLX code.
This is RFC only.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: corebootv3-stuff1/arch/x86/geodelx/stage0.S =================================================================== --- corebootv3-stuff1/arch/x86/geodelx/stage0.S (Revision 789) +++ corebootv3-stuff1/arch/x86/geodelx/stage0.S (Arbeitskopie) @@ -180,8 +180,10 @@ movl $CPU_RCONF_DEFAULT, %ecx rdmsr
- /* 1MB system memory in write back 1|00100|00. */ - movl $0x010010000, %eax + /* 1 MB system memory (256 blocks of 4kB), + * disable cache between SYSTOP and ROMBASE. + */ + movl $(RCONF_CD(RCONF_DEFAULT_LOWER_DEVRC_LOW_SHIFT)|(256<<RCONF_DEFAULT_LOWER_SYSTOP_SHIFT)), %eax wrmsr
/* In LX DCDIS is set after POR which disables the cache..., clear Index: corebootv3-stuff1/arch/x86/geodelx/stage1.c =================================================================== --- corebootv3-stuff1/arch/x86/geodelx/stage1.c (Revision 789) +++ corebootv3-stuff1/arch/x86/geodelx/stage1.c (Arbeitskopie) @@ -26,7 +26,12 @@
static const struct msrinit msr_table[] = { /* Setup access to cache under 1MB. */ - {CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, // 0x00000-0xA0000 + {CPU_RCONF_DEFAULT, {.hi = (RCONF_WS(RCONF_DEFAULT_UPPER_ROMRC_SHIFT)| + RCONF_WP(RCONF_DEFAULT_UPPER_ROMRC_SHIFT)| + (0xfffc<<RCONF_DEFAULT_UPPER_ROMBASE_SHIFT)| + RCONF_CD((RCONF_DEFAULT_LOWER_DEVRC_LOW_SHIFT-32))), + .lo = RCONF_CD(RCONF_DEFAULT_LOWER_DEVRC_LOW_SHIFT)| + (0x00A0<<RCONF_DEFAULT_LOWER_SYSTOP_SHIFT)}}, // 0x00000-0xA0000 {CPU_RCONF_A0_BF, {.hi = 0x00000000,.lo = 0x00000000}}, // 0xA0000-0xBFFFF {CPU_RCONF_C0_DF, {.hi = 0x00000000,.lo = 0x00000000}}, // 0xC0000-0xDFFFF {CPU_RCONF_E0_FF, {.hi = 0x00000000,.lo = 0x00000000}}, // 0xE0000-0xFFFFF
I like it. I can not test it for a little while.
Can somebody out there test?
ron