Hi,
Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan.
3 new defect(s) introduced to coreboot found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan.
New defect(s) Reported-by: Coverity Scan Showing 3 of 3 defect(s)
** CID 1518044: API usage errors (SWAPPED_ARGUMENTS)
________________________________________________________________________________________________________ *** CID 1518044: API usage errors (SWAPPED_ARGUMENTS) /src/northbridge/intel/ironlake/northbridge.c: 125 in mc_read_resources() 119 pci_read_config32(pcidev_on_root(0, 0), IGD_BASE); 120 gtt_base = 121 pci_read_config32(pcidev_on_root(0, 0), GTT_BASE); 122 if (gtt_base > tseg_end) { 123 /* Reserve the gap. MMIO doesn't work in this range. Keep 124 it uncacheable, though, for easier MTRR allocation. */
CID 1518044: API usage errors (SWAPPED_ARGUMENTS) The positions of arguments in the call to "mmio_from_to" do not match the ordering of the parameters:
* "tseg_end" is passed to "base". * "gtt_base" is passed to "end". 125 mmio_from_to(dev, index++, tseg_end, gtt_base); 126 } 127 mmio_range(dev, index++, gtt_base, uma_size_gtt * MiB); 128 mmio_range(dev, index++, igd_base, uma_size_igd * MiB); 129 130 upper_ram_end(dev, index++, touud * MiB);
** CID 1518043: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/northbridge/intel/ironlake/northbridge.c: 128 in mc_read_resources()
________________________________________________________________________________________________________ *** CID 1518043: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/northbridge/intel/ironlake/northbridge.c: 128 in mc_read_resources() 122 if (gtt_base > tseg_end) { 123 /* Reserve the gap. MMIO doesn't work in this range. Keep 124 it uncacheable, though, for easier MTRR allocation. */ 125 mmio_from_to(dev, index++, tseg_end, gtt_base); 126 } 127 mmio_range(dev, index++, gtt_base, uma_size_gtt * MiB);
CID 1518043: Integer handling issues (OVERFLOW_BEFORE_WIDEN) Potentially overflowing expression "uma_size_igd * 1048576" with type "int" (32 bits, signed) is evaluated using 32-bit arithmetic, and then used in a context that expects an expression of type "uint64_t" (64 bits, unsigned).
128 mmio_range(dev, index++, igd_base, uma_size_igd * MiB); 129 130 upper_ram_end(dev, index++, touud * MiB); 131 132 /* This memory is not DMA-capable. */ 133 if (touud >= 8192 - 64)
** CID 1518042: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/northbridge/intel/ironlake/northbridge.c: 127 in mc_read_resources()
________________________________________________________________________________________________________ *** CID 1518042: Integer handling issues (OVERFLOW_BEFORE_WIDEN) /src/northbridge/intel/ironlake/northbridge.c: 127 in mc_read_resources() 121 pci_read_config32(pcidev_on_root(0, 0), GTT_BASE); 122 if (gtt_base > tseg_end) { 123 /* Reserve the gap. MMIO doesn't work in this range. Keep 124 it uncacheable, though, for easier MTRR allocation. */ 125 mmio_from_to(dev, index++, tseg_end, gtt_base); 126 }
CID 1518042: Integer handling issues (OVERFLOW_BEFORE_WIDEN) Potentially overflowing expression "uma_size_gtt * 1048576" with type "int" (32 bits, signed) is evaluated using 32-bit arithmetic, and then used in a context that expects an expression of type "uint64_t" (64 bits, unsigned).
127 mmio_range(dev, index++, gtt_base, uma_size_gtt * MiB); 128 mmio_range(dev, index++, igd_base, uma_size_igd * MiB); 129 130 upper_ram_end(dev, index++, touud * MiB); 131 132 /* This memory is not DMA-capable. */
________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P0...
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