See patch.
Build-tested, but not yet run-time-tested on any board.
Uwe.
=================================================================== --- src/mainboard/Makefile.romccboard.inc (Revision 4718) +++ src/mainboard/Makefile.romccboard.inc (Arbeitskopie) @@ -26,9 +26,16 @@ crt0-y += ../../../../src/arch/i386/lib/id.inc crt0-y += failover.inc crt0-y += ../../../../src/cpu/x86/fpu/enable_fpu.inc + +ifeq ($(CONFIG_CPU_AMD_GX1),y) +crt0-y += ../../../../src/cpu/amd/model_gx1/cpu_setup.inc +crt0-y += ../../../../src/cpu/amd/model_gx1/gx_setup.inc +crt0-y += auto.inc +else crt0-y += ../../../../src/cpu/x86/mmx/enable_mmx.inc crt0-y += auto.inc crt0-y += ../../../../src/cpu/x86/mmx/disable_mmx.inc +endif
As you know I'd rather see this done differently but I need to put the select MMX in all those CPUs that support it. So I will change this later when I can, or someone else can. Here's what it ought to look like:
+crt0-$(CONFIG_CPU_AMD_GX1) += ../../../../src/cpu/amd/model_gx1/cpu_setup.inc +crt0-$(CONFIG_CPU_AMD_GX1) += ../../../../src/cpu/amd/model_gx1/gx_setup.inc crt0-$(CONFIG_MMX) += ../../../../src/cpu/x86/mmx/enable_mmx.inc crt0-$(CONFIG_SSE) += ../../../../src/cpu/x86/sse/enable_sse.inc crt0-y += auto.inc crt0-$(CONFIG_SSE) += ../../../../src/cpu/x86/sse/enable_sse.inc crt0-$(CONFIG_MMX) += ../../../../src/cpu/x86/mmx/disable_mmx.inc
But, as said,for each CPU that supports SSE and MMX, we have to add the right select statements.
But this is such fine work that it is:
Acked-by: Ronald G. Minnich rminnich@gmail.com
thanks, really nice job
ron
On Sun, Oct 04, 2009 at 09:26:47AM -0700, ron minnich wrote:
But, as said,for each CPU that supports SSE and MMX, we have to add the right select statements.
Sure, we'll change that as soon as the SSE/MMX infrastructure is in place.
Acked-by: Ronald G. Minnich rminnich@gmail.com
Thanks, r4719.
Uwe.
On Sun, Oct 4, 2009 at 10:16 AM, Uwe Hermann uwe@hermann-uwe.de wrote:
On Sun, Oct 04, 2009 at 09:26:47AM -0700, ron minnich wrote:
But, as said,for each CPU that supports SSE and MMX, we have to add the right select statements.
Sure, we'll change that as soon as the SSE/MMX infrastructure is in place.
BTW, what are the rules for MMX/SSE? IIRC MMX was in Ppro. What supported CPUs can we assume support MMX and SSE? Can we go by socket type (likely on newer parts) or do we have to go by model/family?
ron
ron minnich wrote:
BTW, what are the rules for MMX/SSE? IIRC MMX was in Ppro.
MMX was introduced on the Pentium. There was Pentium, then came Pentium-MMX. It took a while, so Pentium Pro might have been there before Pentium-MMX. My guess is that Pentium Pro did not have MMX.
SSE came in Pentium III.
What supported CPUs can we assume support MMX and SSE? Can we go by socket type (likely on newer parts) or do we have to go by model/family?
The Pentiums are tricky with MMX, because the same board will run just fine with Pentium and Pentium-MMX alike. So for Pentium boards it's not really safe to assume there will ever be MMX.
The later models were slot 1 or socket 370. Could you put a standard Pentium in a socket 370? I doubt it. Then it's safe to set MMX based on socket.
What about Pentium III? IIRC you could put an FCPGA Pentium III in an adapter that made it into a slot 1, and could run instead of a Pentium II.. Can't rely on the socket there.
//Peter