Hi,
it seems that executing VSA requires vm86 to be useful. Since we unconditionally execute the VSA, we should unconditionally require vm86 support (PCI_OPTION_ROM_RUN_VM86) via Kconfig for Geode targets. Not doing so will either cause compile failures or runtime failures.
Adding select PCI_OPTION_ROM_RUN_VM86 below config CPU_AMD_GEODELX did not work out for me.
Any ideas?
Regards, Carl-Daniel
# # Automatically generated make config: don't edit # coreboot version: 3.0.0 # Fri Feb 1 21:06:22 2008 #
# # General setup # CONFIG_EXPERIMENTAL=y CONFIG_EXPERT=y CONFIG_LOCALVERSION="" # CONFIG_BEEPS is not set
# # Mainboard # # CONFIG_VENDOR_ADL is not set # CONFIG_VENDOR_AMD is not set # CONFIG_VENDOR_ARTECGROUP is not set # CONFIG_VENDOR_EMULATION is not set CONFIG_VENDOR_PCENGINES=y CONFIG_MAINBOARD_NAME="pcengines/alix1c" # CONFIG_BOARD_EMULATION_QEMU_X86 is not set CONFIG_BOARD_PCENGINES_ALIX1C=y # CONFIG_COREBOOT_ROMSIZE_KB_128 is not set CONFIG_COREBOOT_ROMSIZE_KB_256=y # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set # CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set CONFIG_COREBOOT_ROMSIZE_KB=256 CONFIG_ARCH_X86=y CONFIG_ARCH="x86" CONFIG_CPU_AMD_GEODELX=y CONFIG_OPTION_TABLE=y
# # Compression # CONFIG_COMPRESSION_LZMA=y # CONFIG_COMPRESSION_NRV2B is not set CONFIG_DEFAULT_COMPRESSION_LZMA=y # CONFIG_DEFAULT_COMPRESSION_NRV2B is not set # CONFIG_DEFAULT_COMPRESSION_NONE is not set
# # Console # CONFIG_CONSOLE=y CONFIG_CONSOLE_LOGLEVEL_8=y # CONFIG_CONSOLE_LOGLEVEL_7 is not set # CONFIG_CONSOLE_LOGLEVEL_6 is not set # CONFIG_CONSOLE_LOGLEVEL_5 is not set # CONFIG_CONSOLE_LOGLEVEL_4 is not set # CONFIG_CONSOLE_LOGLEVEL_3 is not set # CONFIG_CONSOLE_LOGLEVEL_2 is not set # CONFIG_CONSOLE_LOGLEVEL_1 is not set # CONFIG_CONSOLE_LOGLEVEL_0 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8 CONFIG_CONSOLE_SERIAL=y CONFIG_CONSOLE_SERIAL_COM1=y # CONFIG_CONSOLE_SERIAL_COM2 is not set CONFIG_CONSOLE_SERIAL_115200=y # CONFIG_CONSOLE_SERIAL_57600 is not set # CONFIG_CONSOLE_SERIAL_38400 is not set # CONFIG_CONSOLE_SERIAL_19200 is not set # CONFIG_CONSOLE_SERIAL_9600 is not set # CONFIG_CONSOLE_USB is not set
# # Cosmetic console options # # CONFIG_CONSOLE_PREFIX is not set
# # Devices # # CONFIG_PCI_OPTION_ROM_RUN_X86EMU is not set # CONFIG_PCI_OPTION_ROM_RUN_VM86 is not set CONFIG_PCI_OPTION_ROM_RUN_NONE=y CONFIG_NORTHBRIDGE_AMD_GEODELX=y CONFIG_SOUTHBRIDGE_AMD_CS5536=y CONFIG_SUPERIO_WINBOND_W83627HF=y CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE=32
# # Payload # # CONFIG_PAYLOAD_PREPARSE_ELF is not set # CONFIG_PAYLOAD_ELF is not set CONFIG_PAYLOAD_NONE=y
CP build/config.h GEN build/build.h BUILD DUMMY VPD CC build/lib/uart8250.o CC build/lib/mem.o CC build/lib/elfboot.o CC build/lib/lar.o CC build/lib/delay.o CC build/lib/vtxprintf.o CC build/lib/vsprintf.o CC build/lib/console.o CC build/lib/string.o CC build/lib/lzma.o CC build/arch/x86/stage1.o CC build/arch/x86/serial.o CC build/arch/x86/archelfboot.o CC build/arch/x86/speaker.o CC build/arch/x86/udelay_io.o CC build/arch/x86/mc146818rtc.o CC build/arch/x86/post_code.o CC build/arch/x86/geodelx/stage1.o CC build/arch/x86/geodelx/stage0.o AS build/arch/x86/geodelx/stage0.o CC build/mainboard/pcengines/alix1c/stage1.o HOSTCC build/util/dtc/dtc.o HOSTCC build/util/dtc/livetree.o HOSTCC build/util/dtc/flattree.o HOSTCC build/util/dtc/data.o HOSTCC build/util/dtc/treesource.o HOSTCC build/util/dtc/fstree.o BISON build/util/dtc/dtc-parser.tab.c HOSTCC build/util/dtc/dtc-parser.tab.o HOSTCC build/util/dtc/dtc DTC build/statictree.h DTC mainboard/pcengines/alix1c/dts (dts->lbh) CC build/southbridge/amd/cs5536/stage1.o CC build/superio/winbond/w83627hf/stage1.o CC build/device/pnp_raw.o CC build/stage0.init OBJCOPY build/stage0.init OBJCOPY build/stage0.init (prefixing stage0) TEST build/stage0.init NM build/stage0.init BUILD build/coreboot.bootblock BUILD LAR BUILD LZMA BUILD NRV2B HOSTCC build/util/lar/lar.o HOSTCC build/util/lar/stream.o HOSTCC build/util/lar/lib.o HOSTCXX build/util/lzma/LZMAEncoder.o HOSTCXX build/util/lzma/LZInWindow.o HOSTCXX build/util/lzma/RangeCoderBit.o HOSTCXX build/util/lzma/StreamUtils.o HOSTCXX build/util/lzma/OutBuffer.o HOSTCXX build/util/lzma/Alloc.o HOSTCXX build/util/lzma/CRC.o HOSTCC build/util/nrv2b/nrv2b-compress.o HOSTCXX build/util/lar/lar HOSTCXX build/util/lzma/minilzma.o CC build/coreboot.initram (XIP) /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/mainboard/pcengines/alix1c/initram.c: In function ‘main’: /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/mainboard/pcengines/alix1c/initram.c:114: warning: unused variable ‘smb_devices’ /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/arch/x86/geodelx/geodelx.c:475:2: warning: #warning testing fixing bugs in initram /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/arch/x86/geodelx/geodelx.c: At top level: /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/northbridge/amd/geodelx/raminit.c:543: warning: ‘EnableMTest’ defined but not used LD build/coreboot.initram NM build/coreboot.initram CC build/lib/stage2.o CC build/lib/clog2.o CC build/lib/tables.o CC build/lib/compute_ip_checksum.o CC build/arch/x86/archtables.o /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/arch/x86/archtables.c:42:2: warning: #warning enable disabled code in archtables.c /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/arch/x86/archtables.c:132:2: warning: #warning GDT should be placed in a reserved position from the beginning on. CC build/arch/x86/coreboot_table.o CC build/arch/x86/pci_ops_auto.o CC build/arch/x86/pci_ops_conf1.o CC build/arch/x86/pci_ops_conf2.o CC build/arch/x86/keyboard.o CC build/arch/x86/i8259.o CC build/arch/x86/isa-dma.o CC build/device/device.o CC build/device/device_util.o CC build/device/root_device.o CC build/device/pci_device.o CC build/device/pci_ops.o CC build/device/pci_rom.o CC build/device/pnp_device.o DTC build/mainboard/pcengines/alix1c/statictree.c DTC mainboard/pcengines/alix1c/dts (dts->lb) CC build/mainboard/pcengines/alix1c/statictree.o /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/build/mainboard/pcengines/alix1c/statictree.c:25: warning: initialization discards qualifiers from pointer target type CC build/northbridge/amd/geodelx/geodelx.o /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/northbridge/amd/geodelx/geodelx.c:332:2: warning: #warning graphics_init is disabled. CC build/northbridge/amd/geodelx/geodelxinit.o /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/northbridge/amd/geodelx/geodelxinit.c:724:2: warning: #warning "CONFIG_VIDEO_MB was not defined" CC build/northbridge/amd/geodelx/vsmsetup.o CC build/southbridge/amd/cs5536/cs5536.o /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/southbridge/amd/cs5536/cs5536.c:579:2: warning: #warning Add back in unwanted VPCI support /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/southbridge/amd/cs5536/cs5536.c:95: warning: ‘pm_chipset_init’ defined but not used /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/southbridge/amd/cs5536/cs5536.c:592: warning: ‘southbridge_enable’ defined but not used CC build/superio/winbond/w83627hf/superio.o /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/superio/winbond/w83627hf/superio.c:73:2: warning: #warning Fix CMOS handling /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/superio/winbond/w83627hf/superio.c:134:2: warning: #warning init_uart8250 /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/superio/winbond/w83627hf/superio.c:139:2: warning: #warning init_uart8250 LD build/coreboot.stage2 /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/build/northbridge/amd/geodelx/geodelx.o: In function `geodelx_pci_domain_phase2': geodelx.c:(.text+0x1bb): undefined reference to `setup_realmode_idt' /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/build/northbridge/amd/geodelx/vsmsetup.o: In function `__stack': vsmsetup.c:(.text+0x148): undefined reference to `__mygdtaddr' /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/build/northbridge/amd/geodelx/vsmsetup.o: In function `__rms_real': vsmsetup.c:(.text+0x184): undefined reference to `__myidt' /sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/build/northbridge/amd/geodelx/vsmsetup.o: In function `vsmrestart': vsmsetup.c:(.text+0x1c6): undefined reference to `gdtarg' vsmsetup.c:(.text+0x1cd): undefined reference to `idtarg' make: *** [/sources/tmptrees/LinuxBIOSv3-explicit_dts_compilefix/build/coreboot.stage2] Fehler 1
Carl-Daniel Hailfinger wrote:
Hi,
it seems that executing VSA requires vm86 to be useful. Since we unconditionally execute the VSA, we should unconditionally require vm86 support (PCI_OPTION_ROM_RUN_VM86) via Kconfig for Geode targets. Not doing so will either cause compile failures or runtime failures.
Adding select PCI_OPTION_ROM_RUN_VM86 below config CPU_AMD_GEODELX did not work out for me.
Any ideas?
Regards, Carl-Daniel
Sorry I missed this.
VSA requires the GDT that is in vm86.c. VSA loads similar to an option ROM so the loader does go into VM86 mode. All the other stuff like interrupt support and PCI BIOS isn't needed by VSA. I think that the GDT at the top of vm86.c can be moved to a header file, gdt.h or something like that.
Care to make a patch? :)
Marc
On 18.02.2008 23:55, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
it seems that executing VSA requires vm86 to be useful. Since we unconditionally execute the VSA, we should unconditionally require vm86 support (PCI_OPTION_ROM_RUN_VM86) via Kconfig for Geode targets. Not doing so will either cause compile failures or runtime failures.
Adding select PCI_OPTION_ROM_RUN_VM86 below config CPU_AMD_GEODELX did not work out for me.
Sorry I missed this.
VSA requires the GDT that is in vm86.c. VSA loads similar to an option ROM so the loader does go into VM86 mode. All the other stuff like interrupt support and PCI BIOS isn't needed by VSA. I think that the GDT at the top of vm86.c can be moved to a header file, gdt.h or something like that.
northbridge/amd/geodelx/vsmsetup.c uses util/x86emu/vm86.c:setup_realmode_idt() but it seems most/all of the setup there is not needed at all for VSA. Pulling in setup_realmode_idt pulls in the rest of vm86 through direct and indirect dependencies.
Care to make a patch? :)
Reduce the amount of compilation errors for Geode LX targets if x86emu or no emulation is selected instead of vm86. Factor out GDT code from vm86.c to vm86_gdt.c
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv3-vsa_gdt/northbridge/amd/geodelx/Makefile =================================================================== --- LinuxBIOSv3-vsa_gdt/northbridge/amd/geodelx/Makefile (revision 611) +++ LinuxBIOSv3-vsa_gdt/northbridge/amd/geodelx/Makefile (working copy) @@ -22,6 +22,7 @@ ifeq ($(CONFIG_NORTHBRIDGE_AMD_GEODELX),y)
STAGE2_CHIPSET_OBJ += $(obj)/northbridge/amd/geodelx/geodelx.o \ - $(obj)/northbridge/amd/geodelx/vsmsetup.o + $(obj)/northbridge/amd/geodelx/vsmsetup.o \ + $(obj)/util/x86emu/vm86_gdt.o
endif Index: LinuxBIOSv3-vsa_gdt/util/x86emu/pcbios/pcibios.c =================================================================== --- LinuxBIOSv3-vsa_gdt/util/x86emu/pcbios/pcibios.c (revision 611) +++ LinuxBIOSv3-vsa_gdt/util/x86emu/pcbios/pcibios.c (working copy) @@ -61,7 +61,7 @@ break; case FIND_PCI_DEVICE: /* FixME: support SI != 0 */ - dev = dev_find_device(X86_DX, X86_CX, dev); + dev = dev_find_pci_device(X86_DX, X86_CX, dev); if (dev != 0) { X86_BH = dev->bus->secondary; X86_BL = dev->path.u.pci.devfn; Index: LinuxBIOSv3-vsa_gdt/util/x86emu/vm86_gdt.c =================================================================== --- LinuxBIOSv3-vsa_gdt/util/x86emu/vm86_gdt.c (revision 0) +++ LinuxBIOSv3-vsa_gdt/util/x86emu/vm86_gdt.c (revision 0) @@ -0,0 +1,95 @@ +/* + * Erik Arjan Hendriks hendriks@lanl.gov + * Copyright (C) 2000 Scyld. + * Copyright (C) 2000 Scyld Computing Corporation + * Copyright (C) 2001 University of California. LA-CC Number 01-67. + * Copyright (C) 2005 Nick.Barker9@btinternet.com + * Copyright (C) 2007 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + */ + + +/* Declare a temporary global descriptor table - + * necessary because the core part of the bios + * no longer sets up any 16 bit segments + */ + +__asm__ ( + /* pointer to original gdt */ + " .globl gdtarg\n" + "gdtarg: \n" + " .word gdt_limit \n" + " .long gdtptr \n" + + /* compute the table limit */ + "__mygdt_limit = __mygdt_end - __mygdt - 1 \n" + " .globl __mygdtaddr\n" + "__mygdtaddr: \n" + " .word __mygdt_limit \n" + " .long __mygdt \n" + + " .globl __mygdt\n" + "__mygdt: \n" + /* selgdt 0, unused */ + " .word 0x0000, 0x0000 \n" + " .byte 0x00, 0x00, 0x00, 0x00 \n" + + /* selgdt 8, unused */ + " .word 0x0000, 0x0000 \n" + " .byte 0x00, 0x00, 0x00, 0x00 \n" + + /* selgdt 0x10, flat code segment */ + " .word 0xffff, 0x0000 \n" + " .byte 0x00, 0x9b, 0xcf, 0x00 \n" + + /* selgdt 0x18, flat data segment */ + " .word 0xffff, 0x0000 \n" + " .byte 0x00, 0x93, 0xcf, 0x00 \n" + + /* selgdt 0x20, unused */ + " .word 0x0000, 0x0000 \n" + " .byte 0x00, 0x00, 0x00, 0x00 \n" + + /* selgdt 0x28 16-bit 64k code at 0x00000000 */ + " .word 0xffff, 0x0000 \n" + " .byte 0, 0x9a, 0, 0 \n" + + /* selgdt 0x30 16-bit 64k data at 0x00000000 */ + " .word 0xffff, 0x0000 \n" + " .byte 0, 0x92, 0, 0 \n" + + "__mygdt_end: \n" + + /* FIXME: This does probably not belong here */ + " .globl idtarg\n" + "idtarg:\n" + " .word _idt_end - _idt - 1\n" /* limit */ + " .long _idt\n" + " .word 0\n" + "_idt:\n" + " .fill 20, 8, 0\n" // # idt is unitiailzed + "_idt_end:\n" + + /* Declare a pointer to where our idt is going to be i.e. at mem zero */ + " .globl __myidt\n" + "__myidt: \n" + /* 16-bit limit */ + " .word 1023 \n" + /* 24-bit base */ + " .long 0 \n" + " .word 0 \n" +); Index: LinuxBIOSv3-vsa_gdt/util/x86emu/vm86.c =================================================================== --- LinuxBIOSv3-vsa_gdt/util/x86emu/vm86.c (revision 611) +++ LinuxBIOSv3-vsa_gdt/util/x86emu/vm86.c (working copy) @@ -30,77 +30,6 @@ #include <io.h>
-/* Declare a temporary global descriptor table - - * necessary because the core part of the bios - * no longer sets up any 16 bit segments - */ - -__asm__ ( - /* pointer to original gdt */ - " .globl gdtarg\n" - "gdtarg: \n" - " .word gdt_limit \n" - " .long gdtptr \n" - - /* compute the table limit */ - "__mygdt_limit = __mygdt_end - __mygdt - 1 \n" - " .globl __mygdtaddr\n" - "__mygdtaddr: \n" - " .word __mygdt_limit \n" - " .long __mygdt \n" - - " .globl __mygdt\n" - "__mygdt: \n" - /* selgdt 0, unused */ - " .word 0x0000, 0x0000 \n" - " .byte 0x00, 0x00, 0x00, 0x00 \n" - - /* selgdt 8, unused */ - " .word 0x0000, 0x0000 \n" - " .byte 0x00, 0x00, 0x00, 0x00 \n" - - /* selgdt 0x10, flat code segment */ - " .word 0xffff, 0x0000 \n" - " .byte 0x00, 0x9b, 0xcf, 0x00 \n" - - /* selgdt 0x18, flat data segment */ - " .word 0xffff, 0x0000 \n" - " .byte 0x00, 0x93, 0xcf, 0x00 \n" - - /* selgdt 0x20, unused */ - " .word 0x0000, 0x0000 \n" - " .byte 0x00, 0x00, 0x00, 0x00 \n" - - /* selgdt 0x28 16-bit 64k code at 0x00000000 */ - " .word 0xffff, 0x0000 \n" - " .byte 0, 0x9a, 0, 0 \n" - - /* selgdt 0x30 16-bit 64k data at 0x00000000 */ - " .word 0xffff, 0x0000 \n" - " .byte 0, 0x92, 0, 0 \n" - - "__mygdt_end: \n" - - /* FIXME: This does probably not belong here */ - " .globl idtarg\n" - "idtarg:\n" - " .word _idt_end - _idt - 1\n" /* limit */ - " .long _idt\n" - " .word 0\n" - "_idt:\n" - " .fill 20, 8, 0\n" // # idt is unitiailzed - "_idt_end:\n" - - /* Declare a pointer to where our idt is going to be i.e. at mem zero */ - " .globl __myidt\n" - "__myidt: \n" - /* 16-bit limit */ - " .word 1023 \n" - /* 24-bit base */ - " .long 0 \n" - " .word 0 \n" -); - /* The address arguments to this function are PHYSICAL ADDRESSES */ static void real_mode_switch_call_vga(unsigned long devfn) { Index: LinuxBIOSv3-vsa_gdt/util/x86emu/Makefile =================================================================== --- LinuxBIOSv3-vsa_gdt/util/x86emu/Makefile (revision 611) +++ LinuxBIOSv3-vsa_gdt/util/x86emu/Makefile (working copy) @@ -20,7 +20,7 @@
X86EMU_OBJ = debug.o decode.o fpu.o ops.o ops2.o prim_ops.o sys.o BIOSEMU_OBJ = biosemu.o pcbios/pcibios.o -VM86_OBJ = vm86.o +VM86_OBJ = vm86.o vm86_gdt.o
ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_X86EMU),y) LIBX86EMU_OBJS = $(patsubst %,$(obj)/util/x86emu/x86emu/%,$(X86EMU_OBJ)) \
Carl-Daniel Hailfinger wrote:
On 18.02.2008 23:55, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
it seems that executing VSA requires vm86 to be useful. Since we unconditionally execute the VSA, we should unconditionally require vm86 support (PCI_OPTION_ROM_RUN_VM86) via Kconfig for Geode targets. Not doing so will either cause compile failures or runtime failures.
Adding select PCI_OPTION_ROM_RUN_VM86 below config CPU_AMD_GEODELX did not work out for me.
Sorry I missed this.
VSA requires the GDT that is in vm86.c. VSA loads similar to an option ROM so the loader does go into VM86 mode. All the other stuff like interrupt support and PCI BIOS isn't needed by VSA. I think that the GDT at the top of vm86.c can be moved to a header file, gdt.h or something like that.
northbridge/amd/geodelx/vsmsetup.c uses util/x86emu/vm86.c:setup_realmode_idt() but it seems most/all of the setup there is not needed at all for VSA. Pulling in setup_realmode_idt pulls in the rest of vm86 through direct and indirect dependencies.
Care to make a patch? :)
I am also leaning towards removing the IDT for VSA init. There is a risk if either an exception happens or a software interrupt is used you will get unexpected results. What probably happens is that you jump off to something that will eventually cause a triple fault and reboot. You may think this is bad (and it is) but it is the same risk that coreboot runs today. If coreboot had a generic IDT to handle exceptions, VSA init would use the same IDT. Note that hardware INT (even timers) should never happen as they are always masked.
I have built with no PCI_OPTION_ROM_RUN_VM86 and run this to filo.
Marc
Ron? This one would benefit from your testing and acking as well.
On 19.02.2008 22:38, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
On 18.02.2008 23:55, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
it seems that executing VSA requires vm86 to be useful. Since we unconditionally execute the VSA, we should unconditionally require vm86 support (PCI_OPTION_ROM_RUN_VM86) via Kconfig for Geode targets. Not doing so will either cause compile failures or runtime failures.
Adding select PCI_OPTION_ROM_RUN_VM86 below config CPU_AMD_GEODELX did not work out for me.
Sorry I missed this.
VSA requires the GDT that is in vm86.c. VSA loads similar to an option ROM so the loader does go into VM86 mode. All the other stuff like interrupt support and PCI BIOS isn't needed by VSA. I think that the GDT at the top of vm86.c can be moved to a header file, gdt.h or something like that.
northbridge/amd/geodelx/vsmsetup.c uses util/x86emu/vm86.c:setup_realmode_idt() but it seems most/all of the setup there is not needed at all for VSA. Pulling in setup_realmode_idt pulls in the rest of vm86 through direct and indirect dependencies.
Care to make a patch? :)
I am also leaning towards removing the IDT for VSA init. There is a risk if either an exception happens or a software interrupt is used you will get unexpected results. What probably happens is that you jump off to something that will eventually cause a triple fault and reboot. You may think this is bad (and it is) but it is the same risk that coreboot runs today. If coreboot had a generic IDT to handle exceptions, VSA init would use the same IDT. Note that hardware INT (even timers) should never happen as they are always masked.
I have built with no PCI_OPTION_ROM_RUN_VM86 and run this to filo.
Nice. The unrelated change in util/x86emu/pcbios/pcibios.c has already been committed in r612, but I really think we want this patch.
Short description of which test we need: Compilation for alix1c with "Execute PCI Option ROMs" set to "Disabled". Boot into Linux and test whether everything works.
Regards, Carl-Daniel
I will test this tonight.
ron
Tested and booted to multiuser with working ethernet. Committed revision 613
Thanks all. I am going to test the vga bits now.
This is really great stuff.
ron
-
Carl-Daniel Hailfinger -
Marc Jones -
ron minnich