答复: Tyan S4880

[YhLu]

> > southbridge/amd/amd8131/amd8131_bridge.c: update ioapic_anable to

enable
> > PCI-X MASTER Mode.
> Why is this necessary?  Previously it has been the policy to not set
> the master enables any more than is necessary for proper operation
> of the devices.  Unless I am mistaken not setting the master enables is
> very much in spec for pci devices.

Eric,

Otherwise I can not use LAN and SCSI devices in PCI-X in Linux. 
For Broadcom NIC, I can not ifconfig and ping.
For SCSI, I just can not get through the SCSI initialize in Linux kernel.

YH.

YhLu  writes:
> > > southbridge/amd/amd8131/amd8131_bridge.c: update ioapic_anable to
>
> enable
> > > PCI-X MASTER Mode.
> > Why is this necessary?  Previously it has been the policy to not set
> > the master enables any more than is necessary for proper operation
> > of the devices.  Unless I am mistaken not setting the master enables is
> > very much in spec for pci devices.
>
> Eric,
>
> Otherwise I can not use LAN and SCSI devices in PCI-X in Linux. 
> For Broadcom NIC, I can not ifconfig and ping.
> For SCSI, I just can not get through the SCSI initialize in Linux kernel.

Hmm.  Very odd.  This has not been my experience so I want
to confirm we are communicating clearly.

We are talking about pci configuration space byte register 4, bit 2
which has a value of 0x4.  bit 1 memory space enable of that
byte our generic code should already be setting if the device has
any memory resources.

Linux drivers are expected to call pci_set_master() which sets
this bit before performing DMA transactions.  Any driver that does
not is buggy.

I believe we are talking about the general case of setting
these bits, not the specific instance of the 8131 ioapic.
And unless I am highly mistaken this all applies to pci
devices in general not just pci-X devices.'

So I can check out the possibility of buggy kernel drivers YH which
kernel and which drivers are you using.  tg3 or bcm??? for the
broadcom nic.

In the general case if we are going to do this we should set
this bit in the pci layer so it always gets set and not set
it for the individual devices.

.......

Looking at the specific case of the amd8131, the documentation says
unless master enable is set it will not generate interrupts.  I would
not see this problem on the HDAMA because it's interrupts are poorly
wired and do not actually use the ioapic on the 8131, instead they
all goto the 8111.

IOAPICs are a case of architectural hardware.  Architectural hardware
is generally driven by generic drivers so it need to be configured to
act exactly as specified in the architecture.  To do that in this
specific case we do need set the master enable, or we will not
generate interrupts.

Eric