[PATCH] Clean up PCI ops in AMD 690 boards

[Carl-Daniel Hailfinger]

r4646 enabled early usage of pci_{read,write}_config{8,16,32}

This allows us to change
dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
        sm_dev->path.pci.devfn, 0x64);

to the much more readable
dword = pci_read_config32(sm_dev, 0x64);

Clean up all PCI operations in mainboards based on AMD 690.

Boot tested on Asus M2A-VM which is a slightly modified AMD DBM690T.
Build tested on all targets. (cbfstool hangs in an endless loop for
the technexion board.)

Signed-off-by: Carl-Daniel Hailfinger

--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c	(Revision 4646)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/pistachio/mainboard.c	(Arbeitskopie)
@@ -83,7 +83,6 @@
    u16 word;
    u32 dword;
    device_t sm_dev;
-	struct bus pbus;

/* set adt7475 */
    ADT7475_write_byte(0x40, 0x04);
@@ -167,28 +166,19 @@

/* GPM5 as GPIO not USB OC */
    sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
-	dword =
-	    pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.pci.devfn, 0x64);
+	dword = pci_read_config32(sm_dev, 0x64);
    dword |= 1 << 19;
-	pci_cf8_conf1.write32(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.pci.devfn, 0x64, dword);
+	pci_write_config32(sm_dev, 0x64, dword);

/* Enable Client Management Index/Data registers */
-	dword =
-	    pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.pci.devfn, 0x78);
+	dword = pci_read_config32(sm_dev, 0x78);
    dword |= 1 << 11;	/* Cms_enable */
-	pci_cf8_conf1.write32(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.pci.devfn, 0x78, dword);
+	pci_write_config32(sm_dev, 0x78, dword);

/* MiscfuncEnable */
-	byte =
-	    pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,
-				sm_dev->path.pci.devfn, 0x41);
+	byte = pci_read_config8(sm_dev, 0x41);
    byte |= (1 << 5);
-	pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,
-			     sm_dev->path.pci.devfn, 0x41, byte);
+	pci_write_config8(sm_dev, 0x41, byte);

/* set GPM5 as input */
    /* set index register 0C50h to 13h (miscellaneous control) */
@@ -228,12 +218,9 @@
    pm2_iowrite(0x42, byte);

/* set GPIO 64 to input */
-	word =
-	    pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.pci.devfn, 0x56);
+	word = pci_read_config16(sm_dev, 0x56);
    word |= 1 << 7;
-	pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.pci.devfn, 0x56, word);
+	pci_write_config16(sm_dev, 0x56, word);

/* set GPIO 64 internal pull-up */
    byte = pm2_ioread(0xf0);
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c	(Revision 4646)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/amd/dbm690t/mainboard.c	(Arbeitskopie)
@@ -97,32 +97,24 @@
 static void get_ide_dma66()
 {
    u8 byte;
-	/*u32 sm_dev, ide_dev; */
-	device_t sm_dev, ide_dev;
-	struct bus pbus;
+	struct device *sm_dev;
+	struct device *ide_dev;

+	printk_info("%s.\n", __func__);
    sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));

-	byte =
-	    pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary,
-				sm_dev->path.pci.devfn, 0xA9);
+	byte = pci_read_config8(sm_dev, 0xA9);
    byte |= (1 << 5);	/* Set Gpio9 as input */
-	pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary,
-			     sm_dev->path.pci.devfn, 0xA9, byte);
+	pci_write_config8(sm_dev, 0xA9, byte);

ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1));
-	byte =
-	    pci_cf8_conf1.read8(&pbus, ide_dev->bus->secondary,
-				ide_dev->path.pci.devfn, 0x56);
+	byte = pci_read_config8(ide_dev, 0x56);
    byte &= ~(7 << 0);
-	if ((1 << 5) & pci_cf8_conf1.
-	    read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn,
-		  0xAA))
+	if ((1 << 5) & pci_read_config8(sm_dev, 0xAA))
    	byte |= 2 << 0;	/* mode 2 */
    else
    	byte |= 5 << 0;	/* mode 5 */
-	pci_cf8_conf1.write8(&pbus, ide_dev->bus->secondary,
-			     ide_dev->path.pci.devfn, 0x56, byte);
+	pci_write_config8(ide_dev, 0x56, byte);
 }

/*
@@ -133,7 +125,6 @@
    u8 byte;
    u16 word;
    device_t sm_dev;
-	struct bus pbus;

/* set ADT 7461 */
    ADT7461_write_byte(0x0B, 0x50);	/* Local Temperature Hight limit */
@@ -156,12 +147,9 @@

/* set GPIO 64 to input */
    sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
-	word =
-	    pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.pci.devfn, 0x56);
+	word = pci_read_config16(sm_dev, 0x56);
    word |= 1 << 7;
-	pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.pci.devfn, 0x56, word);
+	pci_write_config16(sm_dev, 0x56, word);

/* set GPIO 64 internal pull-up */
    byte = pm2_ioread(0xf0);
--- LinuxBIOSv2-asus_m2a-vm/src/mainboard/technexion/tim8690/mainboard.c	(Revision 4646)
+++ LinuxBIOSv2-asus_m2a-vm/src/mainboard/technexion/tim8690/mainboard.c	(Arbeitskopie)
@@ -59,16 +59,15 @@

u8 byte;
        device_t sm_dev;
-       struct bus pbus;

printk_info("enable_onboard_nic.\n");

sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));

-       byte= pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0x9a);
+       byte = pci_read_config8(sm_dev, 0x9a);
        byte |= ( 1 << 7);
-       pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0x9a,byte);
+       pci_write_config8(sm_dev, 0x9a, byte);

byte=pm_ioread(0x59);
@@ -76,10 +75,10 @@
        pm_iowrite(0x59,byte);

-       byte = pci_cf8_conf1.read8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0xA8);
+       byte = pci_read_config8(sm_dev, 0xA8);

byte |= (1 << 1); //set bit 1 to high
-       pci_cf8_conf1.write8(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0xA8, byte);
+       pci_write_config8(sm_dev, 0xA8, byte);
 }

/* set thermal config
@@ -89,7 +88,6 @@
    u8 byte;
    u16 word;
    device_t sm_dev;
-	struct bus pbus;

/* set ADT 7461 */
    ADT7461_write_byte(0x0B, 0x50);	/* Local Temperature Hight limit */
@@ -112,12 +110,9 @@

/* set GPIO 64 to input */
    sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
-	word =
-	    pci_cf8_conf1.read16(&pbus, sm_dev->bus->secondary,
-				 sm_dev->path.pci.devfn, 0x56);
+	word = pci_read_config16(sm_dev, 0x56);
    word |= 1 << 7;
-	pci_cf8_conf1.write16(&pbus, sm_dev->bus->secondary,
-			      sm_dev->path.pci.devfn, 0x56, word);
+	pci_write_config16(sm_dev, 0x56, word);

/* set GPIO 64 internal pull-up */
    byte = pm2_ioread(0xf0);

[Peter Stuge]

Carl-Daniel Hailfinger wrote:
> Signed-off-by: Carl-Daniel Hailfinger

Acked-by: Peter Stuge

[Carl-Daniel Hailfinger]

On 22.09.2009 04:13, Peter Stuge wrote:
> Carl-Daniel Hailfinger wrote:
> > Signed-off-by: Carl-Daniel Hailfinger
>
> Acked-by: Peter Stuge

Thanks, r4647.

Regards,
Carl-Daniel