Hi guys,
Today I switched out my P2B-LS mainboard for a P2B-L. Same circuit board without the SCSI components. Same W83977EF super I/O. As I have seen in all my boot logs having described the onboard LAN component in the -LS files doesn't really mean much, so I am testing as if it's a P2B-F.
And I got it to boot all the way into the Fedora 11 login prompt, meaning I have a chance to run a superiotool dump. Here's the output:
[root@ojisan superiotool]# ./superiotool -d superiotool r Found Winbond W83977EF/EG (id=0x52, rev=0xf4) at 0x3f0 Register dump: idx 02 20 21 22 23 24 25 26 28 2a 2b 2c 2d 2e 2f val ff 52 f4 ff fe 80 00 00 00 00 00 00 00 00 ff def RR 52 MM ff fe MM 00 MM 00 00 00 00 RR RR RR LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 04 3f def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 00 00 60 00 64 01 0c 83 def 01 00 60 00 64 01 0c 83 LDN 0x07 (GPIO 1) idx 30 60 61 62 63 64 65 70 72 e0 e1 e2 e3 e4 e5 e6 e7 f1 val 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 def 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 LDN 0x08 (GPIO 2) idx 30 60 61 70 72 e8 e9 ea eb ec ed f0 f1 f2 f3 f4 val 00 00 00 00 00 01 01 01 01 01 01 00 ff 00 00 00 def 00 00 00 00 00 01 01 01 01 01 01 00 RR 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 00 00 60 00 76 0b 00 00 00 00 00 8f 33 00 00 00 00 00 00 def 00 00 00 00 MM MM MM 00 00 00 00 00 00 00 00 00 00 RR RR [root@ojisan superiotool]#
The keyboard logical device isn't enabled. This is why PS/2 keyboard doesn't work with the P2B family. But coreboot itself thinks it's being enabled - see log at end of email.
I am suspecting that no PnP devices are actually being enabled, as FDC,LPT,COM1,COM2 could all be enabled by hardware strapping.
Now I want to find out why. Can someone explain how the ISA PnP code in coreboot is structured, or at least how and where to insert debug print statements? I believe at this point printk() should work.
Thanks Keith
--- coreboot log starting from star of RAM stage
... POST: 0x80 POST: 0x39 coreboot-4.0-r5230:5262M Sun Mar 21 13:42:31 EDT 2010 booting... POST: 0x40 Calibrating delay loop... end 922cd39b, start 3f8c4469 32-bit delta 1322 calibrate_tsc 32-bit result is 1322 clocks_per_usec: 1322 Enumerating buses... Show all devs...Before Device Enumeration. Root Device: enabled 1, 0 resources APIC_CLUSTER: 0: enabled 1, 0 resources APIC: 00: enabled 1, 0 resources PCI_DOMAIN: 0000: enabled 1, 0 resources PCI: 00:00.0: enabled 1, 0 resources PCI: 00:01.0: enabled 1, 0 resources PCI: 00:04.0: enabled 1, 0 resources PNP: 03f0.0: enabled 1, 3 resources PNP: 03f0.1: enabled 1, 2 resources PNP: 03f0.2: enabled 1, 2 resources PNP: 03f0.3: enabled 1, 2 resources PNP: 03f0.5: enabled 1, 4 resources PNP: 03f0.6: enabled 1, 0 resources PNP: 03f0.7: enabled 1, 0 resources PNP: 03f0.8: enabled 1, 0 resources PNP: 03f0.a: enabled 1, 0 resources PCI: 00:04.1: enabled 1, 0 resources PCI: 00:04.2: enabled 1, 0 resources PCI: 00:04.3: enabled 1, 0 resources Compare with tree... Root Device: enabled 1, 0 resources APIC_CLUSTER: 0: enabled 1, 0 resources APIC: 00: enabled 1, 0 resources PCI_DOMAIN: 0000: enabled 1, 0 resources PCI: 00:00.0: enabled 1, 0 resources PCI: 00:01.0: enabled 1, 0 resources PCI: 00:04.0: enabled 1, 0 resources PNP: 03f0.0: enabled 1, 3 resources PNP: 03f0.1: enabled 1, 2 resources PNP: 03f0.2: enabled 1, 2 resources PNP: 03f0.3: enabled 1, 2 resources PNP: 03f0.5: enabled 1, 4 resources PNP: 03f0.6: enabled 1, 0 resources PNP: 03f0.7: enabled 1, 0 resources PNP: 03f0.8: enabled 1, 0 resources PNP: 03f0.a: enabled 1, 0 resources PCI: 00:04.1: enabled 1, 0 resources PCI: 00:04.2: enabled 1, 0 resources PCI: 00:04.3: enabled 1, 0 resources scan_static_bus for Root Device APIC_CLUSTER: 0 enabled Finding PCI configuration type. PCI: Using configuration type 1 POST: 0x5f PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 POST: 0x24 PCI: 00:00.0 [8086/7190] ops PCI: 00:00.0 [8086/7190] enabled PCI: 00:01.0 [8086/7191] enabled PCI: 00:02.0, bad id 0xffffffff PCI: 00:03.0, bad id 0xffffffff PCI: 00:04.0 [8086/7110] bus ops PCI: 00:04.0 [8086/7110] enabled PCI: 00:04.1 [8086/7111] ops PCI: 00:04.1 [8086/7111] enabled PCI: 00:04.2 [8086/7112] ops PCI: 00:04.2 [8086/7112] enabled PCI: 00:04.3 [8086/7113] bus ops PCI: 00:04.3 [8086/7113] enabled PCI: 00:04.4, bad id 0xffffffff PCI: 00:04.5, bad id 0xffffffff PCI: 00:04.6, bad id 0xffffffff PCI: 00:04.7, bad id 0xffffffff PCI: 00:05.0, bad id 0xffffffff PCI: 00:06.0, bad id 0xffffffff PCI: 00:07.0, bad id 0xffffffff PCI: 00:08.0, bad id 0xffffffff PCI: 00:09.0, bad id 0xffffffff PCI: 00:0a.0, bad id 0xffffffff PCI: 00:0b.0, bad id 0xffffffff PCI: 00:0c.0, bad id 0xffffffff PCI: 00:0d.0, bad id 0xffffffff PCI: 00:0e.0, bad id 0xffffffff PCI: 00:0f.0, bad id 0xffffffff PCI: 00:10.0, bad id 0xffffffff PCI: 00:11.0, bad id 0xffffffff PCI: 00:12.0, bad id 0xffffffff PCI: 00:13.0, bad id 0xffffffff PCI: 00:14.0, bad id 0xffffffff PCI: 00:15.0, bad id 0xffffffff PCI: 00:16.0, bad id 0xffffffff PCI: 00:17.0, bad id 0xffffffff PCI: 00:18.0, bad id 0xffffffff PCI: 00:19.0, bad id 0xffffffff PCI: 00:1a.0, bad id 0xffffffff PCI: 00:1b.0, bad id 0xffffffff PCI: 00:1c.0, bad id 0xffffffff PCI: 00:1d.0, bad id 0xffffffff PCI: 00:1e.0, bad id 0xffffffff PCI: 00:1f.0, bad id 0xffffffff POST: 0x25 do_pci_scan_bridge for PCI: 00:01.0 PCI: pci_scan_bus for bus 01 POST: 0x24 malloc Enter, size 1092, free_mem_ptr 00120000 malloc 00120000 PCI: 01:00.0 [1002/475a] enabled PCI: 01:01.0, bad id 0xffffffff PCI: 01:02.0, bad id 0xffffffff PCI: 01:03.0, bad id 0xffffffff PCI: 01:04.0, bad id 0xffffffff PCI: 01:05.0, bad id 0xffffffff PCI: 01:06.0, bad id 0xffffffff PCI: 01:07.0, bad id 0xffffffff PCI: 01:08.0, bad id 0xffffffff PCI: 01:09.0, bad id 0xffffffff PCI: 01:0a.0, bad id 0xffffffff PCI: 01:0b.0, bad id 0xffffffff PCI: 01:0c.0, bad id 0xffffffff PCI: 01:0d.0, bad id 0xffffffff PCI: 01:0e.0, bad id 0xffffffff PCI: 01:0f.0, bad id 0xffffffff PCI: 01:10.0, bad id 0xffffffff PCI: 01:11.0, bad id 0xffffffff PCI: 01:12.0, bad id 0xffffffff PCI: 01:13.0, bad id 0xffffffff PCI: 01:14.0, bad id 0xffffffff PCI: 01:15.0, bad id 0xffffffff PCI: 01:16.0, bad id 0xffffffff PCI: 01:17.0, bad id 0xffffffff PCI: 01:18.0, bad id 0xffffffff PCI: 01:19.0, bad id 0xffffffff PCI: 01:1a.0, bad id 0xffffffff PCI: 01:1b.0, bad id 0xffffffff PCI: 01:1c.0, bad id 0xffffffff PCI: 01:1d.0, bad id 0xffffffff PCI: 01:1e.0, bad id 0xffffffff PCI: 01:1f.0, bad id 0xffffffff POST: 0x25 PCI: pci_scan_bus returning with max=001 POST: 0x55 do_pci_scan_bridge returns max 1 scan_static_bus for PCI: 00:04.0 PNP: 03f0.0 enabled PNP: 03f0.1 enabled PNP: 03f0.2 enabled PNP: 03f0.3 enabled PNP: 03f0.5 enabled PNP: 03f0.6 enabled PNP: 03f0.7 enabled PNP: 03f0.8 enabled PNP: 03f0.a enabled scan_static_bus for PCI: 00:04.0 done scan_static_bus for PCI: 00:04.3 scan_static_bus for PCI: 00:04.3 done PCI: pci_scan_bus returning with max=001 POST: 0x55 scan_static_bus for Root Device done done POST: 0x66 Setting up VGA for PCI: 01:00.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 APIC_CLUSTER: 0 read_resources bus 0 link: 0 APIC: 00 missing read_resources APIC_CLUSTER: 0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 PCI: 00:01.0 read_resources bus 1 link: 0 done PCI: 00:04.0 read_resources bus 0 link: 0 PNP: 03f0.8 missing read_resources PCI: 00:04.0 read_resources bus 0 link: 0 done PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device links 1 child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00 APIC: 00 links 0 child on link 0 NULL PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:00.0 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 400401 00 index 10000000 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40 040200 index 10000100 PCI: 00:00.0 links 0 child on link 0 NULL PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff fl ags 1200 index 10 PCI: 00:01.0 links 1 child on link 0 PCI: 01:00.0 PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 i ndex 1c PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 812 02 index 24 PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 802 02 index 20 PCI: 01:00.0 links 0 child on link 0 NULL PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff fl ags 1200 index 10 PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 in dex 14 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18 PCI: 01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flag s 2200 index 30 PCI: 00:04.0 links 1 child on link 0 PNP: 03f0.0 PCI: 00:04.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c00001 00 index 1 PCI: 00:04.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0000200 index 2 PCI: 00:04.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0 000200 index 3 PNP: 03f0.0 links 0 child on link 0 NULL PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 ind ex 74 PNP: 03f0.1 links 0 child on link 0 NULL PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 03f0.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 03f0.2 links 0 child on link 0 NULL PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 03f0.3 links 0 child on link 0 NULL PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60 PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 03f0.5 links 0 child on link 0 NULL PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c000 0100 index 60 PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c000 0100 index 62 PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 70 PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 ind ex 72 PNP: 03f0.6 links 0 child on link 0 NULL PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.7 links 0 child on link 0 NULL PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 i ndex 60 PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.8 links 0 child on link 0 NULL PNP: 03f0.a links 0 child on link 0 NULL PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PCI: 00:04.1 links 0 child on link 0 NULL PCI: 00:04.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 inde x 20 PCI: 00:04.2 links 0 child on link 0 NULL PCI: 00:04.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 inde x 20 PCI: 00:04.3 links 0 child on link 0 NULL PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: f fff PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: fff f PCI: 01:00.0 14 * [0x0 - 0xff] io PCI: 00:01.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit : ffff done PCI: 00:01.0 1c * [0x0 - 0xfff] io PCI: 00:04.2 20 * [0x1000 - 0x101f] io PCI: 00:04.1 20 * [0x1020 - 0x102f] io PCI_DOMAIN: 0000 compute_resources_io: base: 1030 size: 1030 align: 12 gran: 0 l imit: ffff done PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit : ffffffff PCI: 01:00.0 10 * [0x0 - 0xffffff] prefmem PCI: 00:01.0 compute_resources_prefmem: base: 1000000 size: 1000000 align: 24 gr an: 20 limit: ffffffff done PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ff ffffff PCI: 01:00.0 30 * [0x0 - 0x1ffff] mem PCI: 01:00.0 18 * [0x20000 - 0x20fff] mem PCI: 00:01.0 compute_resources_mem: base: 21000 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem PCI: 00:01.0 24 * [0x10000000 - 0x10ffffff] prefmem PCI: 00:01.0 20 * [0x11000000 - 0x110fffff] mem PCI_DOMAIN: 0000 compute_resources_mem: base: 11100000 size: 11100000 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: PCI_DOMAIN: 0000 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI_DOMAIN: 0000 constrain_resources: PCI: 00:00.0 constrain_resources: PCI: 00:01.0 constrain_resources: PCI: 01:00.0 constrain_resources: PCI: 00:04.0 constrain_resources: PNP: 03f0.0 constrain_resources: PNP: 03f0.1 constrain_resources: PNP: 03f0.2 constrain_resources: PNP: 03f0.3 constrain_resources: PNP: 03f0.5 constrain_resources: PNP: 03f0.6 constrain_resources: PNP: 03f0.7 constrain_resources: PNP: 03f0.8 constrain_resources: PNP: 03f0.a constrain_resources: PCI: 00:04.1 constrain_resources: PCI: 00:04.2 constrain_resources: PCI: 00:04.3 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff lim->base 00001000 lim->limit 0000ffff avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff lim->base 00000000 lim->limit febfffff Setting resources... PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:1030 align:12 gran:0 limi t:ffff Assigned: PCI: 00:01.0 1c * [0x1000 - 0x1fff] io Assigned: PCI: 00:04.2 20 * [0x2000 - 0x201f] io Assigned: PCI: 00:04.1 20 * [0x2020 - 0x202f] io PCI_DOMAIN: 0000 allocate_resources_io: next_base: 2030 size: 1030 align: 12 gra n: 0 done PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:f fff Assigned: PCI: 01:00.0 14 * [0x1000 - 0x10ff] io PCI: 00:01.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 1 2 done PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:11100000 align:28 gr an:0 limit:febfffff Assigned: PCI: 00:00.0 10 * [0xe0000000 - 0xefffffff] prefmem Assigned: PCI: 00:01.0 24 * [0xf0000000 - 0xf0ffffff] prefmem Assigned: PCI: 00:01.0 20 * [0xf1000000 - 0xf10fffff] mem PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f1100000 size: 11100000 alig n: 28 gran: 0 done PCI: 00:01.0 allocate_resources_prefmem: base:f0000000 size:1000000 align:24 gra n:20 limit:febfffff Assigned: PCI: 01:00.0 10 * [0xf0000000 - 0xf0ffffff] prefmem PCI: 00:01.0 allocate_resources_prefmem: next_base: f1000000 size: 1000000 align : 24 gran: 20 done PCI: 00:01.0 allocate_resources_mem: base:f1000000 size:100000 align:20 gran:20 limit:febfffff Assigned: PCI: 01:00.0 30 * [0xf1000000 - 0xf101ffff] mem Assigned: PCI: 01:00.0 18 * [0xf1020000 - 0xf1020fff] mem PCI: 00:01.0 allocate_resources_mem: next_base: f1021000 size: 100000 align: 20 gran: 20 done Root Device assign_resources, bus 0 link: 0 Setting RAM size to 256 MB PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefm em PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 0 1 io PCI: 00:01.0 24 <- [0x00f0000000 - 0x00f0ffffff] size 0x01000000 gran 0x14 bus 0 1 prefmem PCI: 00:01.0 20 <- [0x00f1000000 - 0x00f10fffff] size 0x00100000 gran 0x14 bus 0 1 mem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f0ffffff] size 0x01000000 gran 0x18 prefm em PCI: 01:00.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io PCI: 01:00.0 18 <- [0x00f1020000 - 0x00f1020fff] size 0x00001000 gran 0x0c mem PCI: 01:00.0 30 <- [0x00f1000000 - 0x00f101ffff] size 0x00020000 gran 0x11 romem PCI: 00:01.0 assign_resources, bus 1 link: 0 PCI: 00:04.0 assign_resources, bus 0 link: 0 PNP: 03f0.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io PNP: 03f0.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq PNP: 03f0.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq PNP: 03f0.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io PNP: 03f0.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq ERROR: PNP: 03f0.1 74 drq size: 0x0000000001 not assigned PNP: 03f0.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io PNP: 03f0.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq PNP: 03f0.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io PNP: 03f0.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq PNP: 03f0.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io PNP: 03f0.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io PNP: 03f0.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq PNP: 03f0.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq ERROR: PNP: 03f0.6 60 io size: 0x0000000008 not assigned ERROR: PNP: 03f0.6 70 irq size: 0x0000000001 not assigned ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned ERROR: PNP: 03f0.7 62 io size: 0x0000000002 not assigned ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned ERROR: PNP: 03f0.a 70 irq size: 0x0000000001 not assigned PCI: 00:04.0 assign_resources, bus 0 link: 0 PCI: 00:04.1 20 <- [0x0000002020 - 0x000000202f] size 0x00000010 gran 0x04 io PCI: 00:04.2 20 <- [0x0000002000 - 0x000000201f] size 0x00000020 gran 0x05 io PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device links 1 child on link 0 APIC_CLUSTER: 0 APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00 APIC: 00 links 0 child on link 0 NULL PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:00.0 PCI_DOMAIN: 0000 resource base 1000 size 1030 align 12 gran 0 limit ffff flags 40040100 index 10000000 PCI_DOMAIN: 0000 resource base e0000000 size 11100000 align 28 gran 0 limit fe bfffff flags 40040200 index 10000100 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004 200 index a PCI_DOMAIN: 0000 resource base c0000 size ff40000 align 0 gran 0 limit 0 flags e0004200 index b PCI: 00:00.0 links 0 child on link 0 NULL PCI: 00:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit febf ffff flags 60001200 index 10 PCI: 00:01.0 links 1 child on link 0 PCI: 01:00.0 PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 6 0080102 index 1c PCI: 00:01.0 resource base f0000000 size 1000000 align 24 gran 20 limit febff fff flags 60081202 index 24 PCI: 00:01.0 resource base f1000000 size 100000 align 20 gran 20 limit febfff ff flags 60080202 index 20 PCI: 01:00.0 links 0 child on link 0 NULL PCI: 01:00.0 resource base f0000000 size 1000000 align 24 gran 24 limit febf ffff flags 60001200 index 10 PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 600 00100 index 14 PCI: 01:00.0 resource base f1020000 size 1000 align 12 gran 12 limit febffff f flags 60000200 index 18 PCI: 01:00.0 resource base f1000000 size 20000 align 17 gran 17 limit febfff ff flags 60002200 index 30 PCI: 00:04.0 links 1 child on link 0 PNP: 03f0.0 PCI: 00:04.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c00001 00 index 1 PCI: 00:04.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0000200 index 2 PCI: 00:04.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0 000200 index 3 PNP: 03f0.0 links 0 child on link 0 NULL PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 ind ex 74 PNP: 03f0.1 links 0 child on link 0 NULL PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 03f0.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74 PNP: 03f0.2 links 0 child on link 0 NULL PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 03f0.3 links 0 child on link 0 NULL PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60 PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 03f0.5 links 0 child on link 0 NULL PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e000 0100 index 60 PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e000 0100 index 62 PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 70 PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 ind ex 72 PNP: 03f0.6 links 0 child on link 0 NULL PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60 PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.7 links 0 child on link 0 NULL PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 i ndex 60 PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62 PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 03f0.8 links 0 child on link 0 NULL PNP: 03f0.a links 0 child on link 0 NULL PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PCI: 00:04.1 links 0 child on link 0 NULL PCI: 00:04.1 resource base 2020 size 10 align 4 gran 4 limit ffff flags 60000 100 index 20 PCI: 00:04.2 links 0 child on link 0 NULL PCI: 00:04.2 resource base 2000 size 20 align 5 gran 5 limit ffff flags 60000 100 index 20 PCI: 00:04.3 links 0 child on link 0 NULL Done allocating resources. POST: 0x88 Enabling resources... PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 bridge ctrl <- 008b PCI: 00:01.0 cmd <- 07 PCI: 01:00.0 cmd <- 83 PCI: 00:04.0 cmd <- 07 PCI: 00:04.1 cmd <- 01 PCI: 00:04.2 cmd <- 01 PCI: 00:04.3 cmd <- 01 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor Intel device 6b1 CPU: family 06, model 0b, stepping 01 POST: 0x60 Enabling cache
Setting fixed MTRRs(0-88) Type: UC Setting fixed MTRRs(0-16) Type: WB Setting fixed MTRRs(24-88) Type: WB DONE fixed MTRRs call enable_fixed_mtrr() Setting variable MTRR 0, base: 0MB, range: 256MB, type WB ADDRESS_MASK_HIGH=0xf Zero-sized MTRR range @0KB DONE variable MTRRs Clear out the extra MTRR's call enable_var_mtrr() Leave x86_setup_var_mtrrs POST: 0x6a
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
POST: 0x93 microcode_info: sig = 0x000006b1 pf=0x00000010 rev = 0x00000000 microcode updated to revision: 00000000 from revision 00000000 Setting up local apic... apic_id: 0x00 done. POST: 0x9b CPU #0 initialized PCI: 00:00.0 init Northbridge Init PCI: 00:04.0 init RTC Init PNP: 03f0.0 init PNP: 03f0.1 init PNP: 03f0.2 init PNP: 03f0.3 init PNP: 03f0.5 init Keyboard init... Couldn't cleanup the keyboard controller buffers Status (0x64): 0xff, Buffer (0x60): 0xff PNP: 03f0.6 init PNP: 03f0.7 init PNP: 03f0.a init PCI: 00:04.1 init IDE: Primary IDE interface: on IDE: Secondary IDE interface: on IDE: Access to legacy IDE ports: on IDE: Primary IDE interface, drive 0: UDMA/33: off IDE: Primary IDE interface, drive 1: UDMA/33: off IDE: Secondary IDE interface, drive 0: UDMA/33: off IDE: Secondary IDE interface, drive 1: UDMA/33: off PCI: 00:04.2 init PCI: 01:00.0 init Check CBFS header at fffeffe0 magic is 4f524243 Found CBFS header at fffeffe0 Check fallback/coreboot_ram CBFS: follow chain: fffc0000 + 38 + 8af8 + align -> fffc8b40 Check fallback/payload CBFS: follow chain: fffc8b40 + 38 + 86fe + align -> fffd1280 Check CBFS: follow chain: fffd1280 + 28 + 1ed38 + align -> ffff0000 CBFS: Could not find file pci1002,475a.rom On card, rom address for PCI: 01:00.0 = f1000000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0158 PCI ROM Image, Vendor 1002, Device 475a, PCI ROM Image, Class Code 030000, Code Type 00 copying VGA ROM Image from f1000000 to 0xc0000, 0x8000 bytes Real mode stub @00000600: 422 bytes Calling Option ROM... oprom: INT# 0x1a oprom: eax: 0000b109 ebx: 00000100 ecx: 00000100 edx: 00120000 oprom: ebp: 0011ff40 esp: 00000fd6 edi: 0000002e esi: 00001900 oprom: ip: 0184 cs: c000 flags: 00000046 0xb109: bus 1 devfn 0x0 reg 0x2e val 0x84 oprom: INT# 0x1a oprom: eax: 0000b109 ebx: 00000100 ecx: 00000084 edx: 00120000 oprom: ebp: 0011ff40 esp: 00000fd6 edi: 00000014 esi: 00001900 oprom: ip: 01e6 cs: c000 flags: 00000046 0xb109: bus 1 devfn 0x0 reg 0x14 val 0x1001 oprom: INT# 0x1a oprom: eax: 0000b108 ebx: 00000100 ecx: 0000efff edx: 001210a0 oprom: ebp: 0011ff40 esp: 00000fd6 edi: 00000004 esi: 00001900 oprom: ip: 0219 cs: c000 flags: 00000006 0xb108: bus 1 devfn 0x0 reg 0x4 val 0x83 oprom: INT# 0x1a oprom: eax: 0000b10b ebx: 00000100 ecx: 00000087 edx: 001210a0 oprom: ebp: 0011ff40 esp: 00000fd6 edi: 00000004 esi: 00001900 oprom: ip: 0221 cs: c000 flags: 00000086 0xb10b: bus 1 devfn 0x0 reg 0x4 val 0x87 oprom: INT# 0x1a oprom: eax: 0000b10a ebx: 00000100 ecx: 00000087 edx: 001210a0 oprom: ebp: 0011ff40 esp: 00000fd6 edi: 00000018 esi: 00001900 oprom: ip: 0229 cs: c000 flags: 00000086 0xb10a: bus 1 devfn 0x0 reg 0x18 val 0xf1020000 oprom: INT# 0x42 oprom: eax: 00000007 ebx: 00001004 ecx: 00000000 edx: 001203c2 oprom: ebp: 00110000 esp: 00000fda edi: 0000ffff esi: 00000000 oprom: ip: 3e3d cs: c000 flags: 00000006 Unsupported software interrupt #0x42 error! ... Option ROM returned. Devices initialized Show all devs...After init. Root Device: enabled 1, 0 resources APIC_CLUSTER: 0: enabled 1, 0 resources APIC: 00: enabled 1, 0 resources PCI_DOMAIN: 0000: enabled 1, 4 resources PCI: 00:00.0: enabled 1, 1 resources PCI: 00:01.0: enabled 1, 3 resources PCI: 00:04.0: enabled 1, 3 resources PNP: 03f0.0: enabled 1, 3 resources PNP: 03f0.1: enabled 1, 3 resources PNP: 03f0.2: enabled 1, 2 resources PNP: 03f0.3: enabled 1, 2 resources PNP: 03f0.5: enabled 1, 4 resources PNP: 03f0.6: enabled 1, 2 resources PNP: 03f0.7: enabled 1, 3 resources PNP: 03f0.8: enabled 1, 0 resources PNP: 03f0.a: enabled 1, 1 resources PCI: 00:04.1: enabled 1, 1 resources PCI: 00:04.2: enabled 1, 1 resources PCI: 00:04.3: enabled 1, 0 resources PCI: 01:00.0: enabled 1, 4 resources POST: 0x89 Initializing CBMEM area to 0xfff0000 (65536 bytes) Adding CBMEM entry as no. 1 Moving GDT to 0fff0200...ok High Tables Base is fff0000. POST: 0x9a Copying Interrupt Routing Table to 0x000f0000... done. Adding CBMEM entry as no. 2 Copying Interrupt Routing Table to 0x0fff0400... done. PIRQ table: 144 bytes. POST: 0x9d Multiboot Information structure has been written. POST: 0x9d Adding CBMEM entry as no. 3 Writing high table forward entry at 0x00000500 Wrote coreboot table at: 00000500 - 00000518 checksum dbdf New low_table_end: 0x00000518 Now going to write high coreboot table at 0x0fff1400 rom_table_end = 0x0fff1400 Adjust low_table_end from 0x00000518 to 0x00001000 Adjust rom_table_end from 0x0fff1400 to 0x10000000 Adding high table area coreboot memory table: 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000c0000-000000000ffeffff: RAM 3. 000000000fff0000-000000000fffffff: CONFIGURATION TABLES Wrote coreboot table at: 0fff1400 - 0fff1598 checksum 7b67 coreboot table: 408 bytes. POST: 0x9e 0. FREE SPACE 0fff3400 0000cc00 1. GDT 0fff0200 00000200 2. IRQ TABLE 0fff0400 00001000 3. COREBOOT 0fff1400 00002000 Check CBFS header at fffeffe0 magic is 4f524243 Found CBFS header at fffeffe0 Check fallback/coreboot_ram CBFS: follow chain: fffc0000 + 38 + 8af8 + align -> fffc8b40 Check fallback/payload Got a payload Loading segment from rom address 0xfffc8b78 data (compression=1) malloc Enter, size 36, free_mem_ptr 00120444 malloc 00120444 New segment dstaddr 0xef000 memsize 0x11000 srcaddr 0xfffc8bb0 filesize 0x86c6 (cleaned up) New segment addr 0xef000 size 0x11000 offset 0xfffc8bb0 filesize 0x86c6 Loading segment from rom address 0xfffc8b94 Entry Point 0x000fdf8b Loading Segment: addr: 0x00000000000ef000 memsz: 0x0000000000011000 filesz: 0x00 000000000086c6 lb: [0x0000000000100000, 0x0000000000124000) Post relocation: addr: 0x00000000000ef000 memsz: 0x0000000000011000 filesz: 0x00 000000000086c6 using LZMA [ 0x00000000000ef000, 0000000000100000, 0x0000000000100000) <- 00000000fffc8bb0 dest 000ef000, end 00100000, bouncebuffer ffa8000 Loaded segments Jumping to boot code at fdf8b POST: 0xfe entry = 0x000fdf8b lb_start = 0x00100000 lb_size = 0x00024000 adjust = 0x0fecc000 buffer = 0x0ffa8000 elf_boot_notes = 0x0011004c adjusted_boot_notes = 0x0ffdc04c Start bios (version pre-0.5.2-20100219_203152-htcore) Found mainboard ASUS P2B-L Found CBFS header at 0xfffeffe0 Ram Size=0x0fff0000 (0x0000000000000000 high) CPU Mhz=1339 Found 1 cpu(s) max supported 1 cpu(s) Copying PIR from 0x0fff0400 to 0x000f8c30 SMBIOS ptr=0x000f8c10 table=0x0ffefef0 Scan for VGA option rom Running option rom at c000:0003 Turning on vga console Starting SeaBIOS (version pre-0.5.2-20100219_203152-htcore)
WARNING - Timeout at i8042_flush:68! Found 1 lpt ports Found 2 serial ports ATA controller 0 at 1f0/3f4/2020 (irq 14 dev 21) ATA controller 1 at 170/374/2028 (irq 15 dev 21) ata1-0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 Scan for option roms Press F12 for boot menu.
Returned 53248 bytes of ZoneHigh e820 map has 5 items: 0: 0000000000000000 - 000000000009f400 = 1 1: 000000000009f400 - 00000000000a0000 = 2 2: 00000000000f0000 - 0000000000100000 = 2 3: 0000000000100000 - 000000000ffed000 = 1 4: 000000000ffed000 - 0000000010000000 = 2 enter handle_19: NULL Booting from Floppy... Boot failed: could not read the boot disk
enter handle_18: NULL Booting from CD-Rom... Boot failed: Could not read from CDROM (code 0001) enter handle_18: NULL Booting from Hard Disk... Booting from 0000:7c00
Keith Hui wrote:
Hi guys,
Today I switched out my P2B-LS mainboard for a P2B-L. Same circuit board without the SCSI components. Same W83977EF super I/O. As I have seen in all my boot logs having described the onboard LAN component in the -LS files doesn't really mean much, so I am testing as if it's a P2B-F.
And I got it to boot all the way into the Fedora 11 login prompt, meaning I have a chance to run a superiotool dump. Here's the output:
[root@ojisan superiotool]# ./superiotool -d superiotool r Found Winbond W83977EF/EG (id=0x52, rev=0xf4) at 0x3f0 Register dump: idx 02 20 21 22 23 24 25 26 28 2a 2b 2c 2d 2e 2f val ff 52 f4 ff fe 80 00 00 00 00 00 00 00 00 ff def RR 52 MM ff fe MM 00 MM 00 00 00 00 RR RR RR LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 01 03 f0 06 02 0e 00 ff 00 00 def 01 03 f0 06 02 0e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 01 03 78 07 04 3f def 01 03 78 07 04 3f LDN 0x02 (COM1) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (COM2) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 00 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 00 00 60 00 64 01 0c 83 def 01 00 60 00 64 01 0c 83 LDN 0x07 (GPIO 1) idx 30 60 61 62 63 64 65 70 72 e0 e1 e2 e3 e4 e5 e6 e7 f1 val 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 def 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 LDN 0x08 (GPIO 2) idx 30 60 61 70 72 e8 e9 ea eb ec ed f0 f1 f2 f3 f4 val 00 00 00 00 00 01 01 01 01 01 01 00 ff 00 00 00 def 00 00 00 00 00 01 01 01 01 01 01 00 RR 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f3 f4 f6 f7 f9 fe ff val 00 00 60 00 76 0b 00 00 00 00 00 8f 33 00 00 00 00 00 00 def 00 00 00 00 MM MM MM 00 00 00 00 00 00 00 00 00 00 RR RR [root@ojisan superiotool]#
The keyboard logical device isn't enabled. This is why PS/2 keyboard doesn't work with the P2B family. But coreboot itself thinks it's being enabled - see log at end of email.
I am suspecting that no PnP devices are actually being enabled, as FDC,LPT,COM1,COM2 could all be enabled by hardware strapping.
I had the same problem with a P2B.
news://news.gmane.org:119/hj1sjv$elg$1@ger.gmane.org
I never got a reply :-(
The function "pnp_enable" only ever disables functions, yet the keyboard function of the superio starts off disabled. This is documented behavior in the Winbond data sheet.
The simplest fix is to change this function to actually do the enable / disable. I don't have the code to hand, but if you grep for this function name it should be obvious.
MM
PS. The internet has the source:
http://tracker.coreboot.org/trac/coreboot/browser/trunk/src/devices/pnp_devi...
Change
152 void pnp_enable(device_t dev) 153 { 154 if (!dev->enabled) { 155 pnp_set_logical_device(dev); 156 pnp_set_enable(dev, 0); 157 } 158 }
To
152 void pnp_enable(device_t dev) 153 { 155 pnp_set_logical_device(dev); 156 pnp_set_enable(dev, dev->enabled); 158 }
(This is from memory. I don't really understand all of this code, this might not be the best fix.)
On Mon, Mar 22, 2010 at 6:38 AM, Mark Marshall mark.marshall@csr.com wrote:
Change
152 void pnp_enable(device_t dev) 153 { 154 if (!dev->enabled) { 155 pnp_set_logical_device(dev); 156 pnp_set_enable(dev, 0); 157 } 158 }
the pnp code was never quite finished in some ways ... void pnp_enable(device_t dev) void pnp_enable(device_t dev {
154 if (!dev->enabled) { 155 pnp_set_logical_device(dev); 156 pnp_set_enable(dev, 0); 157 } else { 155 pnp_set_logical_device(dev); 156 pnp_set_enable(dev, 1);
}
sorry for formatting, I'm where it's not easy to do.
So if it's not enabled, disable it; else enable it.
Others can comment on whether this is going to be a bad idea.
ron
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Keith Hui -
Mark Marshall -
Myles Watson -
ron minnich