Hi,
here's a first patch for the 440BX code and the Tyan S1846 and the 82371EB southbridge which gets my Tyan S1846 a lot further in the boot process.
However, it cannot boot a payload, yet.
It seems the major problem was that I did ram_check() on the whole range from 0 - 64 MB (in my case; I use a 64 MB DIMM for testing). This cannot work of course, as the range from 640 KB - 1 MB is _not_ RAM but rather reserved for all kinds of other stuff (thanks Stefan for pointing this out!).
Leaving out that range, but checking the rest of RAM, I get a "DRAM range verified", so it seems RAM init _does_ work after all. (it's hardcoded to my board and setup of course, but that'll be fixed)
I've tried setting up the PCI devices correctly in Config.lb, but I'm absolutely not sure that I got it all right. Can somebody please check this and let me know of any stupid errors I made?
Here's the lspci output from the Tyan S1846:
00:00.0 0600: 8086:7190 (rev 03) 00:01.0 0604: 8086:7191 (rev 03) 00:07.0 0601: 8086:7110 (rev 02) 00:07.1 0101: 8086:7111 (rev 01) 00:07.2 0c03: 8086:7112 (rev 01) 00:07.3 0680: 8086:7113 (rev 02) 00:10.0 0300: 5333:5631 (rev 06) 00:11.0 0200: 10ec:8029
00:00.0 Host bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 03) 00:01.0 PCI bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 03) 00:07.0 ISA bridge: Intel Corporation 82371AB/EB/MB PIIX4 ISA (rev 02) 00:07.1 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE (rev 01) 00:07.2 USB Controller: Intel Corporation 82371AB/EB/MB PIIX4 USB (rev 01) 00:07.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 02) 00:10.0 VGA compatible controller: S3 Inc. 86c325 [ViRGE] (rev 06) 00:11.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8029(AS)
-[0000:00]-+-00.0 Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host bridge +-01.0-[0000:01]-- +-07.0 Intel Corporation 82371AB/EB/MB PIIX4 ISA +-07.1 Intel Corporation 82371AB/EB/MB PIIX4 IDE +-07.2 Intel Corporation 82371AB/EB/MB PIIX4 USB +-07.3 Intel Corporation 82371AB/EB/MB PIIX4 ACPI +-10.0 S3 Inc. 86c325 [ViRGE] -11.0 Realtek Semiconductor Co., Ltd. RTL-8029(AS)
(5333:5631 and 10ec:8029 are add-on cards -- VGA and Ethernet)
And this is my current try to setup Config.lb:
chip northbridge/intel/i440bx # Northbridge device pci_domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 off end # PCI bridge TODO: AGP bridge? # device pci 7.0 on end # ISA bridge chip southbridge/intel/i82371eb # Southbridge device pci 7.0 on # ISA bridge ??? chip superio/nsc/pc87309 # Super I/O device pnp 2e.0 on end # Floppy device pnp 2e.1 on end # Parallel port device pnp 2e.2 on end # Com2 device pnp 2e.3 on # Com1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.4 on end # Power mgmt. device pnp 2e.5 on end # Mouse device pnp 2e.6 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 # ??? end end device pci 7.1 on end # IDE device pci 7.2 on end # USB device pci 7.3 on end # ACPI end end end chip cpu/intel/slot_2 end end
Does that look correct?
Also, a full boot log is attached. The PCI init _seems_ to work, at least partially.
The current end of the story is that elfboot cannot find the payload, not sure why. Wrong PCI init? Wrong RAM init? Wrong payload location?
Thanks, Uwe.
On Sun, 2007-04-29 at 14:50 +0200, Uwe Hermann wrote:
Hi,
here's a first patch for the 440BX code and the Tyan S1846 and the 82371EB southbridge which gets my Tyan S1846 a lot further in the boot process.
However, it cannot boot a payload, yet.
It seems the major problem was that I did ram_check() on the whole range from 0 - 64 MB (in my case; I use a 64 MB DIMM for testing). This cannot work of course, as the range from 640 KB - 1 MB is _not_ RAM but rather reserved for all kinds of other stuff (thanks Stefan for pointing this out!).
Yup. I didn't even need to patch the latest svn version with the memory fix for DRAM to find my memory.
If I look at my log, I see:
PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/7190] ops PCI: 00:00.0 [8086/7190] enabled PCI: 00:01.0 [8086/7191] disabled PCI: devfn 0x9, bad id 0xffffffff PCI: devfn 0xa, bad id 0xffffffff PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff
The "0xffffffff" reminds me of seeing something when using hexedit with viewing the bios mtd flash device (ie. modprobe l440gx and hexedit /dev/mtd0) and not unmasking the bios flash device (or... using flashrom to enable the device).
Almost as if, we're mapping pci to memory, and the mapping isn't being written to ram? .. as such, can't load elf into memory ... and of course, can't execute from ram?
(Of course, I'm probably entirely wrong here.)
Attached my session.log, but I think it's very similar to yours except for my additional PCI devices along with 1GB of ram (all 4 banks filled).
I'm going to try only loading one bank of ram just for kicks.
Leaving out that range, but checking the rest of RAM, I get a "DRAM range verified", so it seems RAM init _does_ work after all. (it's hardcoded to my board and setup of course, but that'll be fixed)
I've tried setting up the PCI devices correctly in Config.lb, but I'm absolutely not sure that I got it all right. Can somebody please check this and let me know of any stupid errors I made?
Here's the lspci output from the Tyan S1846:
00:00.0 0600: 8086:7190 (rev 03) 00:01.0 0604: 8086:7191 (rev 03) 00:07.0 0601: 8086:7110 (rev 02) 00:07.1 0101: 8086:7111 (rev 01) 00:07.2 0c03: 8086:7112 (rev 01) 00:07.3 0680: 8086:7113 (rev 02) 00:10.0 0300: 5333:5631 (rev 06) 00:11.0 0200: 10ec:8029
00:00.0 Host bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 03) 00:01.0 PCI bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 03) 00:07.0 ISA bridge: Intel Corporation 82371AB/EB/MB PIIX4 ISA (rev 02) 00:07.1 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE (rev 01) 00:07.2 USB Controller: Intel Corporation 82371AB/EB/MB PIIX4 USB (rev 01) 00:07.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 02) 00:10.0 VGA compatible controller: S3 Inc. 86c325 [ViRGE] (rev 06) 00:11.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8029(AS)
00:00.0 Host bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 03) 00:01.0 PCI bridge: Intel Corporation 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 03) 00:07.0 ISA bridge: Intel Corporation 82371AB/EB/MB PIIX4 ISA (rev 02) 00:07.1 IDE interface: Intel Corporation 82371AB/EB/MB PIIX4 IDE (rev 01) 00:07.2 USB Controller: Intel Corporation 82371AB/EB/MB PIIX4 USB (rev 01) 00:07.3 Bridge: Intel Corporation 82371AB/EB/MB PIIX4 ACPI (rev 02) 00:12.0 PCI bridge: Hint Corp HB6 Universal PCI-PCI bridge (non-transparent mode) (rev 13) 00:13.0 Ethernet controller: Intel Corporation 82557/8/9 [Ethernet Pro 100] (rev 08) (...Deleted Other Additional PCI Devices...)
fyi, similar layout here too.
-- Roger http://www.eskimo.com/~roger/index.html Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61
Sun Apr 29 10:28:23 PDT 2007
On Sun, 2007-04-29 at 10:38 -0700, roger wrote:
On Sun, 2007-04-29 at 14:50 +0200, Uwe Hermann wrote:
Hi,
here's a first patch for the 440BX code and the Tyan S1846 and the 82371EB southbridge which gets my Tyan S1846 a lot further in the boot process.
However, it cannot boot a payload, yet.
It seems the major problem was that I did ram_check() on the whole range from 0 - 64 MB (in my case; I use a 64 MB DIMM for testing). This cannot work of course, as the range from 640 KB - 1 MB is _not_ RAM but rather reserved for all kinds of other stuff (thanks Stefan for pointing this out!).
Yup. I didn't even need to patch the latest svn version with the memory fix for DRAM to find my memory.
Just curious, ill "v2_tyan_s1846_progress.patch" make it into the tree?
It looked good to me.
-- Roger http://www.eskimo.com/~roger/index.html Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61
Wed May 2 12:40:43 PDT 2007
On Wed, May 02, 2007 at 01:07:40PM -0700, roger wrote:
Just curious, ill "v2_tyan_s1846_progress.patch" make it into the tree?
I sure hope so :) I'm waiting for an ACK and will then commit.
Uwe.
On Sun, 2007-04-29 at 14:50 +0200, Uwe Hermann wrote:
I've tried setting up the PCI devices correctly in Config.lb, but I'm absolutely not sure that I got it all right. Can somebody please check this and let me know of any stupid errors I made?
And this is my current try to setup Config.lb:
chip northbridge/intel/i440bx # Northbridge device pci_domain 0 on device pci 0.0 on end # Host bridge device pci 1.0 off end # PCI bridge TODO: AGP bridge? # device pci 7.0 on end # ISA bridge chip southbridge/intel/i82371eb # Southbridge device pci 7.0 on # ISA bridge ??? chip superio/nsc/pc87309 # Super I/O device pnp 2e.0 on end # Floppy device pnp 2e.1 on end # Parallel port device pnp 2e.2 on end # Com2 device pnp 2e.3 on # Com1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.4 on end # Power mgmt. device pnp 2e.5 on end # Mouse device pnp 2e.6 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 # ??? end end device pci 7.1 on end # IDE device pci 7.2 on end # USB device pci 7.3 on end # ACPI end end end chip cpu/intel/slot_2 end end
Does that look correct?
Just to verify, irq 1 & 12 is keyboard for me.
/proc/ioports >> "0060-006f : keyboard" here.
-- Roger http://www.eskimo.com/~roger/index.html Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61
Sun Apr 29 14:23:54 PDT 2007
On Sun, 2007-04-29 at 14:50 +0200, Uwe Hermann wrote:
Also, a full boot log is attached. The PCI init _seems_ to work, at least partially.
The current end of the story is that elfboot cannot find the payload, not sure why. Wrong PCI init? Wrong RAM init? Wrong payload location?
Spent the whole day playing with options.
While getting more familiar with linux bios, I enabled PCI AGP & APIC and the code seems to have executed just fine & dandy here. I also tried enabling SMP, but seems it also needs MP code. But getting side tracked. :-/
I also saw a minor problem with the ordering of addition/subtraction in src/mainboard/tyan/s1846/Config.lb, the tyan/s2895 had specified a different order... wasn't it, i think.
Also tried using lzma on file.elf.
Would love to see more debug output from elfboot. :-/
The patch looks good to me as is.
-- Roger http://www.eskimo.com/~roger/index.html Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61
Sun Apr 29 22:26:08 PDT 2007
* Uwe Hermann uwe@hermann-uwe.de [070429 14:50]:
However, it cannot boot a payload, yet.
Can you dump the flash memory where the image should reside? Are you using a compressed image?
Did you enable full visibility of the flash chip? (PAM something)
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de
Acked-by: Stefan Reinauer stepan@coresystems.de
On Thu, 2007-05-03 at 03:45 +0200, Stefan Reinauer wrote:
- Uwe Hermann uwe@hermann-uwe.de [070429 14:50]:
However, it cannot boot a payload, yet.
Can you dump the flash memory where the image should reside? Are you using a compressed image?
Uwe probably has already done this, but I've yet to fiddle with this.
Did you enable full visibility of the flash chip? (PAM something)
Interesting.
-- Roger http://www.eskimo.com/~roger/index.html Key fingerprint = 8977 A252 2623 F567 70CD 1261 640F C963 1005 1D61
Thu May 3 00:30:04 PDT 2007
On Thu, May 03, 2007 at 03:45:01AM +0200, Stefan Reinauer wrote:
- Uwe Hermann uwe@hermann-uwe.de [070429 14:50]:
However, it cannot boot a payload, yet.
Can you dump the flash memory where the image should reside? Are you using a compressed image?
Did you enable full visibility of the flash chip? (PAM something)
Ah, this might very well be the problem, thanks! I'll check this evening...
Signed-off-by: Uwe Hermann uwe@hermann-uwe.de
Acked-by: Stefan Reinauer stepan@coresystems.de
Thanks, committed in r2623.
Uwe.
-
roger -
Stefan Reinauer -
Uwe Hermann