Help NS Geode experts

[Adam Bezanson]

Hi guys,

I've finally built linuxbios for my SC1200 based board.
I've written my own flash programming utility so I can program
the "romimage" file produced into my flash part from Linux command line.
This all seems to work fine. On my board, I have the ability (with a jumper)
to direct the ROMCS# signal to one of 3 chips on the board. One is a
Disk on Chip which currently has a DOS filesystem on it, one is a 2Mbit
flash chip which has the original Insyde BIOS, and the 3rd is a 16Mbit
flash part soldered on the board where I'm trying to put linuxbios.

This 3rd chip is at 0xffe00000 - 0xffffffff, in order to enable this
addressing I must hit bit 2 in F0 offset 0x52 to enable the Upper ROM size
based on the ROM Mask at F0 offset 0x6e. This isn't enabled by default so
I think as the chip comes up only 0xfffc0000 - 0xffffffff is visible.
I'm not 100% sure, but I assume as the chip comes up it starts trying
to fetch instructions from 0xfffc0000, is this true?

My question is, where should I program the "romimage" file that comes
out of the build process? It would seem to me that the linuxbios.rom part
would have to
start at 0xfffc0000.

Other notes: I've set up my PMR and MCR registers correctly for my target. I
figured them
out by hand and then verified their values when I run with the Insyde BIOS.
So I'm 100% sure
the values I'm using are correct for my target.

I've set the SCx200_DOCCS_BASE to 0xffe00000 for the moment
and the CTRL to 0x070007ff
I'm not sure if the BASE value is correct due to the questions I pose above.

All of my efforts have resulted in nothing happening at startup. Nothing out
of the
serial port nor are the Port 80 codes moving after the board is reset.

Any ideas/help would be appreciated.

Thanks and have a happy new year.

Adam

[Steven James]

Greetings,

I'm no Geodeexpert, but perhaps I can help.

Typically at powerup, the adress space at ffff0000 - ffffffff is mapped to
f0000:0000 (top of real mode memory at 1M). The CPU will start up at f0000:fff0.

The practical upshot is that the end of your romimage should be line up at
ffffffff to get the power on jmp vector in the right place.

G'day,
sjames

Happy New Year LinuxBIOS

Quoting Adam Bezanson :
> Hi guys,
>
> I've finally built linuxbios for my SC1200 based board.
> I've written my own flash programming utility so I can program
> the "romimage" file produced into my flash part from Linux command
> line.
> This all seems to work fine. On my board, I have the ability (with a
> jumper)
> to direct the ROMCS# signal to one of 3 chips on the board. One is a
> Disk on Chip which currently has a DOS filesystem on it, one is a 2Mbit
> flash chip which has the original Insyde BIOS, and the 3rd is a 16Mbit
> flash part soldered on the board where I'm trying to put linuxbios.
>
> This 3rd chip is at 0xffe00000 - 0xffffffff, in order to enable this
> addressing I must hit bit 2 in F0 offset 0x52 to enable the Upper ROM
> size
> based on the ROM Mask at F0 offset 0x6e. This isn't enabled by default
> so
> I think as the chip comes up only 0xfffc0000 - 0xffffffff is visible.
> I'm not 100% sure, but I assume as the chip comes up it starts trying
> to fetch instructions from 0xfffc0000, is this true?
>
> My question is, where should I program the "romimage" file that comes
> out of the build process? It would seem to me that the linuxbios.rom
> part
> would have to
> start at 0xfffc0000.
>
> Other notes: I've set up my PMR and MCR registers correctly for my
> target. I
> figured them
> out by hand and then verified their values when I run with the Insyde
> BIOS.
> So I'm 100% sure
> the values I'm using are correct for my target.
>
> I've set the SCx200_DOCCS_BASE to 0xffe00000 for the moment
> and the CTRL to 0x070007ff
> I'm not sure if the BASE value is correct due to the questions I pose
> above.
>
> All of my efforts have resulted in nothing happening at startup. Nothing
> out
> of the
> serial port nor are the Port 80 codes moving after the board is reset.
>
> Any ideas/help would be appreciated.
>
> Thanks and have a happy new year.
>
> Adam
>
> Linuxbios mailing list
> [e-mail]
> http://www.clustermatic.org/mailman/listinfo/linuxbios

----------------------------steven james, director of research, linux labs

LinuxBIOS Cluster Solutions                   230 peachtree st nw ste 2705

High-Speed Colocation, Hosting,                        atlanta.ga.us 30303

Linux Hardware, Development & Support             http://www.linuxlabs.com

* Visit us at SuperComputing 2002, Booth 1441 *   office/fax [phone]

--------------------------------------------------------------------------

[Adam Bezanson]

Ahhh thanks, It's working now!!!
Although my kernel isn't starting up.
I'm getting the same thing that was reported to the
list last month about gunzip errors

Welcome to start32, the open sourced starter.
This space will eventually hold more diagnostic information.

January 2000, James Hendricks, Dale Webster, and Ron Minnich.
Version 0.1

200:init_bytes() - zkernel_start:0xfff10000  zkernel_mask:0x0000ffff
Searching for 16 byte tags
    63:rom_read_bytes() - overflowed source buffer. max_block = 14
init_bytes found 0 tags
Gunzip setup
gunzip_setup
output data is 0x00100000
Gunzipping boot code
bad gzip magic numbers

Was the solution ever mentioned? What have I configured wrong?
My kernel? or the zkernel_start address?

Thanks,
Adam

-----Original Message-----
From: [e-mail]
[mailto:[e-mail]]On Behalf Of Steven James
Sent: Wednesday, January 01, 2003 12:23 PM
To: Adam Bezanson
Cc: [e-mail]
Subject: Re: Help NS Geode experts

Greetings,

I'm no Geodeexpert, but perhaps I can help.

Typically at powerup, the adress space at ffff0000 - ffffffff is mapped to
f0000:0000 (top of real mode memory at 1M). The CPU will start up at
f0000:fff0.

The practical upshot is that the end of your romimage should be line up at
ffffffff to get the power on jmp vector in the right place.

G'day,
sjames

Happy New Year LinuxBIOS

Quoting Adam Bezanson :
> Hi guys,
>
> I've finally built linuxbios for my SC1200 based board.
> I've written my own flash programming utility so I can program
> the "romimage" file produced into my flash part from Linux command
> line.
> This all seems to work fine. On my board, I have the ability (with a
> jumper)
> to direct the ROMCS# signal to one of 3 chips on the board. One is a
> Disk on Chip which currently has a DOS filesystem on it, one is a 2Mbit
> flash chip which has the original Insyde BIOS, and the 3rd is a 16Mbit
> flash part soldered on the board where I'm trying to put linuxbios.
>
> This 3rd chip is at 0xffe00000 - 0xffffffff, in order to enable this
> addressing I must hit bit 2 in F0 offset 0x52 to enable the Upper ROM
> size
> based on the ROM Mask at F0 offset 0x6e. This isn't enabled by default
> so
> I think as the chip comes up only 0xfffc0000 - 0xffffffff is visible.
> I'm not 100% sure, but I assume as the chip comes up it starts trying
> to fetch instructions from 0xfffc0000, is this true?
>
> My question is, where should I program the "romimage" file that comes
> out of the build process? It would seem to me that the linuxbios.rom
> part
> would have to
> start at 0xfffc0000.
>
> Other notes: I've set up my PMR and MCR registers correctly for my
> target. I
> figured them
> out by hand and then verified their values when I run with the Insyde
> BIOS.
> So I'm 100% sure
> the values I'm using are correct for my target.
>
> I've set the SCx200_DOCCS_BASE to 0xffe00000 for the moment
> and the CTRL to 0x070007ff
> I'm not sure if the BASE value is correct due to the questions I pose
> above.
>
> All of my efforts have resulted in nothing happening at startup. Nothing
> out
> of the
> serial port nor are the Port 80 codes moving after the board is reset.
>
> Any ideas/help would be appreciated.
>
> Thanks and have a happy new year.
>
> Adam
>
> Linuxbios mailing list
> [e-mail]
> http://www.clustermatic.org/mailman/listinfo/linuxbios

----------------------------steven james, director of research, linux labs

LinuxBIOS Cluster Solutions                   230 peachtree st nw ste 2705

High-Speed Colocation, Hosting,                        atlanta.ga.us 30303

Linux Hardware, Development & Support             http://www.linuxlabs.com

* Visit us at SuperComputing 2002, Booth 1441 *   office/fax [phone]

--------------------------------------------------------------------------

_______________________________________________
Linuxbios mailing list
[e-mail]
http://www.clustermatic.org/mailman/listinfo/linuxbios

[Ronald G. Minnich]

On Wed, 1 Jan 2003, Adam Bezanson wrote:
> Welcome to start32, the open sourced starter.
> This space will eventually hold more diagnostic information.
>
> January 2000, James Hendricks, Dale Webster, and Ron Minnich.
> Version 0.1

no, hyou definitely need to be setting ELF_BOOT or whatever. the old 
start32 is obsolete.

gosh we need a newer HOWTO.

ron

[Steven James]

Greetings,

Most likely, you want option USE_ELF_BOOT=1 in your config file. 
ZKERNEL_START does look off as well.

You probably want to enable the flash at ffe00000 and make
ZKERNEL_START=0xffe00000 to take maximum advantage of the nice flash size you
have available.

G'day,
sjames

Quoting Adam Bezanson :
> Ahhh thanks, It's working now!!!
> Although my kernel isn't starting up.
> I'm getting the same thing that was reported to the
> list last month about gunzip errors
>
> Welcome to start32, the open sourced starter.
> This space will eventually hold more diagnostic information.
>
> January 2000, James Hendricks, Dale Webster, and Ron Minnich.
> Version 0.1
>
> 200:init_bytes() - zkernel_start:0xfff10000  zkernel_mask:0x0000ffff
> Searching for 16 byte tags
>     63:rom_read_bytes() - overflowed source buffer. max_block = 14
> init_bytes found 0 tags
> Gunzip setup
> gunzip_setup
> output data is 0x00100000
> Gunzipping boot code
> bad gzip magic numbers
>
> Was the solution ever mentioned? What have I configured wrong?
> My kernel? or the zkernel_start address?
>
> Thanks,
> Adam
>
> -----Original Message-----
> From: [e-mail]
> [mailto:[e-mail]]On Behalf Of Steven James
> Sent: Wednesday, January 01, 2003 12:23 PM
> To: Adam Bezanson
> Cc: [e-mail]
> Subject: Re: Help NS Geode experts
>
> Greetings,
>
> I'm no Geodeexpert, but perhaps I can help.
>
> Typically at powerup, the adress space at ffff0000 - ffffffff is mapped
> to
> f0000:0000 (top of real mode memory at 1M). The CPU will start up at
> f0000:fff0.
>
> The practical upshot is that the end of your romimage should be line up
> at
> ffffffff to get the power on jmp vector in the right place.
>
> G'day,
> sjames
>
> Happy New Year LinuxBIOS
>
> Quoting Adam Bezanson :
> > Hi guys,
> >
> > I've finally built linuxbios for my SC1200 based board.
> > I've written my own flash programming utility so I can program
> > the "romimage" file produced into my flash part from Linux command
> > line.
> > This all seems to work fine. On my board, I have the ability (with a
> > jumper)
> > to direct the ROMCS# signal to one of 3 chips on the board. One is a
> > Disk on Chip which currently has a DOS filesystem on it, one is a
>
> 2Mbit
> > flash chip which has the original Insyde BIOS, and the 3rd is a
>
> 16Mbit
> > flash part soldered on the board where I'm trying to put linuxbios.
> >
> > This 3rd chip is at 0xffe00000 - 0xffffffff, in order to enable this
> > addressing I must hit bit 2 in F0 offset 0x52 to enable the Upper ROM
> > size
> > based on the ROM Mask at F0 offset 0x6e. This isn't enabled by
>
> default
> > so
> > I think as the chip comes up only 0xfffc0000 - 0xffffffff is visible.
> > I'm not 100% sure, but I assume as the chip comes up it starts trying
> > to fetch instructions from 0xfffc0000, is this true?
> >
> > My question is, where should I program the "romimage" file that comes
> > out of the build process? It would seem to me that the linuxbios.rom
> > part
> > would have to
> > start at 0xfffc0000.
> >
> > Other notes: I've set up my PMR and MCR registers correctly for my
> > target. I
> > figured them
> > out by hand and then verified their values when I run with the Insyde
> > BIOS.
> > So I'm 100% sure
> > the values I'm using are correct for my target.
> >
> > I've set the SCx200_DOCCS_BASE to 0xffe00000 for the moment
> > and the CTRL to 0x070007ff
> > I'm not sure if the BASE value is correct due to the questions I pose
> > above.
> >
> > All of my efforts have resulted in nothing happening at startup.
>
> Nothing
> > out
> > of the
> > serial port nor are the Port 80 codes moving after the board is
>
> reset.
> > Any ideas/help would be appreciated.
> >
> > Thanks and have a happy new year.
> >
> > Adam
> >
> > Linuxbios mailing list
> > [e-mail]
> > http://www.clustermatic.org/mailman/listinfo/linuxbios
>
> ----------------------------steven james, director of research, linux
> labs
>
> LinuxBIOS Cluster Solutions                   230 peachtree st nw ste
> 2705
>
> High-Speed Colocation, Hosting,                        atlanta.ga.us
> 30303
>
> Linux Hardware, Development & Support            
> http://www.linuxlabs.com
> Visit us at SuperComputing 2002, Booth 1441 *   office/fax
>
> 404.577.7747/3
>
> Linuxbios mailing list
> [e-mail]
> http://www.clustermatic.org/mailman/listinfo/linuxbios
>
> Linuxbios mailing list
> [e-mail]
> http://www.clustermatic.org/mailman/listinfo/linuxbios

----------------------------steven james, director of research, linux labs

LinuxBIOS Cluster Solutions                   230 peachtree st nw ste 2705

High-Speed Colocation, Hosting,                        atlanta.ga.us 30303

Linux Hardware, Development & Support             http://www.linuxlabs.com

* Visit us at SuperComputing 2002, Booth 1441 *   office/fax [phone]

--------------------------------------------------------------------------

[Christer Weinigel]

[cathing up on my mail :-)]

"Adam Bezanson"  writes:
> Hi guys,
>
> I've finally built linuxbios for my SC1200 based board.
> I've written my own flash programming utility so I can program
> the "romimage" file produced into my flash part from Linux command line.
> This all seems to work fine. On my board, I have the ability (with a jumper)
> to direct the ROMCS# signal to one of 3 chips on the board. One is a
> Disk on Chip which currently has a DOS filesystem on it, one is a 2Mbit
> flash chip which has the original Insyde BIOS, and the 3rd is a 16Mbit
> flash part soldered on the board where I'm trying to put linuxbios.
>
> This 3rd chip is at 0xffe00000 - 0xffffffff, in order to enable this
> addressing I must hit bit 2 in F0 offset 0x52 to enable the Upper ROM size
> based on the ROM Mask at F0 offset 0x6e. This isn't enabled by default so
> I think as the chip comes up only 0xfffc0000 - 0xffffffff is visible.
> I'm not 100% sure, but I assume as the chip comes up it starts trying
> to fetch instructions from 0xfffc0000, is this true?

I think this is correct yes.  If you get the ROMCS mapping to work you
should either be able to use the MTD drivers (see if you can use the
physmap driver in the Linux kernel), or use the devbios driver:

http://openbios.ph-freiburg.de/cgi-dom/viewcvs.cgi/devbios/
> My question is, where should I program the "romimage" file that comes
> out of the build process? It would seem to me that the linuxbios.rom part
> would have to
> start at 0xfffc0000.

What I do is that I have the following options in my config file for
LinuxBIOS:

payload /dev/null

option USE_GENERIC_ROM=1
    option USE_ELF_BOOT=1
    option ZKERNEL_START=0xfffe0000

option _ROMBASE=0xffff0000

Then I place linuxbios.rom in the last 64kByte of the BIOS chip (the
CPU starts executing at linear address 0xfffffff0 with a magic segment
selector in CS that starts at 0xffff0000) and additionally I place an
etherboot image starting 128kBytes before the end of the BIOS chip.
So with a 512kByte device with 128kByte pages that's accessible with
the Linux MTD physmap driver I do:

modprobe -a physmap mtdchar

./erase /dev/mtd3 0x60000
    dd if=natsemi.elf of=/dev/mtd3 bs=64k seek=2
    dd if=linuxbios.rom of=/dev/mtd3 bs=64k seek=3

erase is a tool from the mtd utilities that erase a sector of a mtd
device.  natsemi.elf is the etherboot image that I've gotten by doing
"make bin32/natsemi.elf".

So physically this means that linuxbios.rom is programmed at address
0xffff0000 and natsemi.elf is programmed at 0xfffe0000.  Ah, yes, one
more thing, I've added the attached patch that enables RAM from
0xe0000 to 0xfffff.

I hope this helps a bit.

/Christer

--- northbridge/nsc/gx1/Config	16 Mar 2002 22:38:59 -0000	1.1
+++ northbridge/nsc/gx1/Config	5 Jan 2003 12:33:23 -0000
@@ -2,6 +2,8 @@
 # Copyright (c) 2002 Christer Weinigel 
 # Configuration for the National Semiconductor GX1 processors

+option CONFIG_COMPRESS=1
+
 mainboardinit northbridge/nsc/gx1/cpu_setup.inc
 mainboardinit northbridge/nsc/gx1/gx_setup.inc
 mainboardinit northbridge/nsc/gx1/northbridge_setup.inc
Index: northbridge/nsc/gx1/gx_setup.inc
===================================================================
RCS file: /cvsroot/freebios/freebios/src/northbridge/nsc/gx1/gx_setup.inc,v
retrieving revision 1.1
diff -u -r1.1 gx_setup.inc
--- northbridge/nsc/gx1/gx_setup.inc	16 Mar 2002 22:39:00 -0000	1.1
+++ northbridge/nsc/gx1/gx_setup.inc	5 Jan 2003 12:33:23 -0000
@@ -32,7 +32,7 @@
    .long	BC_DRAM_TOP, 0x3fffffff
    .long	BC_XMAP_1, 0x60
    .long	BC_XMAP_2, 0
-	.long	BC_XMAP_3, 0
+	.long	BC_XMAP_3, 0x77777777	/* Enable RAM from e0000-FFFFF */

.long	MC_BANK_CFG, 0x00700070	/* No DIMMS installed */
    .long	MC_MEM_CNTRL1, XBUSARB