Patch set updated for coreboot: 4b6a312 Via Epia-N and C3: Set ioapic delivery type in Kconfig

[Kyösti Mälkki]

Kyösti Mälkki ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/435

-gerrit

commit 4b6a3125c4366bdc00f1afa0a174fa5665c410d1
Author: Kyösti Mälkki 
Date:   Mon Nov 21 19:12:50 2011 +0200

Via Epia-N and C3: Set ioapic delivery type in Kconfig

The original comment says it's a Via C3 and not Epia requirement
    to deliver IOAPIC interrupts on APIC serial bus. If someone can
    confirm this, set delivery type under cpu/via/model_c3 instead.

Change-Id: I73c55755e0ec1ac5756b4ee7ccdfc8eb93184e4f
    Signed-off-by: Kyösti Mälkki 
---
 src/Kconfig                      |    5 +++++
 src/arch/x86/lib/ioapic.c        |    9 ---------
 src/mainboard/via/epia-n/Kconfig |    5 +++++
 3 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/src/Kconfig b/src/Kconfig
index 64c359e..7e91144 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -239,6 +239,11 @@ config IOAPIC
    bool
    default n

+# Boards with CPU_VIA_C3 may need to override delivery type.
+config IOAPIC_DELIVERY_TYPE
+	int
+	default 1
+
 # TODO: Can probably be removed once all chipsets have kconfig options for it.
 config VIDEO_MB
    int
diff --git a/src/arch/x86/lib/ioapic.c b/src/arch/x86/lib/ioapic.c
index 7d166b9..5e17990 100644
--- a/src/arch/x86/lib/ioapic.c
+++ b/src/arch/x86/lib/ioapic.c
@@ -179,15 +179,6 @@ static void load_vectors(u32 ioapic_base, u8 bsp_lapicid)
    }
 }

-// XXX this decision should probably be made elsewhere, and
-// it's the C3, not the EPIA this depends on.
-
-#if CONFIG_EPIA_VT8237R_INIT
-#define CONFIG_IOAPIC_DELIVERY_TYPE 0
-#else
-#define CONFIG_IOAPIC_DELIVERY_TYPE 1
-#endif
-
 /**
  * Assign IOAPIC with an ID
  *
diff --git a/src/mainboard/via/epia-n/Kconfig b/src/mainboard/via/epia-n/Kconfig
index 4806753..5a88f6a 100644
--- a/src/mainboard/via/epia-n/Kconfig
+++ b/src/mainboard/via/epia-n/Kconfig
@@ -28,4 +28,9 @@ config IRQ_SLOT_COUNT
    int
    default 7

+# IRQ delivery on APIC bus may be a Via C3 CPU requirement.
+config IOAPIC_DELIVERY_TYPE
+	int
+	default 0
+
 endif # BOARD_VIA_EPIA_N