On Mon, Oct 27, 2008 at 09:05:38PM +0100, svn@coreboot.org wrote:
Modified: coreboot-v3/superio/ite/it8712f/superio.c
--- coreboot-v3/superio/ite/it8712f/superio.c 2008-10-24 19:26:34 UTC (rev 953) +++ coreboot-v3/superio/ite/it8712f/superio.c 2008-10-27 20:05:38 UTC (rev 954) @@ -105,10 +105,10 @@ static void it8712f_setup_scan_bus(struct device *dev);
struct device_operations it8712f_ops = {
- .phase2_setup_scan_bus = it8712f_setup_scan_bus,
- .phase3_chip_setup_dev = it8712f_setup_scan_bus,
- .phase3_enable = it8712f_pnp_enable_resources, .phase4_read_resources = pnp_read_resources, .phase4_set_resources = it8712f_pnp_set_resources,
- .phase4_enable_disable = it8712f_pnp_enable_resources, .phase5_enable_resources = it8712f_pnp_enable, .phase6_init = it8712f_init,
};
Modified: coreboot-v3/superio/winbond/w83627hf/superio.c
--- coreboot-v3/superio/winbond/w83627hf/superio.c 2008-10-24 19:26:34 UTC (rev 953) +++ coreboot-v3/superio/winbond/w83627hf/superio.c 2008-10-27 20:05:38 UTC (rev 954) @@ -189,12 +189,12 @@ pnp_exit_ext_func_mode(dev); } } -static void phase2_setup_scan_bus(struct device *dev); +static void phase3_chip_setup_dev(struct device *dev); struct device_operations w83627hf_ops = {
- .phase2_setup_scan_bus = phase2_setup_scan_bus,
- .phase3_chip_setup_dev = phase3_chip_setup_dev,
- .phase3_enable = w83627hf_pnp_enable_resources, .phase4_read_resources = pnp_read_resources, .phase4_set_resources = w83627hf_pnp_set_resources,
- .phase4_enable_disable = w83627hf_pnp_enable_resources, .phase5_enable_resources = w83627hf_pnp_enable, .phase6_init = w83627hf_init,
}; @@ -215,7 +215,7 @@ };
-static void phase2_setup_scan_bus(struct device *dev) +static void phase3_chip_setup_dev(struct device *dev) { pnp_enable_devices(dev, &w83627hf_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); }
Isn't the same fix required for the other Super I/Os in v3?
superio/fintek/f71805f/superio.c superio/ite/it8716f/superio.c
Uwe.