V2 and EPIA

[ron minnich]

OK, I just loaded from flash. Next step is to fix the PIRQ, then look at 
SPD and memory setup.

The fix, for now, is this in auto.c

static void
enable_mainboard_devices(void) {
  device_t dev;
  /* dev 0 for southbridge */

dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);

if (dev == PCI_DEV_INVALID) {
    die("Southbridge not found!!!\n");
  }
  pci_write_config8(dev, 0x50, 7);
  pci_write_config8(dev, 0x51, 0xff);
}

This is a mainboard-specific setting for the VIA EPIA.

and in main:

static void main(void)
{
  unsigned long x;
  /*	init_timer();*/
  outb(5, 0x80);

enable_vt8231_serial();
    enable_mainboard_devices();
    uart_init();
    console_init();
.
.
.

So at the moment I am loading from FLASH! Ethernet is up, etc: Linux is 
happy. Just need PIRQ.

ron

[Randall H. Craig]

Thanks for all of your efforts, you seem to be making quick progress. I would 
like to try v2 out next week.

Is there any documentation on the V2 build procedure?

I know I sound like an idiot but what does the acronym SPD stand for?

Cheers,

Randall

[Bari Ari]

Randall H. Craig wrote:
> I know I sound like an idiot but what does the acronym SPD stand for?

serial presence detect (SPD)

You can read about it here:

http://www.intel.com/technology/memory/pc133sdram/spec/spdsd12b.htm

http://www.simmtester.com/page/news/showpubnews.asp?num=101

Bari

[ron minnich]

On Tue, 30 Sep 2003, Bari Ari wrote:
> Randall H. Craig wrote:
> > I know I sound like an idiot but what does the acronym SPD stand for?
>
> serial presence detect (SPD)
>
> You can read about it here:
>
> http://www.intel.com/technology/memory/pc133sdram/spec/spdsd12b.htm
>
> http://www.simmtester.com/page/news/showpubnews.asp?num=101

it's a solution to a hard problem: how do you tell what ram is in that 
slot? It uses a serial eeprom and a serial bus to get to it.

I think it's an ok way to go, save for making your dram setup hostage to 
the I2C bus, which has its "issues"

ron