This patch is an attempt at introducing 4k CAR size granularity for the AMD x86 CAR code. For the old supported CAR sizes, the newly generated code is equivalent, so it should be a no-brainer.
Benefits: * a nice code size reduction * less #ifdef clutter for Family 10h * paranoid checks for CAR size * clear abstractions
Not tested, as I lack hardware working with v2.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: LinuxBIOSv2-CARx86/src/cpu/amd/car/cache_as_ram.inc =================================================================== --- LinuxBIOSv2-CARx86/src/cpu/amd/car/cache_as_ram.inc (Revision 3039) +++ LinuxBIOSv2-CARx86/src/cpu/amd/car/cache_as_ram.inc (Arbeitskopie) @@ -2,6 +2,7 @@ * This file is part of the LinuxBIOS project. * * Copyright (C) 2005-2007 Advanced Micro Devices, Inc. + * Copyright (C) 2008 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -120,82 +121,70 @@ jmp clear_fixed_var_mtrr clear_fixed_var_mtrr_out:
-#if CacheSize == 0x10000 - /* enable caching for 64K using fixed mtrr */ - movl $0x268, %ecx /* fix4k_c0000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - - movl %edx, %eax - wrmsr - movl $0x269, %ecx - wrmsr +/* 0x06 is the WB IO type for a given 4k segment. + * 0x1e is the MEM IO type for a given 4k segment (K10 and above). + * segs is the number of 4k segments in the area of the particular + * register we want to use for CAR. + * reg is the register where the IO type should be stored. + */ +.macro extractmask segs, reg +.if \segs <= 0 + /* The xorl here is superfluous because at the point of first execution + * of this macro, %eax and %edx are cleared. Later invocations of this + * macro will have a monotonically increasing segs parameter. + */ + xorl \reg, \reg +#if CAR_FAM10 == 1 +.elseif \segs == 1 + movl $0x1e000000, \reg /* WB MEM type */ +.elseif \segs == 2 + movl $0x1e1e0000, \reg /* WB MEM type */ +.elseif \segs == 3 + movl $0x1e1e1e00, \reg /* WB MEM type */ +.elseif \segs >= 4 + movl $0x1e1e1e1e, \reg /* WB MEM type */ +#else +.elseif \segs == 1 + movl $0x06000000, \reg /* WB IO type */ +.elseif \segs == 2 + movl $0x06060000, \reg /* WB IO type */ +.elseif \segs == 3 + movl $0x06060600, \reg /* WB IO type */ +.elseif \segs >= 4 + movl $0x06060606, \reg /* WB IO type */ #endif +.endif +.endm
-#if CacheSize == 0xc000 - /* enable caching for 16K using fixed mtrr */ - movl $0x268, %ecx /* fix4k_c4000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - xorl %eax, %eax - wrmsr - /* enable caching for 32K using fixed mtrr */ - movl $0x269, %ecx /* fix4k_c8000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - movl %edx, %eax - wrmsr +/* size is the cache size in bytes we want to use for CAR. + * windowoffset is the 32k-aligned window into CAR size + */ +.macro simplemask carsize, windowoffset + simplemask_helper (((\carsize - \windowoffset) / 0x1000) - 4), %eax + simplemask_helper (((\carsize - \windowoffset) / 0x1000)), %edx +.endm + +#if CacheSize > 0x10000 +#error Invalid CAR size, must be at most 64k. #endif +#if CacheSize < 0x1000 +#error Invalid CAR size, must be at least 4k. This is a processor limitation. +#endif +#if (CacheSize & (0x1000 - 1)) +#error Invalid CAR size, is not a multiple of 4k. This is a processor limitation. +#endif
- -#if CacheSize == 0x8000 - /* enable caching for 32K using fixed mtrr */ - movl $0x269, %ecx /* fix4k_c8000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - movl %edx, %eax - wrmsr +#if CacheSize > 0x8000 + /* enable caching for 32K-64K using fixed mtrr */ + movl $0x268, %ecx /* fix4k_c0000*/ + simplemask CacheSize, 0x8000 + wrmsr #endif
-#if CacheSize < 0x8000 - /* enable caching for 16K/8K/4K using fixed mtrr */ - movl $0x269, %ecx /* fix4k_cc000*/ - #if CacheSize == 0x4000 - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - #endif - #if CacheSize == 0x2000 - #if CAR_FAM10 == 1 - movl $0x1e1e0000, %edx /* WB MEM type */ - #else - movl $0x06060000, %edx /* WB IO type */ - #endif - #endif - #if CacheSize == 0x1000 - #if CAR_FAM10 == 1 - movl $0x1e000000, %edx /* WB MEM type */ - #else - movl $0x06000000, %edx /* WB IO type */ - #endif - #endif - xorl %eax, %eax + /* enable caching for 0-32K using fixed mtrr */ + movl $0x269, %ecx /* fix4k_c8000*/ + simplemask CacheSize, 0 wrmsr -#endif
/* enable memory access for first MBs using top_mem */ movl $TOP_MEM, %ecx
Carl-Daniel Hailfinger wrote:
This patch is an attempt at introducing 4k CAR size granularity for the AMD x86 CAR code. For the old supported CAR sizes, the newly generated code is equivalent, so it should be a no-brainer.
Benefits:
- a nice code size reduction
- less #ifdef clutter for Family 10h
- paranoid checks for CAR size
- clear abstractions
Not tested, as I lack hardware working with v2.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Much better than it was. Thanks! Acked-by: Marc Jones marc.jones@amd.com
On Jan 8, 2008 10:13 AM, Marc Jones marc.jones@amd.com wrote:
Much better than it was. Thanks! Acked-by: Marc Jones marc.jones@amd.com
this is pretty critical stuff. I suggest we hold off on a commit until we get a test case.
I can't test it either ...
ron
Updated patch. This one actually compiles. The previous patch unfortunately was generated from the wrong tree. Diff between the previous patch and this one is:
Index: src/cpu/amd/car/cache_as_ram.inc
--- src/cpu/amd/car/cache_as_ram.inc (Revision 3039) +++ src/cpu/amd/car/cache_as_ram.inc (Revision 3040) @@ -158,8 +158,8 @@
- windowoffset is the 32k-aligned window into CAR size
*/ .macro simplemask carsize, windowoffset
- simplemask_helper (((\carsize - \windowoffset) / 0x1000) - 4), %eax
- simplemask_helper (((\carsize - \windowoffset) / 0x1000)), %edx
- extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax
- extractmask (((\carsize - \windowoffset) / 0x1000)), %edx
.endm
#if CacheSize > 0x10000
Full patch with Changelog included below:
This patch is an attempt at introducing 4k CAR size granularity for the AMD x86 CAR code. For the old supported CAR sizes, the newly generated code is equivalent, so it should be a no-brainer.
Benefits: * a nice code size reduction * less #ifdef clutter for Family 10h * paranoid checks for CAR size * clear abstractions
Not tested, as I lack hardware working with v2.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net Acked-by: Marc Jones marc.jones@amd.com
Index: LinuxBIOSv2-CARx86/src/cpu/amd/car/cache_as_ram.inc =================================================================== --- LinuxBIOSv2-CARx86/src/cpu/amd/car/cache_as_ram.inc (Revision 3040) +++ LinuxBIOSv2-CARx86/src/cpu/amd/car/cache_as_ram.inc (Arbeitskopie) @@ -2,6 +2,7 @@ * This file is part of the LinuxBIOS project. * * Copyright (C) 2005-2007 Advanced Micro Devices, Inc. + * Copyright (C) 2008 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -120,82 +121,70 @@ jmp clear_fixed_var_mtrr clear_fixed_var_mtrr_out:
-#if CacheSize == 0x10000 - /* enable caching for 64K using fixed mtrr */ - movl $0x268, %ecx /* fix4k_c0000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - - movl %edx, %eax - wrmsr - movl $0x269, %ecx - wrmsr +/* 0x06 is the WB IO type for a given 4k segment. + * 0x1e is the MEM IO type for a given 4k segment (K10 and above). + * segs is the number of 4k segments in the area of the particular + * register we want to use for CAR. + * reg is the register where the IO type should be stored. + */ +.macro extractmask segs, reg +.if \segs <= 0 + /* The xorl here is superfluous because at the point of first execution + * of this macro, %eax and %edx are cleared. Later invocations of this + * macro will have a monotonically increasing segs parameter. + */ + xorl \reg, \reg +#if CAR_FAM10 == 1 +.elseif \segs == 1 + movl $0x1e000000, \reg /* WB MEM type */ +.elseif \segs == 2 + movl $0x1e1e0000, \reg /* WB MEM type */ +.elseif \segs == 3 + movl $0x1e1e1e00, \reg /* WB MEM type */ +.elseif \segs >= 4 + movl $0x1e1e1e1e, \reg /* WB MEM type */ +#else +.elseif \segs == 1 + movl $0x06000000, \reg /* WB IO type */ +.elseif \segs == 2 + movl $0x06060000, \reg /* WB IO type */ +.elseif \segs == 3 + movl $0x06060600, \reg /* WB IO type */ +.elseif \segs >= 4 + movl $0x06060606, \reg /* WB IO type */ #endif +.endif +.endm
-#if CacheSize == 0xc000 - /* enable caching for 16K using fixed mtrr */ - movl $0x268, %ecx /* fix4k_c4000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - xorl %eax, %eax - wrmsr - /* enable caching for 32K using fixed mtrr */ - movl $0x269, %ecx /* fix4k_c8000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - movl %edx, %eax - wrmsr +/* size is the cache size in bytes we want to use for CAR. + * windowoffset is the 32k-aligned window into CAR size + */ +.macro simplemask carsize, windowoffset + extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax + extractmask (((\carsize - \windowoffset) / 0x1000)), %edx +.endm + +#if CacheSize > 0x10000 +#error Invalid CAR size, must be at most 64k. #endif +#if CacheSize < 0x1000 +#error Invalid CAR size, must be at least 4k. This is a processor limitation. +#endif +#if (CacheSize & (0x1000 - 1)) +#error Invalid CAR size, is not a multiple of 4k. This is a processor limitation. +#endif
- -#if CacheSize == 0x8000 - /* enable caching for 32K using fixed mtrr */ - movl $0x269, %ecx /* fix4k_c8000*/ - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - movl %edx, %eax - wrmsr +#if CacheSize > 0x8000 + /* enable caching for 32K-64K using fixed mtrr */ + movl $0x268, %ecx /* fix4k_c0000*/ + simplemask CacheSize, 0x8000 + wrmsr #endif
-#if CacheSize < 0x8000 - /* enable caching for 16K/8K/4K using fixed mtrr */ - movl $0x269, %ecx /* fix4k_cc000*/ - #if CacheSize == 0x4000 - #if CAR_FAM10 == 1 - movl $0x1e1e1e1e, %edx /* WB MEM type */ - #else - movl $0x06060606, %edx /* WB IO type */ - #endif - #endif - #if CacheSize == 0x2000 - #if CAR_FAM10 == 1 - movl $0x1e1e0000, %edx /* WB MEM type */ - #else - movl $0x06060000, %edx /* WB IO type */ - #endif - #endif - #if CacheSize == 0x1000 - #if CAR_FAM10 == 1 - movl $0x1e000000, %edx /* WB MEM type */ - #else - movl $0x06000000, %edx /* WB IO type */ - #endif - #endif - xorl %eax, %eax + /* enable caching for 0-32K using fixed mtrr */ + movl $0x269, %ecx /* fix4k_c8000*/ + simplemask CacheSize, 0 wrmsr -#endif
/* enable memory access for first MBs using top_mem */ movl $TOP_MEM, %ecx
Actually, if you all want to commit this, I can try it on the sis board this week.
thanks
ron
On Tue, Jan 08, 2008 at 02:00:11PM -0800, ron minnich wrote:
Actually, if you all want to commit this, I can try it on the sis board this week.
Speaking of the SIS board; is it for sale yet? I can't find it anywhere...
Thanks, Ward.
On Tue, Jan 08, 2008 at 02:00:11PM -0800, ron minnich wrote:
Actually, if you all want to commit this, I can try it on the sis board this week.
I think it looks good, please try it on hardware.
My alix and LPC dongle was stolen in Berlin otherwise I'd help test. (Yes, laptop too.)
//Peter
On 08.01.2008 23:00, ron minnich wrote:
Actually, if you all want to commit this, I can try it on the sis board this week.
Well, i'd like to commit, but I'll wait until you (or someone else) have tested it.
Regards, Carl-Daniel
Carl-Daniel Hailfinger wrote:
On 08.01.2008 23:00, ron minnich wrote:
Actually, if you all want to commit this, I can try it on the sis board this week.
Well, i'd like to commit, but I'll wait until you (or someone else) have tested it.
Regards, Carl-Daniel
We checked this on K8 with DCACHE_RAM_SIZE=0x08000 and it works as expected.
Marc
On 10.01.2008 01:45, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
On 08.01.2008 23:00, ron minnich wrote:
Actually, if you all want to commit this, I can try it on the sis board this week.
Well, i'd like to commit, but I'll wait until you (or someone else) have tested it.
We checked this on K8 with DCACHE_RAM_SIZE=0x08000 and it works as expected.
Thanks, great!
There's one issue with specific binutils versions, though. The following sequence trips up a specific gas version with an error message: "Error: too many positional arguments"
I'd like to blacklist the specific binutils version causing this and report the bug to the linux distributor. Jordan, could you give us more details (exact binutils version, name of distribution, are all updates applied)?
.macro extractmask segs, reg .if \segs <= 0 xorl \reg, \reg .elseif \segs == 1 movl $0x06000000, \reg .elseif \segs == 2 movl $0x06060000, \reg .elseif \segs == 3 movl $0x06060600, \reg .elseif \segs >= 4 movl $0x06060606, \reg .endif .endm
.macro simplemask carsize, windowoffset extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax extractmask (((\carsize - \windowoffset) / 0x1000)), %edx .endm
simplemask 0x8000, 0
Regards, Carl-Daniel
On 10.01.2008 03:00, Carl-Daniel Hailfinger wrote:
On 10.01.2008 01:45, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
On 08.01.2008 23:00, ron minnich wrote:
Actually, if you all want to commit this, I can try it on the sis board this week.
Well, i'd like to commit, but I'll wait until you (or someone else) have tested it.
We checked this on K8 with DCACHE_RAM_SIZE=0x08000 and it works as expected.
Thanks, great!
There's one issue with specific binutils versions, though. The following sequence trips up a specific gas version with an error message: "Error: too many positional arguments"
I'd like to blacklist the specific binutils version causing this and report the bug to the linux distributor. Jordan, could you give us more details (exact binutils version, name of distribution, are all updates applied)?
Or try this patch on top of my current patch:
--- src/cpu/amd/car/cache_as_ram.inc~ 2008-01-08 20:16:30.000000000 +0100 +++ src/cpu/amd/car/cache_as_ram.inc 2008-01-10 03:24:09.000000000 +0100 @@ -160,8 +160,15 @@ * windowoffset is the 32k-aligned window into CAR size */ .macro simplemask carsize, windowoffset + .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000) - 4) + extractmask gas_bug_workaround, %eax + .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000)) + extractmask gas_bug_workaround, %edx +/* Without the gas bug workaround, the entire macro would consist only of the + * two lines below. extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax extractmask (((\carsize - \windowoffset) / 0x1000)), %edx + */ .endm
#if CacheSize > 0x10000
It is a workaound for http://sourceware.org/bugzilla/show_bug.cgi?id=669 . As an alternative, we may simply blacklist the affected binutils versions.
Regards, Carl-Daniel
On 10/01/08 03:26 +0100, Carl-Daniel Hailfinger wrote:
On 10.01.2008 03:00, Carl-Daniel Hailfinger wrote:
On 10.01.2008 01:45, Marc Jones wrote:
Carl-Daniel Hailfinger wrote:
On 08.01.2008 23:00, ron minnich wrote:
Actually, if you all want to commit this, I can try it on the sis board this week.
Well, i'd like to commit, but I'll wait until you (or someone else) have tested it.
We checked this on K8 with DCACHE_RAM_SIZE=0x08000 and it works as expected.
Thanks, great!
There's one issue with specific binutils versions, though. The following sequence trips up a specific gas version with an error message: "Error: too many positional arguments"
I'd like to blacklist the specific binutils version causing this and report the bug to the linux distributor. Jordan, could you give us more details (exact binutils version, name of distribution, are all updates applied)?
Or try this patch on top of my current patch:
That did the trick. Thank you.
I do want to explain myself a little bit more. I have a dedicated SimNow box that we built out some time ago - it works well because it has lots of processors and lots of memory, and nobody else uses it, so its perfect as a SimNow solution (SimNow uses a lot of resources, as you might imagine).
This box is running a ancient version of Gentoo (sometime in 2005, if I am not mistaken). It lives in the server room, and I haven't had the need nor wherewithall to ask permission to go in there and install something more modern on it. It just works, and thats good enough for me.
So it was to my surprise and delight when I discovered last year that both buildrom and the k8 LinuxBIOS code would compile on the box with no problems - thats one less 'scp' I need to try out images.
Thats why I raised the alarm on this patch - its not so much that it *has* to work on an ancient binutils version, its more that it worked _before_ the patch, so unless Carl-Daniel intended to break support for ancient binutils, it should work _after_. I would have been fine with giving the old server the boot, but I thought if we could figure out a reasonable workaround, it wouldn't hurt the project.
So my appreciation goes to Carl-Daniel for humoring me.
Jordan
On 10.01.2008 03:26, Carl-Daniel Hailfinger wrote:
--- src/cpu/amd/car/cache_as_ram.inc~ 2008-01-08 20:16:30.000000000 +0100 +++ src/cpu/amd/car/cache_as_ram.inc 2008-01-10 03:24:09.000000000 +0100 @@ -160,8 +160,15 @@
- windowoffset is the 32k-aligned window into CAR size
*/ .macro simplemask carsize, windowoffset
- .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000) - 4)
- extractmask gas_bug_workaround, %eax
- .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000))
- extractmask gas_bug_workaround, %edx
+/* Without the gas bug workaround, the entire macro would consist only of the
extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax extractmask (((\carsize - \windowoffset) / 0x1000)), %edx
- two lines below.
- */
.endm
#if CacheSize > 0x10000
Add a workaround for a bug in some binutils version which strictly interpret whitespace as macro argument delimiter. Since the code is preprocessed by gcc and the tokenizer may insert whitespace, that can fail. http://sourceware.org/bugzilla/show_bug.cgi?id=669
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Regards, Carl-Daniel
On 10/01/08 18:57 +0100, Carl-Daniel Hailfinger wrote:
On 10.01.2008 03:26, Carl-Daniel Hailfinger wrote:
--- src/cpu/amd/car/cache_as_ram.inc~ 2008-01-08 20:16:30.000000000 +0100 +++ src/cpu/amd/car/cache_as_ram.inc 2008-01-10 03:24:09.000000000 +0100 @@ -160,8 +160,15 @@
- windowoffset is the 32k-aligned window into CAR size
*/ .macro simplemask carsize, windowoffset
- .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000) - 4)
- extractmask gas_bug_workaround, %eax
- .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000))
- extractmask gas_bug_workaround, %edx
+/* Without the gas bug workaround, the entire macro would consist only of the
extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax extractmask (((\carsize - \windowoffset) / 0x1000)), %edx
- two lines below.
- */
.endm
#if CacheSize > 0x10000
Add a workaround for a bug in some binutils version which strictly interpret whitespace as macro argument delimiter. Since the code is preprocessed by gcc and the tokenizer may insert whitespace, that can fail. http://sourceware.org/bugzilla/show_bug.cgi?id=669
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Acked-by: Jordan Crouse jordan.crouse@amd.com
Regards, Carl-Daniel
On 10.01.2008 19:00, Jordan Crouse wrote:
On 10/01/08 18:57 +0100, Carl-Daniel Hailfinger wrote:
On 10.01.2008 03:26, Carl-Daniel Hailfinger wrote:
--- src/cpu/amd/car/cache_as_ram.inc~ 2008-01-08 20:16:30.000000000 +0100 +++ src/cpu/amd/car/cache_as_ram.inc 2008-01-10 03:24:09.000000000 +0100 @@ -160,8 +160,15 @@
- windowoffset is the 32k-aligned window into CAR size
*/ .macro simplemask carsize, windowoffset
- .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000) - 4)
- extractmask gas_bug_workaround, %eax
- .set gas_bug_workaround,(((\carsize - \windowoffset) / 0x1000))
- extractmask gas_bug_workaround, %edx
+/* Without the gas bug workaround, the entire macro would consist only of the
extractmask (((\carsize - \windowoffset) / 0x1000) - 4), %eax extractmask (((\carsize - \windowoffset) / 0x1000)), %edx
- two lines below.
- */
.endm
#if CacheSize > 0x10000
Add a workaround for a bug in some binutils version which strictly interpret whitespace as macro argument delimiter. Since the code is preprocessed by gcc and the tokenizer may insert whitespace, that can fail. http://sourceware.org/bugzilla/show_bug.cgi?id=669
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Acked-by: Jordan Crouse jordan.crouse@amd.com
Thanks, r3044.
Regards, Carl-Daniel
On 08.01.2008 20:33, Carl-Daniel Hailfinger wrote:
This patch is an attempt at introducing 4k CAR size granularity for the AMD x86 CAR code. For the old supported CAR sizes, the newly generated code is equivalent, so it should be a no-brainer.
Benefits:
- a nice code size reduction
- less #ifdef clutter for Family 10h
- paranoid checks for CAR size
- clear abstractions
Not tested, as I lack hardware working with v2.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net Acked-by: Marc Jones marc.jones@amd.com
Thanks to Marc and Jordan for testing. r3043.
Regards, Carl-Daniel
-
Carl-Daniel Hailfinger -
Jordan Crouse -
Marc Jones -
Peter Stuge -
ron minnich -
Ward Vandewege