Re: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

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Re: [LinuxBIOS] MB1030 / 3036 VGA...

Richard Smith

23 Apr 2006 23 Apr '06

10 p.m.

On 4/23/06, Christian Sühs chris@suehsi.de wrote:

...

...
I've added some debug output to the VGA area that determines which device to use as primary. Apply the attached patch and post the output.

Thanks, but there is no attachement :( I will have a look to the svn

Sorry. Forgot to attach.

Try this.

-- Richard A. Smith

Attachments:

vga_IO_debug.patch (application/octet-stream — 1.9 KB)

Show replies by date

Christian Sühs

24 Apr 24 Apr

12:05 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

Sorry. Forgot to attach.

Allright, here is the more verbose output.

It seems that 12.4 is assign as first pci vga Device anymore. Tomorrow I will try to set

if 1 to if 0 in device.c

I hope than is taken the right one.

What about the rom_adress

stefan means 0xfffc0000 ron means 0xffffc000

what should I try? The vga segment is located first in the image.

chris

...

Richard A. Smith

LinuxBIOS-1.1.8.0Fallback Sun Apr 23 23:42:37 CEST 2006 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00001000 Component Banks: 4 Module Banks: 1 DIMM size: 04000000 Probing for DIMM1 MC_BANK_CFG = 00701420 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.8.0Fallback Sun Apr 23 23:42:37 CEST 2006 booting... end 52c244a5, start 0 32-bit delta 360 calibrate_tsc 32-bit result is 360 clocks_per_usec: 360 Enumerating buses... scan_static_bus for Root Device Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] ops PCI: 00:00.0 [1078/0001] enabled PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: 00:09.0 [10ea/5000] enabled PCI: devfn 0x49, bad id 0xffffffff PCI: devfn 0x4a, bad id 0xffffffff PCI: devfn 0x4b, bad id 0xffffffff PCI: devfn 0x4c, bad id 0xffffffff PCI: devfn 0x4d, bad id 0xffffffff PCI: devfn 0x4e, bad id 0xffffffff PCI: devfn 0x4f, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: 00:12.0 [1078/0100] bus ops southbridge_enable: dev is 00018b40 PCI: 00:12.0 [1078/0100] enabled malloc Enter, size 668, free_mem_ptr 00022000 malloc 0x00022000 PCI: 00:12.1 [1078/0101] enabled malloc Enter, size 668, free_mem_ptr 0002229c malloc 0x0002229c PCI: 00:12.2 [1078/0102] ops cs5530_ide: ide_enable PCI: 00:12.2 [1078/0102] enabled malloc Enter, size 668, free_mem_ptr 00022538 malloc 0x00022538 PCI: 00:12.3 [1078/0103] enabled malloc Enter, size 668, free_mem_ptr 000227d4 malloc 0x000227d4 PCI: 00:12.4 [1078/0104] enabled PCI: devfn 0x95, bad id 0xffffffff PCI: devfn 0x96, bad id 0xffffffff PCI: devfn 0x97, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00022a70 malloc 0x00022a70 PCI: 00:13.0 [0e11/a0f8] enabled PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:12.0 PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled scan_static_bus for PCI: 00:12.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 northbridge.c:pci_domain_read_resources() PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00000400 - 0x0000047f] io Root Device compute_allocate_io: base: 00000480 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 00:12.4 10 * [0x01000000 - 0x01000fff] mem PCI: 00:13.0 10 * [0x01001000 - 0x01001fff] mem PCI: 00:12.1 10 * [0x01002000 - 0x010020ff] mem PCI: 00:12.3 10 * [0x01003000 - 0x0100307f] mem Root Device compute_allocate_mem: base: 01003080 size: 01003080 align: 24 gran: 0 done Done reading resources. first onboard = PCI: 00:09.0 Skipping disabled device PNP: 002e.3 Skipping disabled device PCI: 00:12.1 Skipping disabled device PCI: 00:12.3 Skipping disabled device PCI: 00:12.4 vga_first = PCI: 00:12.4 vga = PCI: 00:12.4 Looking at vga_onboard Reassigning vga to PCI: 00:12.4 Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01003080 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:12.4 10 * [0xfe000000 - 0xfe000fff] mem PCI: 00:13.0 10 * [0xfe001000 - 0xfe001fff] mem PCI: 00:12.1 10 * [0xfe002000 - 0xfe0020ff] mem PCI: 00:12.3 10 * [0xfe003000 - 0xfe00307f] mem Root Device compute_allocate_mem: base: fe003080 size: 01003080 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:12.1 10 <- [0x00fe002000 - 0x00fe0020ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe003000 - 0x00fe00307f] mem PCI: 00:12.4 10 <- [0x00fe000000 - 0x00fe000fff] mem PCI: 00:13.0 10 <- [0x00fe001000 - 0x00fe001fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 143 cs5530.c: cs5530_pci_dev_enable_resources() PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 142 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init PCI: 00:12.0 init cs5530: southbridge_init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:12.1 init PCI: 00:12.2 init cs5530_ide: ide_init PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006c4 checksum 3168

Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3

Stefan Reinauer

23 Apr 23 Apr

11:29 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

* Christian Sühs chris@suehsi.de [060424 00:05]:

...

What about the rom_adress

stefan means 0xfffc0000 ron means 0xffffc000

:D

what should I try? The vga segment is located first in the image.

Flash chips are located directly below 4G (0xffffffff)

So you need to calculate the address by subtracting the flash chip size (and adding the offset within the image)

in your case the offset within the image is 0, because its the first thing.

then you type (in bash for example)

biossize=256 printf "0x%x\n" $(( 0x100000000 - ($biossize*1024) ))

Stefan

Richard Smith

24 Apr 24 Apr

2:06 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

So you need to calculate the address by subtracting the flash chip size (and adding the offset within the image)

I updated the wiki with this info.

-- Richard A. Smith

Christian Sühs

12:06 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

Sorry. Forgot to attach.

Allright, here is the more verbose output.

It seems that 12.4 is assign as first pci vga Device anymore. Tomorrow I will try to set

if 1 to if 0 in device.c

I hope than is taken the right one.

What about the rom_adress

stefan means 0xfffc0000 ron means 0xffffc000

what should I try? The vga segment is located first in the image.

chris

...

Richard A. Smith

Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3

Ronald G Minnich

23 Apr 23 Apr

10:52 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

Christian Sühs wrote:

...

...
Sorry. Forgot to attach.

Allright, here is the more verbose output.

It seems that 12.4 is assign as first pci vga Device anymore. Tomorrow I will try to set

if 1 to if 0 in device.c

I hope than is taken the right one.

What about the rom_adress

stefan means 0xfffc0000 ron means 0xffffc000

well, stefan is right. I hit one too many 'f'. sorry.

ron

Richard Smith

24 Apr 24 Apr

8:12 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

Done reading resources. first onboard = PCI: 00:09.0 Skipping disabled device PNP: 002e.3 Skipping disabled device PCI: 00:12.1 Skipping disabled device PCI: 00:12.3 Skipping disabled device PCI: 00:12.4 vga_first = PCI: 00:12.4 vga = PCI: 00:12.4 Looking at vga_onboard Reassigning vga to PCI: 00:12.4 Allocating VGA resource PCI: 00:09.0

I dont understand yet whats happening.. dev 12.4 should never get consider since its disabled. It ended up doing the right thing and enabling 9.0 but I don't know how 12.4 made it in there.

Will you please add the following at line 387 in device.c Just before the disable check.

printk_spew(" Looking at device %s\n",dev_path(dev));

-- Richard A. Smith

Christian Sühs

10:34 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

I dont understand yet whats happening.. dev 12.4 should never get consider since its disabled. It ended up doing the right thing and enabling 9.0 but I don't know how 12.4 made it in there.

I'm not sure, but I think it is the stepping in Config.lb

...

Will you please add the following at line 387 in device.c Just before the disable check.

Ok, I will also post my current Config.lb and my first one.

...

printk_spew(" Looking at device %s\n",dev_path(dev));

-- Richard A. Smith

Christian Sühs

11:30 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

Next day, next runs ;)

Here are the results. I've also attached two lspci outputs Current LB and boot with factory bios

As I say before, PCI 12.4 comes never up before the VGA Tries starts.

chris

-->snip

Done reading resources. Looking at device Root Device Looking at device PCI_DOMAIN: 0000 Looking at device PCI: 00:00.0 Looking at device PCI: 00:09.0 first onboard = PCI: 00:09.0 Looking at device PCI: 00:09.0 Looking at device PCI: 00:12.0 Looking at device PNP: 002e.0 Looking at device PNP: 002e.1 Looking at device PNP: 002e.2 Looking at device PNP: 002e.3 Skipping disabled device PNP: 002e.3 Looking at device PNP: 002e.4 Looking at device PNP: 002e.5 Looking at device PNP: 002e.6 Looking at device PNP: 002e.7 Looking at device PNP: 002e.8 Looking at device PCI: 00:12.1 Skipping disabled device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Skipping disabled device PCI: 00:12.3 Looking at device PCI: 00:12.4 Skipping disabled device PCI: 00:12.4 Looking at device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Looking at device PCI: 00:12.4 vga_first = PCI: 00:12.4 Looking at device PCI: 00:13.0 vga = PCI: 00:12.4 Looking at vga_onboard Reassigning vga to PCI: 00:12.4 Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01003080 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:12.4 10 * [0xfe000000 - 0xfe000fff] mem PCI: 00:13.0 10 * [0xfe001000 - 0xfe001fff] mem PCI: 00:12.1 10 * [0xfe002000 - 0xfe0020ff] mem PCI: 00:12.3 10 * [0xfe003000 - 0xfe00307f] mem Root Device compute_allocate_mem: base: fe003080 size: 01003080 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:12.1 10 <- [0x00fe002000 - 0x00fe0020ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe003000 - 0x00fe00307f] mem PCI: 00:12.4 10 <- [0x00fe000000 - 0x00fe000fff] mem PCI: 00:13.0 10 <- [0x00fe001000 - 0x00fe001fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 143 cs5530.c: cs5530_pci_dev_enable_resources() PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 142 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init PCI: 00:12.0 init cs5530: southbridge_init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:12.1 init PCI: 00:12.2 init cs5530_ide: ide_init PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006c4 checksum e38

Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3

---> snap

lspci -vv //boot with current LB (vga relevant, only)

// IO and MEM are initialized but it seems for the wrong adress // memory is right?! is fd000000 different to d000000 // expansion Rom seems totaly wrong :D

00:12.4 0300: 1078:0104 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Region 0: Memory at fe000000 (32-bit, non-prefetchable) [size=4K]

lspci -vv //complete output boot with factory bios // there is no PCI 12.4 // first LB tries without CONFIG_PCI_ROM_RUN and CONFIG_CONSOLE_VGA looks nearly same // only 00:09.0 looks different, of course.

00:00.0 0600: 1078:0001 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0

00:09.0 0300: 10ea:5000 (rev 02) Subsystem: 0280:7000 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32, Cache Line Size 08 Interrupt: pin A routed to IRQ 10 Region 0: Memory at d0000000 (32-bit, non-prefetchable) [size=16M] Expansion ROM at <unassigned> [disabled] [size=64K]

00:12.0 0601: 1078:0100 Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, Cache Line Size 04

00:12.1 0680: 1078:0101 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Region 0: Memory at 40012000 (32-bit, non-prefetchable) [size=256]

00:12.2 0101: 1078:0102 (prog-if 80) Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Region 4: I/O ports at f000 [size=16]

00:12.3 0401: 1078:0103 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Region 0: Memory at 40011000 (32-bit, non-prefetchable) [size=128]

00:13.0 0c03: 0e11:a0f8 (rev 06) (prog-if 10) Subsystem: 0e11:a0f8 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (20000ns max), Cache Line Size 08 Interrupt: pin A routed to IRQ 11 Region 0: Memory at d2003000 (32-bit, non-prefetchable) [size=4K]

## ## Include the secondary Configuration files ## dir /pc80 config chip.h

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end device pci 9.0 on // Is this on the right place ?? chip drivers/pci/onboard // first it was at the end of the file device pci 9.0 on end register "rom_address" = "0xfffc0000" end end chip southbridge/amd/cs5530 device pci 12.0 on chip superio/NSC/pc97317 device pnp 2e.0 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 end device pnp 2e.1 on # Mouse irq 0x70 = 12 end device pnp 2e.2 on # RTC io 0x60 = 0x70 irq 0x70 = 8 end device pnp 2e.3 off # FDC end device pnp 2e.4 on # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 end device pnp 2e.5 on # COM2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.6 on # COM1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.7 on # GPIO io 0x60 = 0xe0 end device pnp 2e.8 on # Power Management io 0x60 = 0xe800 end register "com1" = "{115200}" register "com2" = "{38400}" end device pci 12.1 off end # SMI device pci 12.2 on end # IDE device pci 12.3 off end # Audio device pci 12.4 off end # VGA end end end

chip cpu/amd/model_gx1 end

end

Christian Sühs

11:47 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

Christian Sühs schrieb:

...

Next day, next runs ;)

Here are the results.

What's that. Why are the disabled devices first skipped and then look again?

...

Looking at device PNP: 002e.7 Looking at device PNP: 002e.8 Looking at device PCI: 00:12.1 Skipping disabled device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Skipping disabled device PCI: 00:12.3 Looking at device PCI: 00:12.4 Skipping disabled device PCI: 00:12.4 Looking at device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Looking at device PCI: 00:12.4 vga_first = PCI: 00:12.4 Looking at device PCI: 00:13.0 vga = PCI: 00:12.4

Christian Sühs

12:32 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

Looking at vga_onboard Reassigning vga to PCI: 00:12.4

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

I think this line is wrong, the debug should be output the vga_onboard Variable, but the output is vga.

---------------- #if 1 printk_spew(" Looking at vga_onboard\n"); if (vga_onboard) // will use on board vga as pri #else if (!vga) // will use last add on adapter as pri #endif { printk_spew(" Reassigning vga to %s\n",dev_path(vga)); // <-- vga = vga_onboard; } -----------------

Therefor it seems, that in my case the right PCI Device is allocated. the debug should printed out "Reassigning vga to PCI: 00:9.0

lspci is also this meaning :D but what about the false memory region

chris

Stefan Reinauer

12:49 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

* Christian Sühs chris@suehsi.de [060424 12:32]:

...

...
Looking at vga_onboard Reassigning vga to PCI: 00:12.4

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

I think this line is wrong, the debug should be output the vga_onboard Variable, but the output is vga.

good spot. LinuxBIOS does not detect the vga device as an onboard vga device.

Lemme see..

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Stefan Reinauer

1:11 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

* Stefan Reinauer stepan@coresystems.de [060424 12:49]:

...

...
the debug should be output the vga_onboard Variable, but the output is vga.

good spot. LinuxBIOS does not detect the vga device as an onboard vga device.

Can you apply the attached patch and try again?

Stefan

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

3:33 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

Can you apply the attached patch and try again?

Stefan

Well, here is the debug.

Now, the Kalhua is detect as onboard vga and assigned. ( That is not what I want :) ) lspci output is a little bit different. Both vga devices have no enabled IO Range.

chris

Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] ops PCI: 00:00.0 [1078/0001] enabled PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: 00:09.0 [10ea/5000] enabled PCI: devfn 0x49, bad id 0xffffffff PCI: devfn 0x4a, bad id 0xffffffff PCI: devfn 0x4b, bad id 0xffffffff PCI: devfn 0x4c, bad id 0xffffffff PCI: devfn 0x4d, bad id 0xffffffff PCI: devfn 0x4e, bad id 0xffffffff PCI: devfn 0x4f, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: 00:12.0 [1078/0100] bus ops southbridge_enable: dev is 00018900 PCI: 00:12.0 [1078/0100] enabled malloc Enter, size 668, free_mem_ptr 00022000 malloc 0x00022000 PCI: 00:12.1 [1078/0101] enabled malloc Enter, size 668, free_mem_ptr 0002229c malloc 0x0002229c PCI: 00:12.2 [1078/0102] ops cs5530_ide: ide_enable PCI: 00:12.2 [1078/0102] enabled malloc Enter, size 668, free_mem_ptr 00022538 malloc 0x00022538 PCI: 00:12.3 [1078/0103] enabled malloc Enter, size 668, free_mem_ptr 000227d4 malloc 0x000227d4 PCI: 00:12.4 [1078/0104] ops PCI: 00:12.4 [1078/0104] enabled PCI: devfn 0x95, bad id 0xffffffff PCI: devfn 0x96, bad id 0xffffffff PCI: devfn 0x97, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00022a70 malloc 0x00022a70 PCI: 00:13.0 [0e11/a0f8] enabled PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:12.0 PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled scan_static_bus for PCI: 00:12.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 northbridge.c:pci_domain_read_resources() PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00000400 - 0x0000047f] io Root Device compute_allocate_io: base: 00000480 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 00:12.4 10 * [0x01000000 - 0x01000fff] mem PCI: 00:13.0 10 * [0x01001000 - 0x01001fff] mem PCI: 00:12.1 10 * [0x01002000 - 0x010020ff] mem PCI: 00:12.3 10 * [0x01003000 - 0x0100307f] mem Root Device compute_allocate_mem: base: 01003080 size: 01003080 align: 24 gran: 0 done Done reading resources. Looking at device Root Device Looking at device PCI_DOMAIN: 0000 Looking at device PCI: 00:00.0 Looking at device PCI: 00:09.0 first onboard = PCI: 00:09.0 Looking at device PCI: 00:09.0 Looking at device PCI: 00:12.0 Looking at device PNP: 002e.0 Looking at device PNP: 002e.1 Looking at device PNP: 002e.2 Looking at device PNP: 002e.3 Skipping disabled device PNP: 002e.3 Looking at device PNP: 002e.4 Looking at device PNP: 002e.5 Looking at device PNP: 002e.6 Looking at device PNP: 002e.7 Looking at device PNP: 002e.8 Looking at device PCI: 00:12.1 Skipping disabled device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Skipping disabled device PCI: 00:12.3 Looking at device PCI: 00:12.4 Skipping disabled device PCI: 00:12.4 Looking at device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Looking at device PCI: 00:12.4 first onboard = PCI: 00:12.4 Looking at device PCI: 00:13.0 Looking at vga_onboard Yes: PCI: 00:12.4 Reassigning vga to PCI: 00:12.4 Allocating VGA resource PCI: 00:12.4 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01003080 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:12.4 10 * [0xfe000000 - 0xfe000fff] mem PCI: 00:13.0 10 * [0xfe001000 - 0xfe001fff] mem PCI: 00:12.1 10 * [0xfe002000 - 0xfe0020ff] mem PCI: 00:12.3 10 * [0xfe003000 - 0xfe00307f] mem Root Device compute_allocate_mem: base: fe003080 size: 01003080 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:12.1 10 <- [0x00fe002000 - 0x00fe0020ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe003000 - 0x00fe00307f] mem PCI: 00:12.4 10 <- [0x00fe000000 - 0x00fe000fff] mem PCI: 00:13.0 10 <- [0x00fe001000 - 0x00fe001fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 142 cs5530.c: cs5530_pci_dev_enable_resources() PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 143 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init PCI: 00:12.0 init cs5530: southbridge_init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:12.1 init PCI: 00:12.2 init cs5530_ide: ide_init PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006c4 checksum fbee

Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3

# lspci -vv 00:00.0 0600: 1078:0001 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0

00:09.0 0300: 10ea:5000 (rev 02) Subsystem: 0202:0202 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 0 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Expansion ROM at 08000000 [disabled] [size=64K]

00:12.0 0601: 1078:0100 Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, Cache Line Size 04

00:12.3 0401: 1078:0103 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Region 0: Memory at fe003000 (32-bit, non-prefetchable) [size=128]

00:13.0 0c03: 0e11:a0f8 (rev 06) (prog-if 10) Subsystem: 0e11:a0f8 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 0 Region 0: Memory at fe001000 (32-bit, non-prefetchable) [size=4K]

Stefan Reinauer

2:28 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

* Christian Sühs chris@suehsi.de [060424 15:33]:

...

Now, the Kalhua is detect as onboard vga and assigned. ( That is not what I want :) )

So what is it you want, then? ;)

Christian Sühs

3:56 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

Stefan Reinauer schrieb:

...

Christian Sühs chris@suehsi.de [060424 15:33]:

...
Now, the Kalhua is detect as onboard vga and assigned. ( That is not what I want :) )

So what is it you want, then? ;)

I want, that the Kalhua is totally ignored. Because I don't need that item. I will now try my first Config.lb Then PCI 0:9.0 should be detect after the 0:12.4 and set as onboard vga. ( I hope so )

I think the problem is the meaning of "onboard"

Ok, both chips are onboard, but the cyperpro I think is more like a addon pci card integrated onboard ;) Also this chip has its own memory onboard and shares not the RAM

chris

Stefan Reinauer

2:42 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

* Christian Sühs chris@suehsi.de [060424 15:56]:

...

I want, that the Kalhua is totally ignored. Because I don't need that item. I will now try my first Config.lb Then PCI 0:9.0 should be detect after the 0:12.4 and set as onboard vga. ( I hope so )

I think the problem is the meaning of "onboard"

Ok, both chips are onboard, but the cyperpro I think is more like a addon pci card integrated onboard ;) Also this chip has its own memory onboard and shares not the RAM

Aaah :-)) I see.

Well, try changing the PCI ID in the last patch to that of the cyberpro..

Stefan

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

4:57 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

Aaah :-)) I see.

Well, try changing the PCI ID in the last patch to that of the cyberpro..

Yep, but it is alwalys the same. Wether the right device is allocated, but has the wrong or not enabled IO

or the false device is alocated. both have the same result --> no vga output.

I need a proper posted vga with romem on fe000000 the best I get is a not-posted 09.0 with romem on fe000000

but this is not enough :D , because the init fails later with a bad signatur on fe000000

The Problem is the kalhua, which comes up and is initialized. Is there any way to stop this.

chris

...

Stefan

Looking at device PCI_DOMAIN: 0000 Looking at device PCI: 00:00.0 Looking at device PCI: 00:12.0 Looking at device PNP: 002e.0 Looking at device PNP: 002e.1 Looking at device PNP: 002e.2 Looking at device PNP: 002e.3 Skipping disabled device PNP: 002e.3 Looking at device PNP: 002e.4 Looking at device PNP: 002e.5 Looking at device PNP: 002e.6 Looking at device PNP: 002e.7 Looking at device PNP: 002e.8 Looking at device PCI: 00:12.1 Skipping disabled device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Skipping disabled device PCI: 00:12.3 Looking at device PCI: 00:12.4 Skipping disabled device PCI: 00:12.4 Looking at device PCI: 00:09.0 Looking at device PCI: 00:09.0 Looking at device PCI: 00:09.0 vga_first = PCI: 00:09.0 Looking at device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Looking at device PCI: 00:12.4 last onboard = PCI: 00:12.4 Looking at device PCI: 00:13.0 vga = PCI: 00:09.0 Looking at vga_onboard Yes: PCI: 00:12.4 Reassigning vga to PCI: 00:12.4 Allocating VGA resource PCI: 00:12.4 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01013080 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:09.0 30 * [0xfe000000 - 0xfe00ffff] mem PCI: 00:12.4 10 * [0xfe010000 - 0xfe010fff] mem PCI: 00:13.0 10 * [0xfe011000 - 0xfe011fff] mem PCI: 00:12.1 10 * [0xfe012000 - 0xfe0120ff] mem PCI: 00:12.3 10 * [0xfe013000 - 0xfe01307f] mem Root Device compute_allocate_mem: base: fe013080 size: 01013080 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 30 <- [0x00fe000000 - 0x00fe00ffff] romem PCI: 00:12.1 10 <- [0x00fe012000 - 0x00fe0120ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe013000 - 0x00fe01307f] mem PCI: 00:12.4 10 <- [0x00fe010000 - 0x00fe010fff] mem PCI: 00:13.0 10 <- [0x00fe011000 - 0x00fe011fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 cmd <- 142 cs5530.c: cs5530_pci_dev_enable_resources() PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 143 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:12.0 init cs5530: southbridge_init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:09.0 init rom address for PCI: 00:09.0 = fe000000 PCI Expansion ROM, signature 0x0202, INIT size 0x0400, data ptr 0x0202 Incorrect Expansion ROM Header Signature 0202 PCI: 00:12.1 init PCI: 00:12.2 init cs5530_ide: ide_init PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init

# lspci -vv

Christian Sühs

5:12 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

However,

look here:

...

vga_first = PCI: 00:09.0

Thats good!

...

Looking at device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Looking at device PCI: 00:12.4

Why on hell does this happens?

...

last onboard = PCI: 00:12.4

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

This comes with the not changed patch It Should be vga_first = PCI 12.4 last onboard = PCI 9.0

or only one onboard device

...

Looking at device PCI: 00:13.0 vga = PCI: 00:09.0 Looking at vga_onboard Yes: PCI: 00:12.4 Reassigning vga to PCI: 00:12.4

Waaaaaaaaah!? Ok, the old patch.

...

Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:09.0 30 * [0xfe000000 - 0xfe00ffff] mem

Yeahhhhh, thats good

...

PCI: 00:12.4 10 * [0xfe010000 - 0xfe010fff] mem

...

PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 30 <- [0x00fe000000 - 0x00fe00ffff] romem

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Here is the needed IO Range

...

PCI: 00:12.1 10 <- [0x00fe012000 - 0x00fe0120ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe013000 - 0x00fe01307f] mem PCI: 00:12.4 10 <- [0x00fe010000 - 0x00fe010fff] mem PCI: 00:13.0 10 <- [0x00fe011000 - 0x00fe011fff] mem

...

PCI: 00:09.0 init rom address for PCI: 00:09.0 = fe000000 PCI Expansion ROM, signature 0x0202, INIT size 0x0400, data ptr 0x0202 Incorrect Expansion ROM Header Signature 0202

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Well, the false vga device was allocated

...

00:09.0 0300: 10ea:5000 (rev 02) Subsystem: 0202:0202

^^^^^^^^^^^^^^^^^^^^^ Is 0280:7000 with factory bios

...

Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-

^^^^ Why not?

...

Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 0 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Expansion ROM at fe000000 [disabled] [size=64K]

00:12.4 0300: 1078:0104

^^^^^^^^^^^^^^^^^^^^^^^^^ Damn, I can't see this longer :D

...

Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Region 0: Memory at fe010000 (32-bit, non-prefetchable) [size=4K]

Christian Sühs

5:20 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

Here is the output with changed patch. vendor/device ID to cyberpro.

LinuxBIOS-1.1.8.0Fallback Mon Apr 24 16:30:34 CEST 2006 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00001000 Component Banks: 4 Module Banks: 1 DIMM size: 04000000 Probing for DIMM1 MC_BANK_CFG = 00701420 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.8.0Fallback Mon Apr 24 16:30:34 CEST 2006 booting... end 530054e5, start 0 32-bit delta 346 calibrate_tsc 32-bit result is 346 clocks_per_usec: 346 Enumerating buses... scan_static_bus for Root Device Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] ops PCI: 00:00.0 [1078/0001] enabled PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: 00:09.0 [10ea/5000] ops PCI: 00:09.0 [10ea/5000] enabled PCI: devfn 0x49, bad id 0xffffffff PCI: devfn 0x4a, bad id 0xffffffff PCI: devfn 0x4b, bad id 0xffffffff PCI: devfn 0x4c, bad id 0xffffffff PCI: devfn 0x4d, bad id 0xffffffff PCI: devfn 0x4e, bad id 0xffffffff PCI: devfn 0x4f, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: 00:12.0 [1078/0100] bus ops southbridge_enable: dev is 00018900 PCI: 00:12.0 [1078/0100] enabled malloc Enter, size 668, free_mem_ptr 00022000 malloc 0x00022000 PCI: 00:12.1 [1078/0101] enabled malloc Enter, size 668, free_mem_ptr 0002229c malloc 0x0002229c PCI: 00:12.2 [1078/0102] ops cs5530_ide: ide_enable PCI: 00:12.2 [1078/0102] enabled malloc Enter, size 668, free_mem_ptr 00022538 malloc 0x00022538 PCI: 00:12.3 [1078/0103] enabled malloc Enter, size 668, free_mem_ptr 000227d4 malloc 0x000227d4 PCI: 00:12.4 [1078/0104] enabled PCI: devfn 0x95, bad id 0xffffffff PCI: devfn 0x96, bad id 0xffffffff PCI: devfn 0x97, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00022a70 malloc 0x00022a70 PCI: 00:13.0 [0e11/a0f8] enabled PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:12.0 PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled scan_static_bus for PCI: 00:12.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 northbridge.c:pci_domain_read_resources() PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00000400 - 0x0000047f] io Root Device compute_allocate_io: base: 00000480 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 00:12.4 10 * [0x01000000 - 0x01000fff] mem PCI: 00:13.0 10 * [0x01001000 - 0x01001fff] mem PCI: 00:12.1 10 * [0x01002000 - 0x010020ff] mem PCI: 00:12.3 10 * [0x01003000 - 0x0100307f] mem Root Device compute_allocate_mem: base: 01003080 size: 01003080 align: 24 gran: 0 done Done reading resources. Looking at device Root Device Looking at device PCI_DOMAIN: 0000 Looking at device PCI: 00:00.0 Looking at device PCI: 00:09.0 first onboard = PCI: 00:09.0 Looking at device PCI: 00:09.0 Looking at device PCI: 00:12.0 Looking at device PNP: 002e.0 Looking at device PNP: 002e.1 Looking at device PNP: 002e.2 Looking at device PNP: 002e.3 Skipping disabled device PNP: 002e.3 Looking at device PNP: 002e.4 Looking at device PNP: 002e.5 Looking at device PNP: 002e.6 Looking at device PNP: 002e.7 Looking at device PNP: 002e.8 Looking at device PCI: 00:12.1 Skipping disabled device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Skipping disabled device PCI: 00:12.3 Looking at device PCI: 00:12.4 Skipping disabled device PCI: 00:12.4 Looking at device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Looking at device PCI: 00:12.4 vga_first = PCI: 00:12.4 Looking at device PCI: 00:13.0 vga = PCI: 00:12.4 Looking at vga_onboard Yes: PCI: 00:09.0 Reassigning vga to PCI: 00:09.0 Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01003080 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:12.4 10 * [0xfe000000 - 0xfe000fff] mem PCI: 00:13.0 10 * [0xfe001000 - 0xfe001fff] mem PCI: 00:12.1 10 * [0xfe002000 - 0xfe0020ff] mem PCI: 00:12.3 10 * [0xfe003000 - 0xfe00307f] mem Root Device compute_allocate_mem: base: fe003080 size: 01003080 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:09.0 assign_resources, bus 0 link: 0 PCI: 00:12.1 10 <- [0x00fe002000 - 0x00fe0020ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe003000 - 0x00fe00307f] mem PCI: 00:12.4 10 <- [0x00fe000000 - 0x00fe000fff] mem PCI: 00:13.0 10 <- [0x00fe001000 - 0x00fe001fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 cmd <- 143 cs5530.c: cs5530_pci_dev_enable_resources() PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 142 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init PCI: 00:12.0 init cs5530: southbridge_init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:12.1 init PCI: 00:12.2 init cs5530_ide: ide_init PCI: 00:12.3 init PCI: 00:12.4 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006c4 checksum 7fea

Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3

33:stream_init() - rom_stream: 0xfffe0000 - 0xffff2fff Found ELF candiate at offset 0 header_offset is 0 Try to load at offset 0x0 malloc Enter, size 32, free_mem_ptr 00022d0c malloc 0x00022d0c New segment addr 0x100000 size 0x23ea0 offset 0xa0 filesize 0x9e08 (cleaned up) New segment addr 0x100000 size 0x23ea0 offset 0xa0 filesize 0x9e08 lb: [0x0000000000004000, 0x0000000000026000) malloc Enter, size 32, free_mem_ptr 00022d2c malloc 0x00022d2c New segment addr 0x123ea0 size 0x48 offset 0x9ec0 filesize 0x48 (cleaned up) New segment addr 0x123ea0 size 0x48 offset 0x9ec0 filesize 0x48 lb: [0x0000000000004000, 0x0000000000026000) Dropping non PT_LOAD segment Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000023ea0 filesz: 0x0000000000009e08 [ 0x0000000000100000, 0000000000109e08, 0x0000000000123ea0) <- 00000000000000a0 Clearing Segment: addr: 0x0000000000109e08 memsz: 0x000000000001a098 Loading Segment: addr: 0x0000000000123ea0 memsz: 0x0000000000000048 filesz: 0x0000000000000048 [ 0x0000000000123ea0, 0000000000123ee8, 0x0000000000123ee8) <- 0000000000009ec0 Loaded segments verified segments closed down stream Jumping to boot code at 0x107a20 entry = 0x00107a20 lb_start = 0x00004000 lb_size = 0x00022000 adjust = 0x03bda000 buffer = 0x03bbc000 elf_boot_notes = 0x0001b0a0 adjusted_boot_notes = 0x03bf50a0 FILO version 0.4.2 (root@linux) Fri Apr 21 16:37:59 CEST 2006 Press <Enter> for default boot, or <Esc> for boot prompt... 2 1 timed out boot: hdc1:/vmlinuz initrd=hdc1:/initrd.gz ramdisk_size=13000 root=/dev/ram0 max_loop=16 console=tty0 console=ttyS0,115200 LABEL=FB video=vesa:ywrap,mtrr vga=0x317 splash=silent MEDIA=hd CONFIG=False hdc: LBA 128MB: TRANSCEND Mounted fat Found Linux version 2.4.22 (root@linux) #11 Sat Apr 22 18:51:23 CEST 2006 bzImage. Loading kernel... ok Loading initrd... ok Jumping to entry point... Linux version 2.4.22 (root@linux) (gcc version 3.3 20030226 (prerelease) (SuSE Linux)) #11 Sat Apr 22 18:51:23 CEST 2006 BIOS-provided physical RAM map: BIOS-e820: 0000000000000738 - 00000000000a0000 (usable) BIOS-e820: 0000000000100000 - 0000000003c00000 (usable) 60MB LOWMEM available. hm, page 00000000 reserved twice. On node 0 totalpages: 15360 zone(0): 4096 pages. zone(1): 11264 pages. zone(2): 0 pages. DMI not present. Kernel command line: ramdisk_size=13000 root=/dev/ram0 max_loop=16 console=tty0 console=ttyS0,115200 LABEL=FB video=vesa:ywrap,mtrr vga=0x317 splash=silent MEDIA=hd CONFIG=False Initializing CPU#0 Working around Cyrix MediaGX virtual DMA bugs. Detected 233.867 MHz processor. Calibrating delay loop... 466.94 BogoMIPS Memory: 54920k/61440k available (919k kernel code, 6132k reserved, 258k data, 248k init, 0k highmem) Checking if this processor honours the WP bit even in supervisor mode... Ok. Dentry cache hash table entries: 8192 (order: 4, 65536 bytes) Inode cache hash table entries: 4096 (order: 3, 32768 bytes) Mount cache hash table entries: 512 (order: 0, 4096 bytes) Buffer cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 16384 (order: 4, 65536 bytes) Working around Cyrix MediaGX virtual DMA bugs. CPU: NSC Geode(TM) Integrated Processor by National Semi stepping 01 Checking 'hlt' instruction... OK. Checking for popad bug... OK. POSIX conformance testing by UNIFIX mtrr: v1.40 (20010327) Richard Gooch (rgooch@atnf.csiro.au) mtrr: detected mtrr type: none PCI: Using configuration type 1 PCI: Probing PCI hardware PCI: Probing PCI hardware (bus 00) PCI: Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x10) isapnp: Scanning for PnP cards... isapnp: No Plug & Play device found Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket Starting kswapd devfs: v1.12c (20020818) Richard Gooch (rgooch@atnf.csiro.au) devfs: boot_options: 0x1 Detected PS/2 Mouse Port. pty: 256 Unix98 ptys configured Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI ISAPNP enabled ttyS00 at 0x03f8 (irq = 4) is a 16550A ttyS01 at 0x02f8 (irq = 3) is a 16550A Real Time Clock Driver v1.10e RAMDISK driver initialized: 16 RAM disks of 13000K size 1024 blocksize loop: loaded (max 16 devices) Uniform Multi-Platform E-IDE driver Revision: 7.00beta4-2.4 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx CS5530: IDE controller at PCI slot 00:12.2 CS5530: chipset revision 0 CS5530: not 100% native mode: will probe irqs later PCI: 00:12.0 PCI cache line size set incorrectly (0 bytes) by BIOS/FW. PCI: 00:12.0 PCI cache line size corrected to 16. ide0: BM-DMA at 0x1000-0x1007, BIOS settings: hda:pio, hdb:pio ide1: BM-DMA at 0x1008-0x100f, BIOS settings: hdc:pio, hdd:pio hda: C/H/S=0/0/0 from BIOS ignored hda: TRANSCEND DOM128M, ATA DISK drive hdc: TRANSCEND, CFA DISK drive ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 ide1 at 0x170-0x177,0x376 on irq 15 (serialized with ide0) hda: attached ide-disk driver. hda: task_no_data_intr: status=0x51 { DriveReady SeekComplete Error } hda: task_no_data_intr: error=0x04 { DriveStatusError } hda: 250368 sectors (128 MB) w/2KiB Cache, CHS=978/8/32 hdc: attached ide-disk driver. hdc: task_no_data_intr: status=0x51 { DriveReady SeekComplete Error } hdc: task_no_data_intr: error=0x04 { DriveStatusError } hdc: 250880 sectors (128 MB) w/2KiB Cache, CHS=980/8/32 Partition check: /dev/ide/host0/bus0/target0/lun0: p1 /dev/ide/host0/bus1/target0/lun0: p1 p2 NET4: Linux TCP/IP 1.0 for NET4.0 IP Protocols: ICMP, UDP, TCP, IGMP IP: routing cache hash table of 512 buckets, 4Kbytes TCP: Hash tables configured (established 4096 bind 8192) RAMDISK: Compressed image found at block 0 Freeing initrd memory: 3791k freed VFS: Mounted root (ext2 filesystem) readonly. Mounted devfs on /dev Freeing unused kernel memory: 248k freed NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. init started: BusyBox v0.60.5 (2005.09.18-12:18+0000) multi-call binary rm: unable to remove `/etc/mtab': Read-only file system Jan 2 16:34:04 (none) syslog.info syslogd started: BusyBox v0.60.5 (2005.09.18-12:18+0000) /sbin/klogd: invalid option -- c BusyBox v0.60.5 (2005.09.18-12:18+0000) multi-call binary

Usage: klogd -n

Kernel logger. Options: -n Run as a foreground process.

/dev/shm on /tmp type tmpfs (rw) none on /proc type proc (rw) depmod: Can't open /lib/modules/2.4.22/modules.dep for writing Starting devfs daemon: /sbin/devfsd /dev Started device management daemon v1.3.25 for /dev /dev/ide/host0/bus1/target0/lun0: p1 p2 open /dev/fb0: No such file or directory Attempting to find MoviX on /dev/discs/disc0/part1 /dev/ide/host0/bus1/target0/lun0: p1 p2 Attempting to find MoviX on /dev/discs/disc1/part1 /dev/ide/host0/bus1/target0/lun0: p1 p2 /dev/ide/host0/bus1/target0/lun0: p1 p2 Found MoviX folder in /dev/discs/disc1/part1! ln: /cdrom/credits.txt: Read-only file system ln: /cdrom/doctools: Read-only file system ln: /cdrom/flashrom: Read-only file system ln: /cdrom/initrd.gz: Read-only file system ln: /cdrom/ldlinux.sys: Read-only file system ln: /cdrom/movix: Read-only file system ln: /cdrom/mphelp.txt: Read-only file system ln: /cdrom/mx2help.txt: Read-only file system ln: /cdrom/qlcboot.lss: Read-only file system ln: /cdrom/qlcboot.msg: Read-only file system ln: /cdrom/syslinux.cfg: Read-only file system ln: /cdrom/trblst.txt: Read-only file system ln: /cdrom/trblst2.txt: Read-only file system ln: /cdrom/trblst3.txt: Read-only file system ln: /cdrom/uniflash: Read-only file system ln: /cdrom/version.txt: Read-only file system ln: /c

BusyBox v0.60.5 (2005.09.18-12:18+0000) Built-in shell (ash) Enter 'help' for a list of built-in commands.

id: unknown user name: 0 id: unknown user name: 0 # lspci -vv 00:00.0 0600: 1078:0001 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0

Richard Smith

6:42 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

On 4/24/06, Christian Sühs chris@suehsi.de wrote:

...

Here is the output with changed patch. vendor/device ID to cyberpro.

I think I am beginning to see what's happening here device 12.4 seems to have mutiple entries in the device tree.

I've not looked at the pci enum stuff so I don't quite understand what is going on but looking at the log I see.. (I've sniped it down a bit)

...

PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] ops PCI: 00:00.0 [1078/0001] enabled PCI: 00:09.0 [10ea/5000] ops PCI: 00:09.0 [10ea/5000] enabled PCI: 00:12.0 [1078/0100] bus ops

Notice that it detected the southbrige with 'bus' ops

...

southbridge_enable: dev is 00018900 PCI: 00:12.0 [1078/0100] enabled malloc Enter, size 668, free_mem_ptr 00022000 malloc 0x00022000 PCI: 00:12.1 [1078/0101] enabled malloc Enter, size 668, free_mem_ptr 0002229c malloc 0x0002229c PCI: 00:12.2 [1078/0102] ops cs5530_ide: ide_enable PCI: 00:12.2 [1078/0102] enabled malloc Enter, size 668, free_mem_ptr 00022538 malloc 0x00022538 PCI: 00:12.3 [1078/0103] enabled malloc Enter, size 668, free_mem_ptr 000227d4 malloc 0x000227d4 PCI: 00:12.4 [1078/0104] enabled

So here is entry #1 and it has the device enabled.

...

malloc Enter, size 668, free_mem_ptr 00022a70 malloc 0x00022a70 PCI: 00:13.0 [0e11/a0f8] enabled

Now we move into another scan of just the 12.x devices

...

scan_static_bus for PCI: 00:12.0 PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled scan_static_bus for PCI: 00:12.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done

So according to all this 12.4 is in the tree twice once as enabled and once as disabled. Which is what we see later on when doing then VGA resource allocation.

Most of this code was doen by Eric B. I've added him to the To: list since I don't think he follows the LB list very closely anymore.

Eric:

I know you are a busy man and coming in on this cold but perhaps you can shed some light on this? Chris is trying to set up another board based on the eaglelion/5bcm board but his board has an additional VGA device at 9.0 and he wants that device to show up as the primary device. We have 12.4 marked as "off" in the Options.lb but its still getting picked and assiged to the VGA resource.

The gory details should be on the list under this thread.

-- Richard A. Smith

ebiederman＠lnxi.com

25 Apr 25 Apr

8:26 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

"Richard Smith" smithbone@gmail.com writes:

...

On 4/24/06, Christian Sühs chris@suehsi.de wrote:

...
Here is the output with changed patch. vendor/device ID to cyberpro.

I think I am beginning to see what's happening here device 12.4 seems to have mutiple entries in the device tree.

I've not looked at the pci enum stuff so I don't quite understand what is going on but looking at the log I see.. (I've sniped it down a bit)

...
PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] ops PCI: 00:00.0 [1078/0001] enabled PCI: 00:09.0 [10ea/5000] ops PCI: 00:09.0 [10ea/5000] enabled PCI: 00:12.0 [1078/0100] bus ops

Notice that it detected the southbrige with 'bus' ops

...
southbridge_enable: dev is 00018900 PCI: 00:12.0 [1078/0100] enabled malloc Enter, size 668, free_mem_ptr 00022000 malloc 0x00022000 PCI: 00:12.1 [1078/0101] enabled malloc Enter, size 668, free_mem_ptr 0002229c malloc 0x0002229c PCI: 00:12.2 [1078/0102] ops cs5530_ide: ide_enable PCI: 00:12.2 [1078/0102] enabled malloc Enter, size 668, free_mem_ptr 00022538 malloc 0x00022538 PCI: 00:12.3 [1078/0103] enabled malloc Enter, size 668, free_mem_ptr 000227d4 malloc 0x000227d4 PCI: 00:12.4 [1078/0104] enabled

So here is entry #1 and it has the device enabled.

...

...
malloc Enter, size 668, free_mem_ptr 00022a70 malloc 0x00022a70 PCI: 00:13.0 [0e11/a0f8] enabled

Now we move into another scan of just the 12.x devices

...
scan_static_bus for PCI: 00:12.0 PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: 00:12.1 disabled PCI: 00:12.2 enabled PCI: 00:12.3 disabled PCI: 00:12.4 disabled scan_static_bus for PCI: 00:12.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done

So according to all this 12.4 is in the tree twice once as enabled and once as disabled. Which is what we see later on when doing then VGA resource allocation.

I'm not quite certain that is right, although it may be. There is a part where we unify the static and the dynamic device tress.

It does not look correct for 12.1,12.2,12.3,12.4 to be static devices of device 12.0 though. I suspect there is an unnecessary level of nesting in Config.lb that is causing this.

...

Most of this code was doen by Eric B. I've added him to the To: list since I don't think he follows the LB list very closely anymore.

No but I am happy to help when I have a minute. Somedays I feel like I am wearing as many hats as the mad hatter in Alice in Wonderland....

...

Eric:

I know you are a busy man and coming in on this cold but perhaps you can shed some light on this? Chris is trying to set up another board based on the eaglelion/5bcm board but his board has an additional VGA device at 9.0 and he wants that device to show up as the primary device. We have 12.4 marked as "off" in the Options.lb but its still getting picked and assiged to the VGA resource.

So I would first check to see if the VGA adapter identification code checks the enable bit. It is quite possible that just because a device is disable that I we don't ignore it. Looking at an old version of the code, we do clearly do not check the enable bit, and just finds the first vga device on the list of all devices.

...

The gory details should be on the list under this thread.

I'm trying to answer without looking :)

Eric

Richard Smith

8:43 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

So I would first check to see if the VGA adapter identification code checks the enable bit.

I added debug code that does just that.

...

It is quite possible that just because a device is disable that I we don't ignore it. Looking at an old version of the code, we do clearly do not check the enable bit, and just finds the first vga device on the list of all devices.

That version must be pretty old then. The current code will 'continue' the loop if the enable is not set. Here's what my VGA debug code spewed.. Notice that 12.4 is in the tree twice once disabled (where it is skipped) and then a second time where it gets picked up.

Perhaps the merge of the static and dynamic trees gets tripped up by whats in the Config.lb?

-- Richard A. Smith

ebiederman＠lnxi.com

8:59 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

"Richard Smith" smithbone@gmail.com writes:

...

...
So I would first check to see if the VGA adapter identification code checks the enable bit.

I added debug code that does just that.

...
It is quite possible that just because a device is disable that I we don't ignore it. Looking at an old version of the code, we do clearly do not check the enable bit, and just finds the first vga device on the list of all devices.

That version must be pretty old then.

Yep. :) Just something laying around on my hard drive. One of these days I will figure out how to get the SVN tree.

...

The current code will 'continue' the loop if the enable is not set. Here's what my VGA debug code spewed.. Notice that 12.4 is in the tree twice once disabled (where it is skipped) and then a second time where it gets picked up.

Perhaps the merge of the static and dynamic trees gets tripped up by whats in the Config.lb?

That is what it looks like. The static 12.[123] appears to be on a child bus of 12.0 which is nonsense in this case.

See my other message on the properly indented version of Config.lb It appears we have structures that just aren't closed properly.

There has got to be a good way to prevent that but...

Eric

Richard Smith

9:10 a.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

...

...
Perhaps the merge of the static and dynamic trees gets tripped up by whats in the Config.lb?

That is what it looks like. The static 12.[123] appears to be on a child bus of 12.0 which is nonsense in this case.

Thats what I was thinking but I wasn't quite sure enough what the "right" way should look like.

...

See my other message on the properly indented version of Config.lb It appears we have structures that just aren't closed properly.

Did you miss the end after pci 9.0 here?

chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfffc0000" end

-- Richard A. Smith

Ronald G Minnich

5:15 p.m.

New subject: [LinuxBIOS] New Target for LinuxBios MB1030 / 3036 Success!!!???

Eric W. Biederman wrote:

...

So I would first check to see if the VGA adapter identification code checks the enable bit. It is quite possible that just because a device is disable that I we don't ignore it. Looking at an old version of the code, we do clearly do not check the enable bit, and just finds the first vga device on the list of all devices.

yes, my memory of that code was that it was pretty simple minded.

Find first vga device. Start it up.

I think, however, that Ollie fixed it up quite a bit, so i am no longer sure that is the case. We will be working with that code in a day or two, so I'll know better then. ron

Christian Sühs

24 Apr 24 Apr

7:48 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Look to the attachment, but Lb stops on emulate vga :(

Looking at device Root Device Looking at device PCI_DOMAIN: 0000 Looking at device PCI: 00:00.0 Looking at device PCI: 00:09.0 first onboard = PCI: 00:09.0 Looking at device PCI: 00:12.0 Looking at device PNP: 002e.0 Looking at device PNP: 002e.1 Looking at device PNP: 002e.2 Looking at device PNP: 002e.3 Skipping disabled device PNP: 002e.3 Looking at device PNP: 002e.4 Looking at device PNP: 002e.5 Looking at device PNP: 002e.6 Looking at device PNP: 002e.7 Looking at device PNP: 002e.8 Looking at device PCI: 00:12.1 Skipping disabled device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Skipping disabled device PCI: 00:12.3 Looking at device PCI: 00:12.4 Skipping disabled device PCI: 00:12.4 Looking at device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Looking at device PCI: 00:12.4 vga_first = PCI: 00:12.4 Looking at device PCI: 00:13.0 vga = PCI: 00:12.4 Looking at vga_onboard Yes: PCI: 00:09.0 Reassigning vga to PCI: 00:09.0 Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01003080 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:12.4 10 * [0xfe000000 - 0xfe000fff] mem PCI: 00:13.0 10 * [0xfe001000 - 0xfe001fff] mem PCI: 00:12.1 10 * [0xfe002000 - 0xfe0020ff] mem PCI: 00:12.3 10 * [0xfe003000 - 0xfe00307f] mem Root Device compute_allocate_mem: base: fe003080 size: 01003080 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 30 <- [0x00fffc0000 - 0x00fffcffff] romem PCI: 00:12.1 10 <- [0x00fe002000 - 0x00fe0020ff] mem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:12.3 10 <- [0x00fe003000 - 0x00fe00307f] mem PCI: 00:12.4 10 <- [0x00fe000000 - 0x00fe000fff] mem PCI: 00:13.0 10 <- [0x00fe001000 - 0x00fe001fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 143 cs5530.c: cs5530_pci_dev_enable_resources() PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 missing enable_resources PCI: 00:12.1 cmd <- 142 PCI: 00:12.2 cmd <- 141 PCI: 00:12.3 cmd <- 142 PCI: 00:12.4 cmd <- 142 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0031 PCI ROM Image, Vendor 10ea, Device 5000, PCI ROM Image, Class Code 030000, Code Type 00 copying VGA ROM Image from fffc0000 to c0000, 8000 bytes entering emulator

Richard Smith

6:47 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0031 PCI ROM Image, Vendor 10ea, Device 5000, PCI ROM Image, Class Code 030000, Code Type 00 copying VGA ROM Image from fffc0000 to c0000, 8000 bytes entering emulator

So what did you do?

-- Richard A. Smith

Christian Sühs

8:49 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Christian Sühs schrieb:

...

...
So what did you do?

good question ;)

I have removed stefan's patch.

but I think, later it is important to have this stuff. However, than I have played around with the config.lb It seems to be very Important where the entry is located in that file.

Currently I have had a lot of tries with different locations. for the device entries.

I get the same, If I insert the vga entry after the chip soutbridge line If I insert the entry after the device 12.0 LB boots as before with false rom signatur.

Next I will try a vga.bios get with dd Currently I use an extracted one.

Both vga.bios starts with testbios but It is a try :D

This is the version, were the emulatur tries to bring up vga. ------------------------------------------------------------------------

## ## Include the secondary Configuration files ## dir /pc80 config chip.h

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end # device pci 9.0 on // Is this on the right place ?? chip drivers/pci/onboard // first it was at the end of the file device pci 9.0 on end register "rom_address" = "0xfffc0000" end # end chip southbridge/amd/cs5530 device pci 12.0 on ----------------------------------------------------------------------

Stefan Reinauer

8:33 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060424 20:49]:

...

Currently I have had a lot of tries with different locations. for the device entries.

...

This is the version, were the emulatur tries to bring up vga.

can you post all of the Config.lb file please?

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Ronald G Minnich

8:41 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Stefan Reinauer wrote:

...

Christian Sühs chris@suehsi.de [060424 20:49]:

...
Currently I have had a lot of tries with different locations. for the device entries.

...
This is the version, were the emulatur tries to bring up vga.

can you post all of the Config.lb file please?

I think we also need the static.c that is output.

ron

Christian Sühs

10:18 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

I think we also need the static.c that is output.

ron

Ok,

#include <device/device.h> #include <device/pci.h> #include "/root/src/LinuxBIOSv2/src/superio/NSC/pc97317/chip.h" #include "/root/src/LinuxBIOSv2/src/northbridge/amd/gx1/chip.h" #include "/root/src/LinuxBIOSv2/src/mainboard/allwell/stb3036/chip.h" #include "/root/src/LinuxBIOSv2/src/drivers/pci/onboard/chip.h" struct device _dev3; struct device _dev4; struct device _dev6; struct device _dev8; struct device _dev19; struct device _dev20; struct device _dev21; struct device _dev22; struct device _dev10; struct device _dev11; struct device _dev12; struct device _dev13; struct device _dev14; struct device _dev15; struct device _dev16; struct device _dev17; struct device _dev18; struct mainboard_allwell_stb3036_config mainboard_allwell_stb3036_info_0; struct device **last_dev_p = &_dev22.next; struct device dev_root = { .ops = &default_dev_ops_root, .bus = &dev_root.link[0], .path = { .type = DEVICE_PATH_ROOT }, .enabled = 1, .links = 1, .on_mainboard = 1, .link = { [0] = { .dev=&dev_root, .link = 0, .children = &_dev3, }, }, .chip_ops = &mainboard_allwell_stb3036_ops, .chip_info = &mainboard_allwell_stb3036_info_0, .next = &_dev3, }; struct northbridge_amd_gx1_config northbridge_amd_gx1_info_2; struct device _dev3 = { .ops = 0, .bus = &dev_root.link[0], .path = {.type=DEVICE_PATH_PCI_DOMAIN,.u={.pci_domain={ .domain = 0x0 }}}, .enabled = 1, .on_mainboard = 1, .link = { [0] = { .link = 0, .dev = &_dev3, .children = &_dev4, }, }, .links = 1, .chip_ops = &northbridge_amd_gx1_ops, .chip_info = &northbridge_amd_gx1_info_2, .next=&_dev4 }; struct device _dev4 = { .ops = 0, .bus = &_dev3.link[0], .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x0,0)}}}, .enabled = 1, .on_mainboard = 1, .link = { }, .links = 0, .sibling = &_dev6, .chip_ops = &northbridge_amd_gx1_ops, .chip_info = &northbridge_amd_gx1_info_2, .next=&_dev6 }; struct drivers_pci_onboard_config drivers_pci_onboard_info_5 = { .rom_address = 0xfffc0000, };

struct device _dev6 = { .ops = 0, .bus = &_dev3.link[0], .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x9,0)}}}, .enabled = 1, .on_mainboard = 1, .link = { }, .links = 0, .sibling = &_dev8, .chip_ops = &drivers_pci_onboard_ops, .chip_info = &drivers_pci_onboard_info_5, .next=&_dev8 }; struct device _dev8 = { .ops = 0, .bus = &_dev3.link[0], .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,0)}}}, .enabled = 1, .on_mainboard = 1, .link = { [0] = { .link = 0, .dev = &_dev8, .children = &_dev10, }, }, .links = 1, .next=&_dev10 }; struct superio_NSC_pc97317_config superio_NSC_pc97317_info_9 = { .com1 = {115200}, .com2 = {38400}, };

struct device _dev19 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,1)}}}, .enabled = 0, .on_mainboard = 1, .link = { }, .links = 0, .sibling = &_dev20, .next=&_dev20 }; struct device _dev20 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,2)}}}, .enabled = 1, .on_mainboard = 1, .link = { }, .links = 0, .sibling = &_dev21, .next=&_dev21 }; struct device _dev21 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,3)}}}, .enabled = 0, .on_mainboard = 1, .link = { }, .links = 0, .sibling = &_dev22, .next=&_dev22 }; struct device _dev22 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn = PCI_DEVFN(0x12,4)}}}, .enabled = 0, .on_mainboard = 1, .link = { }, .links = 0, }; struct device _dev10 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x0 }}}, .enabled = 1, .on_mainboard = 1, .resources = 3, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x60}, { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x62, .base=0x64}, { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x1}, }, .link = { }, .links = 0, .sibling = &_dev11, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev11 }; struct device _dev11 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x1 }}}, .enabled = 1, .on_mainboard = 1, .resources = 1, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0xc}, }, .link = { }, .links = 0, .sibling = &_dev12, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev12 }; struct device _dev12 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x2 }}}, .enabled = 1, .on_mainboard = 1, .resources = 2, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x70}, { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x8}, }, .link = { }, .links = 0, .sibling = &_dev13, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev13 }; struct device _dev13 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x3 }}}, .enabled = 0, .on_mainboard = 1, .link = { }, .links = 0, .sibling = &_dev14, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev14 }; struct device _dev14 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x4 }}}, .enabled = 1, .on_mainboard = 1, .resources = 2, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x378}, { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x7}, }, .link = { }, .links = 0, .sibling = &_dev15, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev15 }; struct device _dev15 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x5 }}}, .enabled = 1, .on_mainboard = 1, .resources = 2, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x2f8}, { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x3}, }, .link = { }, .links = 0, .sibling = &_dev16, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev16 }; struct device _dev16 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x6 }}}, .enabled = 1, .on_mainboard = 1, .resources = 2, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0x3f8}, { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IRQ, .index=0x70, .base=0x4}, }, .link = { }, .links = 0, .sibling = &_dev17, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev17 }; struct device _dev17 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x7 }}}, .enabled = 1, .on_mainboard = 1, .resources = 1, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0xe0}, }, .link = { }, .links = 0, .sibling = &_dev18, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev18 }; struct device _dev18 = { .ops = 0, .bus = &_dev8.link[0], .path = {.type=DEVICE_PATH_PNP,.u={.pnp={ .port = 0x2e, .device = 0x8 }}}, .enabled = 1, .on_mainboard = 1, .resources = 1, .resource = { { .flags=IORESOURCE_FIXED | IORESOURCE_ASSIGNED | IORESOURCE_IO, .index=0x60, .base=0xe800}, }, .link = { }, .links = 0, .sibling = &_dev19, .chip_ops = &superio_NSC_pc97317_ops, .chip_info = &superio_NSC_pc97317_info_9, .next=&_dev19 };

Christian Sühs

10:03 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

can you post all of the Config.lb file please?

S.

Sure

## ## Compute the location and size of where this firmware image ## (linuxBIOS plus bootloader) will live in the boot rom chip. ## if USE_FALLBACK_IMAGE default ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) else default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) default ROM_SECTION_OFFSET = 0 end

## ## Compute the start location and size size of ## The linuxBIOS bootloader. ## default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )

## ## Compute where this copy of linuxBIOS will start in the boot rom ## default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )

## ## Compute a range of ROM that can cached to speed up linuxBIOS, ## execution speed. ## ## XIP_ROM_SIZE must be a power of 2. ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE ## default XIP_ROM_SIZE=65536 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )

## ## Set all of the defaults for an x86 architecture ##

arch i386 end

## ## Build the objects we have code for in this directory. ##

driver mainboard.o

if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o

## ## Romcc output ## makerule ./failover.E depends "$(MAINBOARD)/failover.c ./romcc" action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end

makerule ./failover.inc depends "$(MAINBOARD)/failover.c ./romcc" action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end

makerule ./auto.E depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc depends "$(MAINBOARD)/auto.c option_table.h ./romcc" action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end

## ## Build our 16 bit and 32 bit linuxBIOS entry code ## mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds

## ## Build our reset vector (This is where linuxBIOS is entered) ## if USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds else mainboardinit cpu/x86/32bit/reset32.inc ldscript /cpu/x86/32bit/reset32.lds end

### Should this be in the northbridge code? mainboardinit arch/i386/lib/cpu_reset.inc

## ## Include an id string (For safe flashing) ## mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds

### ### This is the early phase of linuxBIOS startup ### Things are delicate and we test to see if we should ### failover to another image. ### if USE_FALLBACK_IMAGE ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end

### ### O.k. We aren't just an intermediary anymore! ###

## ## Setup RAM ## mainboardinit cpu/x86/fpu/enable_fpu.inc mainboardinit cpu/amd/model_gx1/cpu_setup.inc mainboardinit cpu/amd/model_gx1/gx_setup.inc mainboardinit ./auto.inc

## ## Include the secondary Configuration files ## dir /pc80 config chip.h

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end # device pci 9.0 on chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfffc0000" end # end chip southbridge/amd/cs5530 device pci 12.0 on chip superio/NSC/pc97317 device pnp 2e.0 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 end device pnp 2e.1 on # Mouse irq 0x70 = 12 end device pnp 2e.2 on # RTC io 0x60 = 0x70 irq 0x70 = 8 end device pnp 2e.3 off # FDC end device pnp 2e.4 on # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 end device pnp 2e.5 on # COM2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.6 on # COM1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.7 on # GPIO io 0x60 = 0xe0 end device pnp 2e.8 on # Power Management io 0x60 = 0xe800 end register "com1" = "{115200}" register "com2" = "{38400}" end device pci 12.1 off end # SMI device pci 12.2 on end # IDE device pci 12.3 off end # Audio device pci 12.4 off end # VGA end end end

chip cpu/amd/model_gx1 end

end

ebiederman＠lnxi.com

25 Apr 25 Apr

8:44 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Christian Sühs chris@suehsi.de writes:

...

...
can you post all of the Config.lb file please? S.

Hmm. I deleted the commented out lines and cleaned up the indentation and this is what I see.

It appears we have several nesting problems. Nothing should be inside drivce/pci/onboard except pci 9.0.

Having pci 12.1,12.2,12.3 inside of pci 12.0 looks distinctly suspicious.

The version in static.c appears to confirm this.

It actually looks to me like we are short an end. is that really accepted?

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfffc0000" end chip southbridge/amd/cs5530 device pci 12.0 on chip superio/NSC/pc97317 device pnp 2e.0 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 end device pnp 2e.1 on # Mouse irq 0x70 = 12 end device pnp 2e.2 on # RTC io 0x60 = 0x70 irq 0x70 = 8 end device pnp 2e.3 off # FDC end device pnp 2e.4 on # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 end device pnp 2e.5 on # COM2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.6 on # COM1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.7 on # GPIO io 0x60 = 0xe0 end device pnp 2e.8 on # Power Management io 0x60 = 0xe800 end register "com1" = "{115200}" register "com2" = "{38400}" end device pci 12.1 off end # SMI device pci 12.2 on end # IDE device pci 12.3 off end # Audio device pci 12.4 off end # VGA end end end chip cpu/amd/model_gx1 end end

Eric

Richard Smith

9:01 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

Hmm. I deleted the commented out lines and cleaned up the indentation and this is what I see.

It appears we have several nesting problems. Nothing should be inside drivce/pci/onboard except pci 9.0.

Having pci 12.1,12.2,12.3 inside of pci 12.0 looks distinctly suspicious.

The version in static.c appears to confirm this.

It actually looks to me like we are short an end. is that really accepted?

Yep.. I just took what you posted pasted it over the existing, ran buildtarget and then make and it made fine. -- Richard A. Smith

Ronald G Minnich

5:19 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Richard Smith wrote:

...

...
Hmm. I deleted the commented out lines and cleaned up the indentation and this is what I see.

It appears we have several nesting problems. Nothing should be inside drivce/pci/onboard except pci 9.0.

Having pci 12.1,12.2,12.3 inside of pci 12.0 looks distinctly suspicious.

The version in static.c appears to confirm this.

It actually looks to me like we are short an end. is that really accepted?

Yep.. I just took what you posted pasted it over the existing, ran buildtarget and then make and it made fine. -- Richard A. Smith

great. Thinking about it, I don't think the parser is smart enough to catch that. Goodness, that's Parsing 101 and I missed it!

We had a project here to replace the config tool with Kconfig, but it did not work out -- our needs are more complex that Kconfig could accomodate. But fixing up the config parser is on the list.

At a minimum, however, if somebody had a .emacs for the config language even that would help ...

For now, however ,I think the Config issue with this mobo is drawing into focus.

ron

Richard Smith

5:44 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

On 4/25/06, Ronald G Minnich rminnich@lanl.gov wrote:

...

great. Thinking about it, I don't think the parser is smart enough to catch that. Goodness, that's Parsing 101 and I missed it!

We had a project here to replace the config tool with Kconfig, but it did not work out -- our needs are more complex that Kconfig could accomodate. But fixing up the config parser is on the list.

At a minimum, however, if somebody had a .emacs for the config language even that would help ...

.emacs.. yuck. I might try something that works in vi though. Is there any really up to date documentation on the keyworks and structure of the PCI list other than the code? Its not obvious sometimes what keywords need an end statement and which don't.

And there are obviously several wrong examples.

-- Richard A. Smith

Ronald G Minnich

5:50 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Richard Smith wrote:

...

.emacs.. yuck. I might try something that works in vi though. Is there any really up to date documentation on the keyworks and structure of the PCI list other than the code? Its not obvious sometimes what keywords need an end statement and which don't.

no, and if we could get someone and get some time, we'd redo the whole language with someone in the loop who knows how to do languages.

...

And there are obviously several wrong examples.

yes.

ron

ebiederman＠lnxi.com

9:27 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

To be clear I think the Config.lb should read:

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfffc0000" end end chip southbridge/amd/cs5530 device pci 12.0 on chip superio/NSC/pc97317 device pnp 2e.0 on # Keyboard io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 end device pnp 2e.1 on # Mouse irq 0x70 = 12 end device pnp 2e.2 on # RTC io 0x60 = 0x70 irq 0x70 = 8 end device pnp 2e.3 off # FDC end device pnp 2e.4 on # Parallel Port io 0x60 = 0x378 irq 0x70 = 7 end device pnp 2e.5 on # COM2 io 0x60 = 0x2f8 irq 0x70 = 3 end device pnp 2e.6 on # COM1 io 0x60 = 0x3f8 irq 0x70 = 4 end device pnp 2e.7 on # GPIO io 0x60 = 0xe0 end device pnp 2e.8 on # Power Management io 0x60 = 0xe800 end register "com1" = "{115200}" register "com2" = "{38400}" end end device pci 12.1 off end # SMI device pci 12.2 on end # IDE device pci 12.3 off end # Audio device pci 12.4 off end # VGA end chip cpu/amd/model_gx1 end end end

Eric

Christian Sühs

4:56 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Thanks for this.

Eric W. Biederman schrieb:

...

To be clear I think the Config.lb should read:

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfffc0000" end

I had to disable this "end tag" for a successful build.

# end

...

chip southbridge/amd/cs5530
	device pci 12.0 on
		chip superio/NSC/pc97317
			device pnp 2e.0 on # Keyboard
				 io 0x60 = 0x60
				 io 0x62 = 0x64
				irq 0x70 = 1

Have a look to the attachment, the disabled PCI 12.4 device comes no longer up :D

I think this Config.lb version is better than the old one ;)

chris

LinuxBIOS-1.1.8.0Fallback Tue Apr 25 16:37:44 CEST 2006 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00001000 Component Banks: 4 Module Banks: 1 DIMM size: 04000000 Probing for DIMM1 MC_BANK_CFG = 00701420 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.8.0Fallback Tue Apr 25 16:37:44 CEST 2006 booting... end 5822a3ef, start 0 32-bit delta 346 calibrate_tsc 32-bit result is 346 clocks_per_usec: 346 Enumerating buses... scan_static_bus for Root Device Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] ops PCI: 00:00.0 [1078/0001] enabled PCI: devfn 0x8, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: 00:09.0 [10ea/5000] enabled PCI: devfn 0x49, bad id 0xffffffff PCI: devfn 0x4a, bad id 0xffffffff PCI: devfn 0x4b, bad id 0xffffffff PCI: devfn 0x4c, bad id 0xffffffff PCI: devfn 0x4d, bad id 0xffffffff PCI: devfn 0x4e, bad id 0xffffffff PCI: devfn 0x4f, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff PCI: devfn 0x68, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff PCI: devfn 0x78, bad id 0xffffffff PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: 00:12.0 [1078/0100] bus ops southbridge_enable: dev is 000187a0 PCI: 00:12.0 [1078/0100] enabled PCI: 00:12.1 [1078/0101] disabled PCI: 00:12.2 [1078/0102] ops cs5530_ide: ide_enable PCI: 00:12.2 [1078/0102] enabled PCI: 00:12.3 [1078/0103] disabled PCI: 00:12.4 [1078/0104] disabled PCI: devfn 0x95, bad id 0xffffffff PCI: devfn 0x96, bad id 0xffffffff PCI: devfn 0x97, bad id 0xffffffff malloc Enter, size 668, free_mem_ptr 00022000 malloc 0x00022000 PCI: 00:13.0 [0e11/a0f8] enabled PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:12.0 PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled scan_static_bus for PCI: 00:12.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 northbridge.c:pci_domain_read_resources() PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00000400 - 0x0000047f] io Root Device compute_allocate_io: base: 00000480 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 00:13.0 10 * [0x01000000 - 0x01000fff] mem Root Device compute_allocate_mem: base: 01001000 size: 01001000 align: 24 gran: 0 done Done reading resources. Looking at device Root Device Looking at device PCI_DOMAIN: 0000 Looking at device PCI: 00:00.0 Looking at device PCI: 00:09.0 first onboard = PCI: 00:09.0 Looking at device PCI: 00:12.0 Looking at device PNP: 002e.0 Looking at device PNP: 002e.1 Looking at device PNP: 002e.2 Looking at device PNP: 002e.3 Skipping disabled device PNP: 002e.3 Looking at device PNP: 002e.4 Looking at device PNP: 002e.5 Looking at device PNP: 002e.6 Looking at device PNP: 002e.7 Looking at device PNP: 002e.8 Looking at device PCI: 00:12.1 Skipping disabled device PCI: 00:12.1 Looking at device PCI: 00:12.2 Looking at device PCI: 00:12.3 Skipping disabled device PCI: 00:12.3 Looking at device PCI: 00:12.4 Skipping disabled device PCI: 00:12.4 Looking at device PCI: 00:13.0 Looking at vga_onboard Yes: PCI: 00:09.0 Reassigning vga to PCI: 00:09.0 Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... Root Device compute_allocate_io: base: 00001000 size: 00000080 align: 7 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:12.2 20 * [0x00001000 - 0x0000107f] io Root Device compute_allocate_io: base: 00001080 size: 00000080 align: 7 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01001000 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:09.0 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:13.0 10 * [0xfe000000 - 0xfe000fff] mem Root Device compute_allocate_mem: base: fe001000 size: 01001000 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 30 <- [0x00fffc0000 - 0x00fffcffff] romem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:13.0 10 <- [0x00fe000000 - 0x00fe000fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 143 cs5530.c: cs5530_pci_dev_enable_resources() PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 cmd <- 141 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0031 PCI ROM Image, Vendor 10ea, Device 5000, PCI ROM Image, Class Code 030000, Code Type 00 copying VGA ROM Image from fffc0000 to c0000, 8000 bytes entering emulator

ebiederman＠lnxi.com

26 Apr 26 Apr

5:58 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Christian Sühs chris@suehsi.de writes:

...

Thanks for this.

Hmm. Looking closer I do see why there is a problem.

Please disable the indicated end tag and not the one you picked. I think that will make the configuration say what you intended.

...

Eric W. Biederman schrieb:

...
To be clear I think the Config.lb should read: chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on end

^^^^

...

...
	    register "rom_address" = "0xfffc0000"
	end
I had to disable this "end tag" for a successful build.

...

# end

...

...
chip southbridge/amd/cs5530
	device pci 12.0 on
		chip superio/NSC/pc97317
			device pnp 2e.0 on # Keyboard
				 io 0x60 = 0x60
				 io 0x62 = 0x64
				irq 0x70 = 1
Have a look to the attachment, the disabled PCI 12.4 device comes no longer up :D

I think this Config.lb version is better than the old one ;)

Cool so progress is being made :)

Eric

Christian Sühs

10:52 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Eric W. Biederman schrieb:

...

Christian Sühs chris@suehsi.de writes:

...
Thanks for this.

Hmm. Looking closer I do see why there is a problem.

Please disable the indicated end tag and not the one you picked. I think that will make the configuration say what you intended.

Ok, I will try this.

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on register "rom_address" = "0xfffc0000" end end chip southbridge/amd/cs5530 . . .

...

...
Eric W. Biederman schrieb:

...
To be clear I think the Config.lb should read: chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on end
                                      ^^^^
...
...
	    register "rom_address" = "0xfffc0000"
	end

But, why there are so many Configs with the same way as above?

...

...
I had to disable this "end tag" for a successful build.

...
# end

Christian Sühs

11:34 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

Ok, I will try this.

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on register "rom_address" = "0xfffc0000" end end chip southbridge/amd/cs5530 . . .

This fails, the buildsript stops with a warning like. Only chips can have a register.

than I have tried this:

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end device pci 9.0 on chip drivers/pci/onboard register "rom_address" = "0xfffc0000" end end chip southbridge/amd/cs5530

the right device is allocated, the emulator is not entered

I also tried this:

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end device pci 9.0 on chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfffc0000" end end chip southbridge/amd/cs5530

This results in the same as before.

chris

ebiederman＠lnxi.com

11:15 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Christian Sühs chris@suehsi.de writes:

...

...
Ok, I will try this. chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on register "rom_address" = "0xfffc0000" end end chip southbridge/amd/cs5530 . . .

This fails, the buildsript stops with a warning like. Only chips can have a register.

Ok. Sorry, the I had forgotten that twist. I'm just trying to sort out the indentation so that part is readable.

So what I should have suggested was simply:

...

chip northbridge/amd/gx1 device pci_domain 0 on device pci 0.0 on end chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfffc0000" end chip southbridge/amd/cs5530 . . .

So the chip which has the name 9.0 has a register rom_address.

And with that I think I have reached my limit of usefulness.

Eric

Christian Sühs

1:17 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

So the chip which has the name 9.0 has a register rom_address.

Well, it is a onboard graphic chip "cyberpro 5000"

...

And with that I think I have reached my limit of usefulness.

Eric

Mmmh, I think LB does all in the right way.

The right device is allocated, the image is copy and the emulator is entered, now the question is. Why fails the emulator. It seems, that there happens nothing. Remember that. There is no debug output, but it should.

So, what is wrong.

Is it the 12.4, which eventually block something. Or is any other stuff not right.

I think the 12.4 is the problem, because if I try the image with testbios all seems to work fine. But I have to disable the 12.4 totally before. That means command=0 with setpci send to 12.4 After that, there is no I/O or MEM anywhere allocated.

If I do a boot know with the current config and disable the VGA stuff, all is done well, but the 12.4 device has a MEM+ shown with lspci.

So I think, that causes the problems with enabled emulator, because if I done a testbios run in that state, it fails too ;) with rare debug output (ca. 10 lines)

Question is now, in which state of LB is for 12.4 MEM allocated, while it is disabled?

i.e there are two other devices on 12.0 (12.1/12.3) and these ones are disabled, too. and this works fine.

chris

Stefan Reinauer

12:32 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060426 13:17]:

...

The right device is allocated, the image is copy and the emulator is entered, now the question is. Why fails the emulator. It seems, that there happens nothing. Remember that. There is no debug output, but it should.

LinuxBIOSv2/src/devices/emulator/x86emu/debug.h

there's:

//#define DEBUG 0 #undef DEBUG

change that to

#define DEBUG 1 and enable the ...trace_on() in biosemu.c again

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

4:12 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

LinuxBIOSv2/src/devices/emulator/x86emu/debug.h

there's:

//#define DEBUG 0 #undef DEBUG

change that to

#define DEBUG 1 and enable the ...trace_on() in biosemu.c again

S.

Ok, here is the output.

I hope you understand this. :D

chris

Finding PCI configuration type. PCI: Using configuration type 1 PCI_DOMAIN: 0000 enabled PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] enabled PCI: 00:09.0 [10ea/5000] enabled PCI: 00:12.0 [1078/0100] enabled PCI: 00:12.1 [1078/0101] disabled PCI: 00:12.2 [1078/0102] enabled PCI: 00:12.3 [1078/0103] disabled PCI: 00:12.4 [1078/0104] disabled PCI: 00:13.0 [0e11/a0f8] enabled PNP: 002e.0 enabled PNP: 002e.1 enabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.4 enabled PNP: 002e.5 enabled PNP: 002e.6 enabled PNP: 002e.7 enabled PNP: 002e.8 enabled PCI: pci_scan_bus returning with max=00 done Allocating resources... Reading resources... Done reading resources. Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 30 <- [0x00fffc0000 - 0x00fffcffff] romem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:13.0 10 <- [0x00fe000000 - 0x00fe000fff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 143 PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 cmd <- 141 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes entering emulator halt_sys: file /root/src/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 4956 halted AX=0048 BX=0000 CX=0000 DX=0080 SP=fff8 BP=0000 SI=0000 DI=0000 DS=0040 ES=0000 SS=c000 CS=c000 IP=0005 NV UP DI PL NZ NA PO NC c000:0005 ff ILLEGAL DECODING OF OPCODE FF PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:12.2 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006c4 checksum 9a6b

------------------------------------------------------------------------

00:09.0 0300: 10ea:5000 (rev 02) Subsystem: 0202:0202 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 0 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Expansion ROM at fffc0000 [disabled] [size=64K] 00: ea 10 00 50 03 00 00 02 02 00 00 03 10 40 80 00 10: 00 00 00 fd 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 02 02 02 02 30: 00 00 fc ff 00 00 00 00 00 00 00 00 00 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:12.4 0300: 1078:0104 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Region 0: Memory at 10001000 (32-bit, non-prefetchable) [disabled] [size=4K] 00: 78 10 04 01 00 00 80 02 00 00 00 03 00 00 00 00 10: 00 10 00 10 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 7b 40 ee 00 00 00 00 00 03 00 03 38 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 0c 00 00 00 fc 07 0c 12 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Christian Sühs

4:56 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes

^^^^^^ ^^^^^ ^^^^^^ remember my Image is located at first of my 256K flash part and is 32K big, are these values correct.

0xfffc0000 i don't know 0xc0000 should be correct 0x8000 yes

Mmmh, the pci_rom_run detected the right signatur on 0xfffc0000 also this should be correct to.

...

entering emulator halt_sys: file /root/src/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 4956 halted AX=0048 BX=0000 CX=0000 DX=0080 SP=fff8 BP=0000 SI=0000 DI=0000 DS=0040 ES=0000 SS=c000 CS=c000 IP=0005 NV UP DI PL NZ NA PO NC c000:0005 ff ILLEGAL DECODING OF OPCODE FF PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init

Waaah. Ok, how can I verify, that the vga.bios image is proper copied to 0xc0000. I think the emulator reads from this adress, right?

Now, where the emu is stopping with halt_sys. I'm able to read out 0xc0000 with dd and voila, there is definitivly not the vga.bios.

$ dd if=/dev/mem of=vga.bios bs=1 count=32768 skip=786432

I get garbage :D

chris

Stefan Reinauer

4:05 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060426 16:56]:

...

Waaah. Ok, how can I verify, that the vga.bios image is proper copied to 0xc0000. I think the emulator reads from this adress, right?

Now, where the emu is stopping with halt_sys. I'm able to read out 0xc0000 with dd and voila, there is definitivly not the vga.bios.

test with applied patch.

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

6:35 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

...
Now, where the emu is stopping with halt_sys. I'm able to read out 0xc0000 with dd and voila, there is definitivly not the vga.bios.

test with applied patch.

Thanks, the output is as expected. There are only FF

What about the irq_table, which is later copied. The verify fails to. For the same reason ?? CONFIG_COMPRESSED is default 1 or 0 ???

I don't have those line. Ok, I will look to the Config Options page for default, but vga.bios is merged after the compile stuff and not compressed.

Furthermore, my readonly filesystem later. That should have a reason. Is there something with the RAM.

chris

PCI: 00:09.0 cmd <- 143 PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 cmd <- 141 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes entering emulator ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff . . // only FF i thing 32K long ;) . ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff halt_sys: file /root/src/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 4956 halted AX=0048 BX=0000 CX=0000 DX=0080 SP=fff8 BP=0000 SI=0000 DI=0000 DS=0040 ES=0000 SS=c000 CS=c000 IP=0005 NV UP DI PL NZ NA PO NC c000:0005 ff ILLEGAL DECODING OF OPCODE FF PCI: 00:12.0 init PNP: 002e.0 init PNP: 002e.1 init PNP: 002e.2 init PNP: 002e.4 init PNP: 002e.5 init PNP: 002e.6 init PNP: 002e.7 init PNP: 002e.8 init PCI: 00:12.2 init PCI: 00:13.0 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006c4 checksum dda8

Stefan Reinauer

5:22 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060426 18:35]:

...

Thanks, the output is as expected. There are only FF

What about the irq_table, which is later copied. The verify fails to. For the same reason ?? CONFIG_COMPRESSED is default 1 or 0 ???

No, different reason. I guess the ram at 0xc0000 is not visible or writable. The datasheet usually knows how to make that area writable.

Stefan.

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

6:44 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

...
What about the irq_table, which is later copied. The verify fails to. For the same reason ?? CONFIG_COMPRESSED is default 1 or 0 ???

No, different reason. I guess the ram at 0xc0000 is not visible or writable. The datasheet usually knows how to make that area writable.

Datasheet of which part ?? I have them all :D

chris

...

Stefan.

Richard Smith

6:42 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

On 4/26/06, Christian Sühs chris@suehsi.de wrote:

...

...
No, different reason. I guess the ram at 0xc0000 is not visible or writable. The datasheet usually knows how to make that area writable.

Datasheet of which part ?? I have them all :D

I bet access to your video bios cache area is still write protected. Look for something in the CPU or northbridge datasheets (usually northbrdge but the Geode is a bit wierd) that talks about controlling reads and writes to this range. A lot of times its called the c000 segment.

Ah... Nevermind... I just pulled the datasheet. According to what I read I dont think you have a vbios cache. Page 94 Section 3.5.3 ROM Interface.

The CS5530A positively decodes memory addresses 000F0000h-000FFFFFh (64 KB) and FFFC0000h- FFFFFFFFh (256 KB) at reset. These memory cycles cause the CS5530A to claim the cycle, and generate an ISA bus memory cycle with KBROMCS# asserted.

I don't see anywhere that you can enable this section as read from ROM/ write to RAM like you would do for a normal vbios shadow. You can disable the area completely but not on a partial read/write basis.

If this is true then if you can't see your vbios show up at 0xfffc0000 then its not in your ROM image correctly.

This would explain why the user space emulator works but the in-tree dosent.

-- Richard A. Smith

Stefan Reinauer

6:52 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Richard Smith smithbone@gmail.com [060426 18:42]:

...

If this is true then if you can't see your vbios show up at 0xfffc0000 then its not in your ROM image correctly.

It's at 0xfffc0000, just copying it to 0xc0000 does not seem to work...

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

8:25 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Stefan Reinauer schrieb:

...

Richard Smith smithbone@gmail.com [060426 18:42]:

...
If this is true then if you can't see your vbios show up at 0xfffc0000 then its not in your ROM image correctly.

It's at 0xfffc0000, just copying it to 0xc0000 does not seem to work...

yep.

Ok,

http://www.routerboard.com/PDF/gx1.pdf

section 4.

I read, read, read

well, there is spoken about a vga emulation mode, you can enable/disable this feature. The GXM Geode has therefor 4 special instructions. I think.

See the special note on page 102.

If this feature enabled, the geode registers ranges for special use in the upper memory, where? I don't know ;)

If disabled, the complete graphic instruction stuff is disabled.

I will read more and try to understand

chris

Richard Smith

8:01 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

...
It's at 0xfffc0000, just copying it to 0xc0000 does not seem to work...

yep.

Ok,

http://www.routerboard.com/PDF/gx1.pdf

Ahh.. Thats it. So its in the gx datasheet and not the northbridge.

BC_XMAP_3 bits 31:28.

That controls the read/write access to the Fc000 to FFFFF . It defaults on reset to 0 which is read but no write. So verify that you have write enabled prior to when the emulator is called.

-- Richard A. Smith

Peter Stuge

8:28 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

On Wed, Apr 26, 2006 at 01:01:09PM -0500, Richard Smith wrote:

...

BC_XMAP_3 bits 31:28.

That controls the read/write access to the Fc000 to FFFFF . It defaults on reset to 0 which is read but no write. So verify that you have write enabled prior to when the emulator is called.

Argh, I wanted a 0 too many and got the wrong register and bits. Of course you are right.

//Peter

Christian Sühs

8:54 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Christian Sühs schrieb:

...

Stefan Reinauer schrieb:

...

Richard Smith smithbone@gmail.com [060426 18:42]:

...
If this is true then if you can't see your vbios show up at 0xfffc0000 then its not in your ROM image correctly.

It's at 0xfffc0000, just copying it to 0xc0000 does not seem to work...

Section 4.2.4 described the read/write access to regions between 640k - 1MB There is a table on page 106. I think that is what you need.

Peter Stuge

8:26 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

On Wed, Apr 26, 2006 at 08:54:27PM +0200, Christian Sühs wrote:

...

Section 4.2.4 described the read/write access to regions between 640k -> 1MB There is a table on page 106. I think that is what you need.

Yeah. Memory access is "directed to the PCI master"..

Try setting bits 5:4 and 1:0 (0x33) at GX_BASE+8008h before the BIOS is copied. Set 6:4 and 2:0 (0x77) if you want to enable caching too.

//Peter

Christian Sühs

9:14 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

Section 4.2.4 described the read/write access to regions between 640k - 1MB There is a table on page 106. I think that is what you need.

Have a look to the src/cpu/amd/model_gx1 section

I'm not sure, but I think the BC_XMAP_2 and BC_XMAP_3 are untouched. Means all is set to zero.

In that case the region c0000 - fffff is disabled.

BC_XMAP_1 has a 0x60 entry in the cpu_setup table. How can I enable the other Memory regions.

as the same way, I'm not sure what will happen ;)

chris

Richard Smith

9:35 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

On 4/26/06, Christian Sühs chris@suehsi.de wrote:

...

...
Section 4.2.4 described the read/write access to regions between 640k - 1MB There is a table on page 106. I think that is what you need.

Have a look to the src/cpu/amd/model_gx1 section

I'm not sure, but I think the BC_XMAP_2 and BC_XMAP_3 are untouched. Means all is set to zero.

Yeah. All the operations on these registers are commented out.

Heres the rub though. Although this is a CPU thing in this case. This type of setting is _mainboard_ specific. What works for you may not be good for others. So we can't just go setting this stuff in here by default. Of course there don't appeat to be too many users and VGA is a common item so perhpas its ok.

The right way do do this seems to be to add a field into the chip operations struct that allows the read/write of registers either indivdually or via a table and then the mainboard code could call that with what it wanted to do.

But that may be a lot of extra overhead I know some of the romcc setups are alreday tight on rom space.

To test you can just change line 36 in GX setup to be: .long BC_XMAP_2, 0xb0000000

Seems to me we've had this discussion before but I never remember the result. :(

-- Richard A. Smith

Christian Sühs

27 Apr 27 Apr

10:57 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

But that may be a lot of extra overhead I know some of the romcc setups are alreday tight on rom space.

To test you can just change line 36 in GX setup to be: .long BC_XMAP_2, 0xb0000000

That doesn't work, after that I changed also the line 57 in model_gx1_init.c to the same value with no success.

Than I thinked about the value.

BC_XMAP_2 = 00000000h is default.

This word described the read/write/cache/pci access for 8 adress ranges. for each range we have to set 4 bits. If I want to enable read write for all 8 ranges I should set bit 1 & 2 to high.

--> first range 0011 --> second range 0011 and so on

= 00110011001100110011001100110011

this should be 0x33333333

I have insert this to the both files and it works ;)

(but at the moment I'm not sure)

ok, what happens.

The LB debug spokes out the vga.bios on 0xc0000, now (for now I have not verified, if this is the whole vga.bios) and the emu is running much longer as before in printed debug lines. Later the emu stops with no error and the system seems to hang, but we should now on the right way.

A few questions.

0xc0000 - 0xfffff is normaly Cached? Means, should I set the cache bit?

How is the range 640k-1MB normally set in other systems.

If I right above, BC_XMAP_1 is set to 0x60 I think that is not very much for a system. think about my other problems later.

I would like to set the magic bit for vga to 00 (at the moment it is set for 4K I/O range and all vga instructions are enabled)

chris

...

Seems to me we've had this discussion before but I never remember the result. :(

-- Richard A. Smith

Stefan Reinauer

11:02 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060427 10:57]:

...

0xc0000 - 0xfffff is normaly Cached?

you can often decide about this in the bios options. which makes little sense, except you plan to rub your nose permanently on an old rom chip.

...

Means, should I set the cache bit?

You might, if you plan to put something there that should be readable later (and is read a lot of times). So if you are planning to use Linux you don't need to care.

...

How is the range 640k-1MB normally set in other systems.

0xe0000-0xfffff is always "cached" in awkward bios, as they uncompress parts of their code to those memory adresses where it stays for "bios callbacks". We don't have that, so its not an issue.

You might want to play with this again if you switch CONFIG_COMPRESS on but want the pirq table in 0xf0000-0xfffff without failing.

...

I would like to set the magic bit for vga to 00 (at the moment it is set for 4K I/O range and all vga instructions are enabled)

run lspci -xxx on LinuxBIOS and factory BIOS and start comparing the differences, or start looking in the datasheets for it..

Stefan

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

1:58 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

You might want to play with this again if you switch CONFIG_COMPRESS on but want the pirq table in 0xf0000-0xfffff without failing.

What is the default. I think CONFIG_COMPRESSED is default set to 1

BC_XMAP_3 is also disabled in the current state, there is the 0xf0000 range located and therefor not writable.

this should be the reason for failing.

chris

Christian Sühs

2:20 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

What is the default. I think CONFIG_COMPRESSED is default set to 1

BC_XMAP_3 is also disabled in the current state, there is the 0xf0000 range located and therefor not writable.

this should be the reason for failing.

Yup, I have enabled the memory and the irq_table is verified well ;)

...

chris

Christian Sühs

11:12 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Here is the output

chris

...

Allocating resources... Reading resources... Done reading resources. Allocating VGA resource PCI: 00:09.0 Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Setting resources... BC_DRAM_TOP = 0x03bfffff MC_GBASE_ADD = 0x00000078 I would set ram size to 60 Mbytes PCI: 00:09.0 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:09.0 30 <- [0x00fffc0000 - 0x00fffcffff] romem PCI: 00:12.2 20 <- [0x0000001000 - 0x000000107f] io PCI: 00:13.0 10 <- [0x00fe000000 - 0x00fe000fff] mem Done setting resources. Done allocating resources. Enabling resources... PCI: 00:00.0 cmd <- 147 PCI: 00:09.0 subsystem <- 00/00 PCI: 00:09.0 cmd <- 143 PCI: 00:12.0 cmd <- 14f PCI: 00:12.2 cmd <- 141 PCI: 00:13.0 cmd <- 142 done. Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes entering emulator 55 aa 40 eb 29 37 34 30 30 30 37 49 00 53 41 00 00 00 00 00 00 00 00 00 31 00 00 00 00 00 49 42 4d 20 43 4f 4d 50 41 54 49 42 4c 45 2e 2a eb 33 90 50 43 49 52 ea 10 00 50 00 00 18 00 01 00 00 03 40 00 00 01 00 80 00 00 56 47 41 2f 53 . . // the first and last characters compares with the original file . 8a 44 02 ee 56 83 c6 03 ba c8 03 32 c0 b9 00 03 fa ee fe c2 ac ee e2 fc fb 5e f6 c3 30 8a 44 01 b2 c8 75 04 b2 c7 fe c8 ee e8 ca c5 c6 46 02 1c 5d 58 59 5a 5e 5f 1f 07 5b cf ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 7e AX=0048 BX=0000 CX=0000 DX=0080 SP=fff8 BP=0000 SI=0000 DI=0000 DS=0040 ES=0000 SS=c000 CS=c000 IP=0005 NV UP DI PL NZ NA PO NC c000:0003 eb29 JMP 2e . . // After a long time the emu fails . c000:6bc1 26 ES: AX=2001 BX=0405 CX=0000 DX=03c4 SP=ffe8 BP=fff6 SI=0000 DI=0c97 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc4 NV UP DI PL NZ NA PO NC c000:6bc2 8a05 MOV AL,[DI] AX=2067 BX=0405 CX=0000 DX=03c4 SP=ffe8 BP=fff6 SI=0000 DI=0c97 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc5 NV UP DI PL NZ NA PO NC c000:6bc4 47 INC DI AX=2067 BX=0405 CX=0000 DX=03c4 SP=ffe8 BP=fff6 SI=0000 DI=0c98 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc7 NV UP DI PL NZ NA PO NC c000:6bc5 b2c2 MOV DL,c2 AX=2067 BX=0405 CX=0000 DX=03c2 SP=ffe8 BP=fff6 SI=0000 DI=0c98 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc8 NV UP DI PL NZ NA PO NC c000:6bc7 ee OUT DX,AL A

// no more output :(

The readed segments seems to compare with the copied vga.bios

Stefan Reinauer

11:09 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060427 11:12]:

...

Here is the output

Try disabling quite some of the debug stuff (i would start with trace_on.. This will rule out timing issues.

...

AX=2001 BX=0405 CX=0000 DX=03c4 SP=ffe8 BP=fff6 SI=0000 DI=0c97 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc4 NV UP DI PL NZ NA PO NC c000:6bc2 8a05 MOV AL,[DI] AX=2067 BX=0405 CX=0000 DX=03c4 SP=ffe8 BP=fff6 SI=0000 DI=0c97 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc5 NV UP DI PL NZ NA PO NC c000:6bc4 47 INC DI AX=2067 BX=0405 CX=0000 DX=03c4 SP=ffe8 BP=fff6 SI=0000 DI=0c98 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc7 NV UP DI PL NZ NA PO NC c000:6bc5 b2c2 MOV DL,c2 AX=2067 BX=0405 CX=0000 DX=03c2 SP=ffe8 BP=fff6 SI=0000 DI=0c98 DS=0000 ES=c000 SS=c000 CS=c000 IP=6bc8 NV UP DI PL NZ NA PO NC c000:6bc7 ee OUT DX,AL A

So 3c2 (DX) is the Misc Output Register of VGA. But it might one of the previous outbs that make it hang. Better keep that log for later debugging.

Stefan

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

1:41 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

Try disabling quite some of the debug stuff (i would start with trace_on.. This will rule out timing issues.

Well, thanks to all my heros here ;)

Step by step and now it runs.

Ok, I have disabled the additional debug lines for the image verifying and disabled the XEMU_trace_on()

After a minute (after 3 int vectors, where the screens changed its status from standby to on) the Console comes up.

Puuuuh hard work ;)

I think to disable completly the debug in the emulator will things make faster ( I hope so)

12.4 is still there, you see the 4K adress range on lspci. I'm not sure but why is this on 12.4? However, now I will try to enable the other memory and disable the internal vga stuff completly.

snipped output attached:

Initializing devices... Root Device init PCI: 00:00.0 init northbridge: northbridge_init() PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes int10 vector at c41b4 int10 vector at c41b4 int10 vector at c41b4 halt_sys: file /root/src/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 4387 halted // But it starts PCI: 00:12.0 init PNP: 002e.0 init

Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed // CONFIG_COMPRESSED ???? Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006c4 checksum b8a1

Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3

--------------------------------------------------------------------

IP Protocols: ICMP, UDP, TCP, IGMP IP: routing cache hash table of 512 buckets, 4Kbytes TCP: Hash tables configured (established 4096 bind 8192) RAMDISK: Compressed image found at block 0 Freeing initrd memory: 3791k freed VFS: Mounted root (ext2 filesystem) readonly. // Why does this happen ??? Mounted devfs on /dev Freeing unused kernel memory: 248k freed

-------------------------------------------------------------------------------

# lspci -vvv 00:00.0 0600: 1078:0001 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- Status: Cap- 66MHz- UDF- FastB2B+ ParErr+ DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR+ Latency: 0

00:09.0 0300: 10ea:5000 (rev 02) Subsystem: 0280:7000 // Right subsystem ID :D Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 0 Region 0: Memory at fd000000 (32-bit, non-prefetchable) [size=16M] Expansion ROM at fffc0000 [disabled] [size=64K]

Christian Sühs

2:22 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

Puuuuh hard work ;)

I think to disable completly the debug in the emulator will things make faster ( I hope so)

It seems not :(

To initialize the vga is done in 90!!! seconds :(

I'm frustrated ;)

chris

Ronald G Minnich

3:27 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Christian Sühs wrote:

...

...
Puuuuh hard work ;)

I think to disable completly the debug in the emulator will things make faster ( I hope so)

It seems not :(

To initialize the vga is done in 90!!! seconds :(

WOW. WHAT is going on ? Normal vga is enabled in a second or two at worst in most cases.

ron

Richard Smith

5:07 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

...
It seems not :(

To initialize the vga is done in 90!!! seconds :(

WOW. WHAT is going on ? Normal vga is enabled in a second or two at worst in most cases.

Its interesting that Nick Barker reported a long delay when trying to run the via video bios on and epia under the emulator. Only his bios never worked. Chris is using a gx1 and sees a long delay as well but his actually works.

In both cases its a somewhat off-color x86. I wonder if the emulator is making some assumption that isn't valid on these platforms.

Chris: I don't remember you reporting that the usermode emulator took that long. Will you please enable all the same debugging options and compare the run times.

Another thing to consider is that the in-tree emulator may be running in a non-optimal enviroment where the user-mode emulator has had Linux booted to fix up the chipset.

What does the emulator do with access to the timer? I know I had a problem a long time ago under the user mode emulator with a vbios that didn't like the extra delays associated with being under the emulator. It caused the bios's delay function to hang out for _much_ longer than requested.

-- Richard A. Smith

Ronald G Minnich

5:18 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Richard Smith wrote:

...

In both cases its a somewhat off-color x86. I wonder if the emulator is making some assumption that isn't valid on these platforms.

I'm sorta convinced that it is becuase C0000 is not cached. Here is a simple test:

In this file: src/devices/pci_rom.c

see this code: if (PCI_CLASS_DISPLAY_VGA == rom_data->class_hi) { #if CONFIG_CONSOLE_VGA == 1 #if CONFIG_CONSOLE_VGA_MULTI == 0 if (dev != vga_pri) return NULL; // only one VGA supported #endif printk_debug("copying VGA ROM Image from 0x%x to 0x%x, 0x%x bytes\n", rom_header, PCI_VGA_RAM_IMAGE_START, rom_size); memcpy(PCI_VGA_RAM_IMAGE_START, rom_header, rom_size); vga_inited = 1; return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START); #endif } else {

OK, let's fake it out. This is gross, but This IS A Test: add just 3 lines after the 'if':

if (PCI_CLASS_DISPLAY_VGA == rom_data->class_hi) { /* THIS IS A TEST */ static char image[64*1024]; #undef PCI_VGA_RAM_IMAGE_START #define PCI_VGA_RAM_IMAGE_START image /* THIS IS THE END OF THE CHANGES */ #if CONFIG_CONSOLE_VGA == 1 #if CONFIG_CONSOLE_VGA_MULTI == 0 if (dev != vga_pri) return NULL; // only one VGA supported #endif printk_debug("copying VGA ROM Image from 0x%x to 0x%x, 0x%x bytes\n", rom_header, PCI_VGA_RAM_IMAGE_START, rom_size); memcpy(PCI_VGA_RAM_IMAGE_START, rom_header, rom_size); vga_inited = 1; return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START); #endif } else {

This is going to relocate the vga image to cached memory. This is OK! The emulator can use anything as memory -- it's an emulator.

I think this is ought to work. It's worth a try ...

...

Chris: I don't remember you reporting that the usermode emulator took that long. Will you please enable all the same debugging options and compare the run times.

yes, and the big difference: user-mode emulator just uses ram for the C segment ...

...

Another thing to consider is that the in-tree emulator may be running in a non-optimal enviroment where the user-mode emulator has had Linux booted to fix up the chipset.

I think it's caching. optimization should not be a 100x slowdown, in this case.

Let's try this if that's ok.

ron

Richard Smith

5:34 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

I think it's caching. optimization should not be a 100x slowdown, in this case.

Let's try this if that's ok.

Thats what I meant by non-optimal. *grin*

-- Richard A. Smith

Christian Sühs

7:41 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

I think it's caching. optimization should not be a 100x slowdown, in this case.

Let's try this if that's ok.

ron

Sorry, but that doesn't work :(

her is the output.

chris

initcopying VGA ROM Image from 0xfffc0000 to 0x1b7e0, 0x8000 bytes entering emulator x86emu_intr_raise, rasing execption 0 AX=cf0d BX=ffff CX=0010 DX=cdb1 SP=fffd BP=00ff SI=0000 DI=fc00 DS=0000 ES=0000 SS=1000 CS=1000 IP=f495 NV UP DI NG NZ AC PO NC int0 vector at 5fda0 int0 vector at 5fda0 int0 vector at 5fda0 int0 vector at 5fda0 . . .

Ronald G Minnich

6:45 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Christian Sühs wrote:

...

...
I think it's caching. optimization should not be a 100x slowdown, in this case.

Let's try this if that's ok.

ron

Sorry, but that doesn't work :(

I'll dig a little deeper. Best guess is the emulator is still using physical c0000.

Sorry, will have to check it out tonight.

There goes my movie :-)

ron

Peter Stuge

7:48 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

On Thu, Apr 27, 2006 at 10:45:52AM -0600, Ronald G Minnich wrote:

...

I'll dig a little deeper. Best guess is the emulator is still using physical c0000.

You could try enabling caching in the Geode control register.

Instead of 0x33333333 try 0x77777777 for BC_XMAP_2.

The right solution is clearly to make x86emu use other RAM though.

//Peter

Christian Sühs

9:11 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

You could try enabling caching in the Geode control register.

Instead of 0x33333333 try 0x77777777 for BC_XMAP_2.

I have set it to 0xFFFFFFFF

but I can give it a chance :D

...

The right solution is clearly to make x86emu use other RAM though.

//Peter

Christian Sühs

7:50 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

	/* THIS IS A TEST */
static char image[64*1024];

should I use 32*1024 instead

...

#undef PCI_VGA_RAM_IMAGE_START #define PCI_VGA_RAM_IMAGE_START image /* THIS IS THE END OF THE CHANGES */

Ronald G Minnich

6:46 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Christian Sühs wrote:

...

        /* THIS IS A TEST */
    static char image[64*1024];

should I use 32*1024 instead

no, that should make no difference.

Thanks, again, for all your efforts on this.

I'll keep looking too.

I will be digging into this code soon for OLPC.

ron

Christian Sühs

8:03 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Christian Sühs schrieb:

...

...
	/* THIS IS A TEST */
static char image[64*1024];
should I use 32*1024 instead

The result is the same :D

...

...
#undef PCI_VGA_RAM_IMAGE_START #define PCI_VGA_RAM_IMAGE_START image /* THIS IS THE END OF THE CHANGES */

Christian Sühs

6:35 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

Chris: I don't remember you reporting that the usermode emulator took that long. Will you please enable all the same debugging options and compare the run times.

Ok, I will have a second try with enabled debug XEMU_trace_on()

As I say, I'm not sure if I wait long enough :D

Unfortunatly, I can't find the debug stuff for "testbios" Is there any or is it done via parameter like --debug

chris

Christian Sühs

7:47 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

Chris: I don't remember you reporting that the usermode emulator took that long. Will you please enable all the same debugging options and compare the run times.

I have enabled all debug lines in biosemu.c XEMU_trace_on() is disabled, because I remember that the machine stops or hangs.

In this case LB stops too after a few lines.

chris

rom address for PCI: 00:09.0 = fffc0000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0031 PCI ROM Image, Vendor 10ea, Device 5000, PCI ROM Image, Class Code 030000, Code Type 00 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes entering emulator outb(0x18, 0x46e8) outb(0x01, 0x0102) outb(0x08, 0x46e8) outw(0x04f8, 0x03ce) outw(0x00fb, 0x03ce) outw(0x80bb, 0x03ce) outw(0x80ba, 0x03ce) outw(0x52b2, 0x03ce) outw(0x50b3, 0x03ce) outb(0xb9, 0x03ce) inb(0x03cf) = 0x00 outw(0x80b9, 0x03ce) outw(0x00b9, 0x03ce) outb(0x70, 0x03ce) inb(0x03cf) = 0x00 outw(0x0370, 0x03ce) outw(0xa871, 0x03ce) outw(0x80b5, 0x03ce) outb(0xbe, 0x03ce) inb(0x03cf) = 0x88 outw(0x0abe, 0x03ce) outw(0x8097, 0x03ce) outw(0x031f, 0x03d4) outw(0x0157, 0x03ce) inw(0x03ce) = 0x0157 outw(0x0057, 0x03ce) outw(0x0100, 0x03c4) outw(0x0001, 0x03c4) outw(0x0302, 0x03c4) outw(0x0003, 0x03c4) outw(0x0204, 0x03c4) outb(0x01, 0x03c4) inw(0x03c4) = 0x0001 outw(0x2001, 0x03c4) outb(0x67, 0x03c2) o

Richard Smith

6:34 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

On 4/27/06, Christian Sühs chris@suehsi.de wrote:

...

I have enabled all debug lines in biosemu.c XEMU_trace_on() is disabled, because I remember that the machine stops or hangs.

Ok.. I don't know about the rest of you but I'm awash in all the different permutatios. I don't know what worked and what didn't.

Can yo post up a summary of what things work and what things don't. Both usemode and in-tree.

-- Richard A. Smith

Christian Sühs

8:53 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

Can yo post up a summary of what things work and what things don't. Both usemode and in-tree.

I can try that.

testbios: VGA comes up after 6 seconds. minimal Debug says, that there are 3

run_bios_int calls

after the first call screen goes from standby to on after the second call flickering after the third of them VGA is initialized.

LB: nearly the same, but it tooks ca. 80-90 seconds to initialize the vga in this time there are also 3 int calls with the same results as above after the third of them VGA is initialized

------------------------------------------

debugging.

LB: first way enable DEBUG in debug.h enable XEMU_trace_on() in biosemu.c

after a while the system seems to hang. There is no more debug output. The screen don't change their state from standby to on. Could be before the first call is done.

second way enables all debug lines in biosemu.c the same as before. it seems after the same time the system hangs.

the timing is relative. means, the real emulatur debug output does write more lines for the same debug output as the printk debugs from biosemu.c so it tooks more time

it seems, that the system stops at the same place, but I'm not sure.

If you wish I can post the necessary cap files again.

chris

...

-- Richard A. Smith

Christian Sühs

5:57 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

...
To initialize the vga is done in 90!!! seconds :(

WOW. WHAT is going on ? Normal vga is enabled in a second or two at worst in most cases.

Good question, I don't know. I hope you has some answers :D

chris

...

ron

Ronald G Minnich

5:09 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Christian Sühs wrote:

...

...
...
To initialize the vga is done in 90!!! seconds :(

WOW. WHAT is going on ? Normal vga is enabled in a second or two at worst in most cases.

Good question, I don't know. I hope you has some answers :D

First, obvious possible issue is that C segment is not cached.

But I want to KILL that use of C segment. I'm going to ask Ollie about this today.

ron

Christian Sühs

7:43 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

...
Good question, I don't know. I hope you has some answers :D

First, obvious possible issue is that C segment is not cached.

Well, at the moment c0000 - cffff are not cached, they are only r/w and pci accessable

...

But I want to KILL that use of C segment. I'm going to ask Ollie about this today.

ron

Ronald G Minnich

6:48 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Christian Sühs wrote:

...

...
...
Good question, I don't know. I hope you has some answers :D

First, obvious possible issue is that C segment is not cached.

Well, at the moment c0000 - cffff are not cached, they are only r/w and pci accessable

Please make them cached.

thanks

ron

Christian Sühs

8:28 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

...
Well, at the moment c0000 - cffff are not cached, they are only r/w and pci accessable

I have tried that, without success :(

...

Please make them cached.

thanks

ron

Ronald G Minnich

7:30 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

well, this chipset is doing something very weird.

I will try to push on the 'don't use physical c0000 in the emulator' side of this.

ron

Christian Sühs

9:35 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Ronald G Minnich schrieb:

...

well, this chipset is doing something very weird.

I will try to push on the 'don't use physical c0000 in the emulator' side of this.

ron

OK, and than it runs, but we do know nothing about the reasons :D

Well, remember. There are two other problems for me, which I could not explain.

It seems there is a bottleneck and I think the reason therefor are not proper settings for the CPU.

BC_XMAP_1 is set to 0x60

a look to the datasheets says that therefore are not much things enabled. I guess there is a whole piece of memory not writeable, more not useable.

ok first.

after filo has load the kernel and the initrd, there is a jump and the kernel is uncompressing. I'm not sure, but one of them needs more time as it should, also I think this is done somewhere in the memory.

second my system boots readonly, but I don't know why means VFS: booting bla,bla readonly

For me the whole stuff is running out of the ram It could be that unuseable memory segments are needed for that.

chris

Richard Smith

8:25 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

For me the whole stuff is running out of the ram It could be that unuseable memory segments are needed for that.

Run memtest as a payload and see where it errors.

Also you need to rip the BC_XMAP_* settings while booted under the factory bios.

-- Richard A. Smith

Christian Sühs

11:44 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

...

Run memtest as a payload and see where it errors.

Also you need to rip the BC_XMAP_* settings while booted under the factory bios.

Fine ;) How can I get them.

...

-- Richard A. Smith

Richard Smith

11 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

On 4/27/06, Christian Sühs chris@suehsi.de wrote:

...

...
Run memtest as a payload and see where it errors.

Also you need to rip the BC_XMAP_* settings while booted under the factory bios.

Fine ;) How can I get them.

Do you have an account here?

http://wwwd.amd.com/AMD/developer.nsf/

There are tools there for DOS and linux that can read various things. Its not obvious to me if the XMAP registers are in the list of thingsn they can read.

If not then you will have to study the LinuxBIOS source and the gx1 datasheet to figure out how to write a small program that can read them.

-- Richard A. Smith

Stefan Reinauer

11:48 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

* Christian Sühs chris@suehsi.de [060427 20:28]:

...

...
...
Well, at the moment c0000 - cffff are not cached, they are only r/w and pci accessable

I have tried that, without success :(

What does "without success" mean? It wasn't cached? Or it wasnt writable? Or something else went wrong? Or the behavior was the same as before?

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

28 Apr 28 Apr

11:27 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Stefan Reinauer schrieb:

...

Christian Sühs chris@suehsi.de [060427 20:28]:

...
...
...
Well, at the moment c0000 - cffff are not cached, they are only r/w and pci accessable

I have tried that, without success :(

What does "without success" mean? It wasn't cached? Or it wasnt writable? Or something else went wrong? Or the behavior was the same as before?

Behaviour was the same as before.

chris

...

S.

Stefan Reinauer

27 Apr 27 Apr

11:46 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

* Ronald G Minnich rminnich@lanl.gov [060427 17:09]:

...

First, obvious possible issue is that C segment is not cached.

But I want to KILL that use of C segment. I'm going to ask Ollie about this today.

I would imagine this is due to the way the x86 emulator works. It expects a memory region from 0x00000 to 0xfffff. In this region the graphics rom has to sit at 0xc0000 for compatibility issues. graphics roms are "allowed" to assume they live at 0xc0000.

So we should not change this but instead get caching and c,d,e-seg writing work correctly and maybe in a standard way/at a standard position in LinuxBIOS.

This would also allow us to incorporate ADLO or other stuff that allows booting more OSes.

Stefan

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Ronald G Minnich

28 Apr 28 Apr

12:11 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Stefan Reinauer wrote:

...

Ronald G Minnich rminnich@lanl.gov [060427 17:09]:

...
First, obvious possible issue is that C segment is not cached.

But I want to KILL that use of C segment. I'm going to ask Ollie about this today.

I would imagine this is due to the way the x86 emulator works. It expects a memory region from 0x00000 to 0xfffff. In this region the graphics rom has to sit at 0xc0000 for compatibility issues. graphics roms are "allowed" to assume they live at 0xc0000.

stefan, it's emulated memory at 0xf0000. We can just as easily emulate the memory at c0000. It's an emulator, we can do anything we want.

Then we don't have to fight this caching nonsense on every new machine.

ron

Christian Sühs

27 Apr 27 Apr

6:03 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Ok,

...

rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes int10 vector at c41b4

Screen comes up from standby with no output

...

int10 vector at c41b4

Sreen flickers two times in about 30 sec

...

int10 vector at c41b4

It seems after that, the console is switched on quick,

...

halt_sys: file /root/src/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 4387 halted // But it starts

I think, i should enable again the debug, because in the first try, as I say system hangs, I havn't wait long enough ;)

chris

Ronald G Minnich

5:10 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 VGA comes up :D

Christian Sühs wrote:

...

Ok,

...
rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes int10 vector at c41b4

Screen comes up from standby with no output

...
int10 vector at c41b4

Sreen flickers two times in about 30 sec

...
int10 vector at c41b4

It seems after that, the console is switched on quick,

...
halt_sys: file /root/src/LinuxBIOSv2/src/devices/emulator/x86emu/ops.c, line 4387 halted // But it starts

That's just how we force the emulator to quit. This is a "GOOD" message :-0)

ron

Christian Sühs

3:25 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

To test you can just change line 36 in GX setup to be: .long BC_XMAP_2, 0xb0000000

Well, I see. You want to enable the PCI accessable, too.

Should be 1011 = b

but what about the other ranges.

How should I read the word.

00 00 00 00 ^^ ^^ ^^ ^^ 01 23 45 67

76 54 32 10

where are the first 4 bits located? Right or Left?

It seems you like the first read

but in that case only the first 16K are enabled for 0xb0000000

= c0000 - c3fff

I'm not sure, but the debug output is not much fast. If I remember right for this test I haven't seen other characters as FF

and so the other read is right

chris

Richard Smith

5:18 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

On 4/27/06, Christian Sühs chris@suehsi.de wrote:

...

...
To test you can just change line 36 in GX setup to be: .long BC_XMAP_2, 0xb0000000

Well, I see. You want to enable the PCI accessable, too.

Should be 1011 = b

Right. I wasn't sure if it needed that but it sounds reasonable. The cache bit may also by some thing to play with. Actually what you need to do is boot with factory BIOS and read back the settings to see what they have.

...

but what about the other ranges.

There shouldn't be much of a problem with setting them all. I was just picking a starting point.

It would be be a good idea if you just enabled them one-by-one so that we know what ranges it _really_ needs. Perhpas we can make them on by default.

...

76 54 32 10 where are the first 4 bits located? Right or Left?

Bit 31 is the left most bit and Bit 0 is the right most.

0x76543210 would be:

0111 0110 0101 0100 0011 0010 0001 0000

-- Richard A. Smith

Christian Sühs

26 Apr 26 Apr

7:47 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Stefan Reinauer schrieb:

...

Christian Sühs chris@suehsi.de [060426 18:35]:

...
Thanks, the output is as expected. There are only FF

What about the irq_table, which is later copied. The verify fails to. For the same reason ?? CONFIG_COMPRESSED is default 1 or 0 ???

No, different reason. I guess the ram at 0xc0000 is not visible or writable. The datasheet usually knows how to make that area writable.

Stefan.

Ok, what is this?

In src/northbridge/amd/gx1/northbridge.c

There is a part, where a Framebuffer Size is compute. This Framebuffer is only used, if the internal virtual graphic accelaration is needed. Means, if the graphic work is done by the GXM Geode and the cs5530 southbridge. In that case the RAM holds also the graphic memory and is used.

I hope I explain that right ;)

However, in my case it is set to 60MB ?!?! (see older attached *.cap files)

The RAM Modul, which I use is a 64MB SDRAM.

64MB - 60MB = 4 MB :D

I think that is not enough ;)

However, could that be a reason for my problem.

chris

Richard Smith

6:51 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

I think that is not enough ;)

However, could that be a reason for my problem.

You aren't ever getting that far. Verify that your vbios is located correctly.

-- Richard A. Smith

Ronald G Minnich

27 Apr 27 Apr

5:03 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Stefan Reinauer wrote:

...

Christian Sühs chris@suehsi.de [060426 18:35]:

...
Thanks, the output is as expected. There are only FF

What about the irq_table, which is later copied. The verify fails to. For the same reason ?? CONFIG_COMPRESSED is default 1 or 0 ???

No, different reason. I guess the ram at 0xc0000 is not visible or writable. The datasheet usually knows how to make that area writable.

Stefan.

That c0000 memory, in the emulator in linuxbios, is most likely emulated. I would have to look.

Just remember, this is an emulator. There's no need to copy it to physical c0000, and we most likely don't. Again, this is memory, I can't look right now.

ron

Stefan Reinauer

11:11 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Ronald G Minnich rminnich@lanl.gov [060427 05:03]:

...

That c0000 memory, in the emulator in linuxbios, is most likely emulated.

The emulator is setup to use the real memory in the 0x000000-0xfffff area.

...

Just remember, this is an emulator. There's no need to copy it to physical c0000, and we most likely don't.

It sounds funny, but we do.

Stefan

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Richard Smith

26 Apr 26 Apr

6:44 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

On 4/26/06, Christian Sühs chris@suehsi.de wrote:

...

rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes entering emulator ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff .

Does the emulator not check for a valid ROM signature after it completes the copy? That needs to be fixed.

-- Richard A. Smith

Ronald G Minnich

27 Apr 27 Apr

5:13 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Richard Smith wrote:

...

On 4/26/06, Christian Sühs chris@suehsi.de wrote:

...
rom address for PCI: 00:09.0 = fffc0000 copying VGA ROM Image from 0xfffc0000 to 0xc0000, 0x8000 bytes entering emulator ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff .

Does the emulator not check for a valid ROM signature after it completes the copy? That needs to be fixed.

OH NO.

I just walked this code and did not realize we are wasting time copying the code to physical 0xc0000.

I don't see any reason to do this. I will talk to Ollie about it.

ron

Richard Smith

26 Apr 26 Apr

6:46 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

So the chip which has the name 9.0 has a register rom_address.

And with that I think I have reached my limit of usefulness.

Eric, thank you for your help. I was overlooking that the Config.lb may not have been correct.

-- Richard A. Smith

Christian Sühs

24 Apr 24 Apr

11:07 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Richard Smith schrieb:

...

...
PCI: 00:09.0 init rom address for PCI: 00:09.0 = fffc0000 PCI Expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0031 PCI ROM Image, Vendor 10ea, Device 5000, PCI ROM Image, Class Code 030000, Code Type 00 copying VGA ROM Image from fffc0000 to c0000, 8000 bytes entering emulator

Other question: All seems to look fine!?

What could be the reason for fail.

The call comes very first at initializing ( I think before the northbridge is init)

I have tried to init it later but thats results in a not proper posted vga device.

chris

Stefan Reinauer

10:10 p.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060424 23:07]:

...

Other question: All seems to look fine!?

What could be the reason for fail.

check LinuxBIOSv2/src/devices/emulator/biosemu.c:

Enable this line (116) by removing the // // printk_debug("int%x vector at %x\n", num, getIntVect(num));

Stefan

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

25 Apr 25 Apr

12:17 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

v2/src/devices/emulator/biosemu.c:

...

Enable this line (116) by removing the // // printk_debug("int%x vector at %x\n", num, getIntVect(num));

Mmmmmmh,

sorry, there is absolute nothing, no output. Now I will enable other lines.

chris

...

Stefan

Christian Sühs

12:37 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

...

Mmmmmmh,

sorry, there is absolute nothing, no output. Now I will enable other lines.

nothing :(

Christian Sühs

12:49 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Christian Sühs schrieb:

...

...
Mmmmmmh,

sorry, there is absolute nothing, no output. Now I will enable other lines.

nothing :(

Ok, now I have enabled all debug lines, but there is no output.

chris

Stefan Reinauer

12:07 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

* Christian Sühs chris@suehsi.de [060425 00:49]:

...

Ok, now I have enabled all debug lines, but there is no output.

including X86EMU_trace_on()?

-- coresystems GmbH · Brahmsstr. 16 · D-79104 Freiburg i. Br. Tel.: +49 761 7668825 · Fax: +49 761 7664613 Email: info@coresystems.de · http://www.coresystems.de/

Christian Sühs

10:43 a.m.

New subject: [LinuxBIOS] MB1030 / 3036 I like 13 :D

Stefan Reinauer schrieb:

...

Christian Sühs chris@suehsi.de [060425 00:49]:

...
Ok, now I have enabled all debug lines, but there is no output.

including X86EMU_trace_on()?

I wondered about that and no, I have not enabled this line. Unfortanetly I can't test this now. Sometimes I have to work :D

Is this line needed for the output ?!