I am running into a build problem with a ROM that contains normal,
fallback, and failover images. I get the following error.
/usr/bin/ld: section .data [00000000fffbfff0 -> 00000000fffc07ff]
overlaps section .reset [00000000fffbfff0 -> 00000000fffbffff]
/usr/bin/ld: linuxbios: section .data lma 0xfffbfff0 overlaps previous
sections
Which means that the ldscript calculations is wrong (see attached
ldscript.ld). What is the difference between reset16 and reset32? Why
does reset32.lds do a calculation? Reset always needs to be at 0xFFFFFFF0.
Thanks,
Marc
--
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones@amd.com
http://www.amd.com/embeddedprocessors
/*ldoptions*/
HAVE_MOVNTI = 1;
CONFIG_USE_INIT = 0;
HAVE_FALLBACK_BOOT = 1;
HAVE_FAILOVER_BOOT = 1;
ROM_IMAGE_SIZE = 0x20000;
PAYLOAD_SIZE = 0xa0000;
_ROMBASE = 0xfffa0000;
_RESET = 0xfffa0000;
_EXCEPTION_VECTORS = 0xfffa0100;
STACK_SIZE = 0x2000;
HEAP_SIZE = 0xc0000;
_RAMBASE = 0x200000;
USE_DCACHE_RAM = 1;
CAR_GH = 1;
DCACHE_RAM_BASE = 0xc4000;
DCACHE_RAM_SIZE = 0xc000;
DCACHE_RAM_GLOBAL_VAR_SIZE = 0x4000;
CONFIG_AP_CODE_IN_CAR = 0;
MEM_TRAIN_SEQ = 2;
WAIT_BEFORE_CPUS_INIT = 0;
CONFIG_COMPRESS = 1;
CONFIG_UNCOMPRESSED = 0;
CONFIG_LB_MEM_TOPK = 16384;
HAVE_OPTION_TABLE = 1;
USE_OPTION_TABLE = 1;
LB_CKS_RANGE_START = 49;
LB_CKS_RANGE_END = 122;
LB_CKS_LOC = 123;
DEBUG = 1;
CONFIG_CONSOLE_VGA = 1;
CONFIG_CONSOLE_VGA_MULTI = 0;
CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST = 0;
CONFIG_CONSOLE_BTEXT = 0;
CONFIG_CONSOLE_LOGBUF = 0;
CONFIG_CONSOLE_SROM = 0;
CONFIG_CONSOLE_SERIAL8250 = 1;
CONFIG_USBDEBUG_DIRECT = 0;
DEFAULT_CONSOLE_LOGLEVEL = 8;
MAXIMUM_CONSOLE_LOGLEVEL = 8;
CONFIG_SERIAL_POST = 0;
TTYS0_BASE = 0x3f8;
TTYS0_BAUD = 115200;
TTYS0_LCS = 0x3;
CONFIG_USE_PRINTK_IN_CAR = 1;
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 4130;
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x2b80;
CONFIG_SMP = 1;
CONFIG_MAX_CPUS = 8;
CONFIG_MAX_PHYSICAL_CPUS = 8;
CONFIG_LOGICAL_CPUS = 0;
SERIAL_CPU_INIT = 1;
APIC_ID_OFFSET = 0;
ENABLE_APIC_EXT_ID = 1;
LIFT_BSP_APIC_ID = 1;
CONFIG_IDE_STREAM = 0;
CONFIG_ROM_STREAM = 1;
CONFIG_ROM_STREAM_START = 0xfff00000;
CONFIG_COMPRESSED_ROM_STREAM = 0;
CONFIG_COMPRESSED_ROM_STREAM_NRV2B = 0;
CONFIG_COMPRESSED_ROM_STREAM_LZMA = 0;
CONFIG_PRECOMPRESSED_ROM_STREAM = 0;
CONFIG_FS_STREAM = 0;
CONFIG_FS_EXT2 = 0;
CONFIG_FS_ISO9660 = 0;
CONFIG_FS_FAT = 0;
AUTOBOOT_DELAY = 2;
USE_WATCHDOG_ON_BOOT = 0;
CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 1;
CONFIG_AGP_PLUGIN_SUPPORT = 1;
CONFIG_CARDBUS_PLUGIN_SUPPORT = 1;
CONFIG_PCIX_PLUGIN_SUPPORT = 1;
CONFIG_PCIEXP_PLUGIN_SUPPORT = 1;
CONFIG_IDE = 0;
IDE_BOOT_DRIVE = 0;
IDE_OFFSET = 0;
PCI_IO_CFG_EXT = 1;
CONFIG_CHIP_NAME = 1;
HAVE_INIT_TIMER = 1;
MAX_REBOOT_CNT = 3;
FAKE_SPDROM = 0;
HAVE_ACPI_TABLES = 1;
ACPI_SSDTX_NUM = 31;
HT_CHAIN_UNITID_BASE = 10;
HT_CHAIN_END_UNITID_BASE = 6;
SB_HT_CHAIN_UNITID_OFFSET_ONLY = 1;
SB_HT_CHAIN_ON_BUS0 = 2;
PCI_BUS_SEGN_BITS = 0;
MMCONF_SUPPORT = 0;
MMCONF_SUPPORT_DEFAULT = 0;
HW_MEM_HOLE_SIZEK = 1048576;
HW_MEM_HOLE_SIZE_AUTO_INC = 0;
CONFIG_VAR_MTRR_HOLE = 1;
K8_HT_FREQ_1G_SUPPORT = 0;
K8_REV_F_SUPPORT = 0;
CBB = 0;
CDB = 24;
HT3_SUPPORT = 1;
EXT_RT_TBL_SUPPORT = 0;
EXT_CONF_SUPPORT = 0;
DIMM_SUPPORT = 0x104;
CPU_SOCKET_TYPE = 16;
CPU_ADDR_BITS = 48;
CONFIG_PCI_ROM_RUN = 1;
CONFIG_PCI_64BIT_PREF_MEM = 0;
CONFIG_AGESA = 1;
HAVE_MP_TABLE = 1;
HAVE_PIRQ_TABLE = 1;
USE_FALLBACK_IMAGE = 0;
USE_FAILOVER_IMAGE = 0;
HAVE_HARD_RESET = 1;
IRQ_SLOT_COUNT = 11;
CONFIG_IOAPIC = 1;
FALLBACK_SIZE = 0x3f000;
FAILOVER_SIZE = 0x1000;
ROM_SIZE = 0x100000;
ROM_SECTION_SIZE = 0xc0000;
ROM_SECTION_OFFSET = 0x0;
XIP_ROM_SIZE = 0x40000;
XIP_ROM_BASE = 0xfff80000;
CONFIG_GDB_STUB = 0;
CONFIG_UDELAY_IO = 0;
CONFIG_UDELAY_TSC = 0;
CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0;
AGP_APERTURE_SIZE = 0x4000000;
/* /home/marcj/lb2/src/arch/i386/init/ldscript.lb */
/*
* Memory map:
*
* _RAMBASE
* : data segment
* : bss segment
* : heap
* : stack
* _ROMBASE
* : linuxbios text
* : readonly text
*/
/*
* Bootstrap code for the STPC Consumer
* Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
*
*/
/*
* Written by Johan Rydberg, based on work by Daniel Kahlin.
* Rewritten by Eric Biederman
*/
/*
* We use ELF as output format. So that we can
* debug the code in some form.
*/
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
/*
ENTRY(_start)
*/
TARGET(binary)
INPUT(linuxbios_ram.rom)
SECTIONS
{
. = _ROMBASE;
.ram . : {
_ram = . ;
linuxbios_ram.rom(*)
_eram = . ;
}
/* This section might be better named .setup */
.rom . : {
_rom = .;
*(.rom.text);
*(.rom.data);
*(.rom.data.*);
. = ALIGN(16);
_erom = .;
}
_lrom = LOADADDR(.rom);
_elrom = LOADADDR(.rom) + SIZEOF(.rom);
_iseg = _RAMBASE;
_eiseg = _iseg + SIZEOF(.ram);
_liseg = _ram;
_eliseg = _eram;
/DISCARD/ : {
*(.comment)
*(.note)
}
}
/* /home/marcj/lb2/src//cpu/x86/32bit/reset32.lds */
/*
* _ROMTOP : The top of the rom used where we
* need to put the reset vector.
*/
SECTIONS {
_ROMTOP = _ROMBASE + ROM_IMAGE_SIZE - 0x10;
. = _ROMTOP;
.reset (.): {
*(.reset)
. = 15 ;
BYTE(0x00);
}
}
/* /home/marcj/lb2/src//arch/i386/lib/id.lds */
SECTIONS {
. = (_ROMBASE + ROM_IMAGE_SIZE - 0x10) - (__id_end - __id_start);
.id (.): {
*(.id)
}
}
Marc Jones
Stefan Reinauer