Hi! Mansoor, It works after adding your patch. Now coreboot can go on to load the payload (and die XD) and this is just a second time trial build. Seems like I have more work to do now.
Thank you to everyone.
Scott Hsiao
-----Original Message----- From: Mansoor [mailto:mansoor@iwavesystems.com] Sent: Tuesday, December 01, 2009 1:37 PM To: 'Myles Watson'; 'Scott.Hsiao'; 'coreboot' Subject: RE: [coreboot] Atom platform porting problem.
Hi Scott,
I am also working on Intel atom based platform. I got the same problem Please try to change the following line /* Setup MTRRs */ x86_setup_mtrrs(36);
to
/* Setup MTRRs */ x86_setup_mtrrs(32);
Atom support only 32 bit address lines
-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Myles Watson Sent: Tuesday, December 01, 2009 9:04 AM To: 'Scott.Hsiao'; 'coreboot' Subject: Re: [coreboot] Atom platform porting problem.
DONE fixed MTRRs call enable_fixed_mtrr() Setting variable MTRR 0, base: 0MB, range: 512MB, type WB ADDRESS_MASK_HIGH=0xf Unexpected Exception: 13 @ 10:001025e9 -
Halting
Code: 0 eflags: 00010002 eax: e0000800 ebx: 0000000f ecx: 00000201 edx: 0000000f edi: e0000000 esi: 00000000 ebp: 0000000f esp: 00139df4
The register contents look like they are from setting the MTRR, so I'd think the problem was there.
It seems like some processors don't like having too many bits of the MTRRs set. I would suggest hacking it so that it doesn't set the upper bits to see if that makes a difference.
Thanks, Myles
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