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On 11/30/2016 10:58 PM, Damien Zammit wrote:
Hi all,
I am planning to do a cleanup of AMD Fam10-15 codebase, (i.e., not AGESA). I have currently completed a first attempt at removing most of the ".c" includes in romstage.
It currently builds on one board only, KFSN4-DRE, and only works on DDR2, (DDR3 is WIP).
I would really appreciate someone to take a look at the headers and comment so I can get a picture of how strict coreboot would like to be in terms of the header layout. As in, I don't want to touch 24 boards until I have an idea of how it should be laid out.
First, thank you very much for tackling this cleanup project! I'd be happy to assist where possible.
Have you uploaded your current patchset to Gerrit? That would probably be the easiest way for us to comment on your changes.
Thanks!
- -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) https://www.raptorengineering.com