Re: [coreboot] #150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock

[coreboot]

#150: AMD DB800 dev board PLL strapping leaves CPU and GLIU in non-optimal clock
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   Reporter:  edwin_beasant@…              |          Owner:  somebody
       Type:  enhancement                  |         Status:  new     
   Priority:  minor                        |      Milestone:          
  Component:  coreboot                     |        Version:  v2      
   Keywords:                               |   Dependencies:          
Patchstatus:  patch needs review           |  
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Comment(by progNeope):

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