Had a few hours this evening, and .. it's done.
I've had to re-arrange some labels and 1 part to make sure the silk-screen would not interferer with the solderpads. Not sure how I could have missed that, it was really really small bit that was overlapping though.
Somehow I managed to mirror one of my labels on a component. So the part was on the top side, while the label looked like it was on the bottom side. Long story short, i just deleted the part, and copied it from the neighboring part. Due to all the renaming though, I get all strange connects when using the automated rats nest, but I guess that's the price to pay.
So the big question is; shall I send this to seeed for fabrication or does it need some big change?
In any case, thanks so far for all your time and help ;)
Oliver
On 04/26/12 18:56, Oliver Schinagl wrote:
Hey all,
Well here it is, the last version which was even harder then the 3rd one. or so it seemed anyhow.
I will work on copying these four to the bottom and renaming the labels before sending them off. I'll post the final pcb on this list again,but routing wise, Nothing will change, unless of course someone found a grand mistake.
So really, all input is greatly appreciated :D would be shameful to send this off to get printed, just to find bugs and have another batch made.
Oliver
On 23-04-12 20:23, Oliver Schinagl wrote:
Hi!
I've worked on a rotated version and planning to do two other orientations as well, so early feedback is good, so I don't have to redo them again :)
Silk screening isn't 100% right, since I still need to rename them eventually somehow (edit .pcb file directly is probably the easiest way?)
On 04/20/12 14:50, Oliver Schinagl wrote:
Hi list(s),
Here's my second attempt at routing the previously mailed png of my schema.
It was a lot trickier to route then my previous version, but I think it worked out!
As mentioned, S1 and S2 need to be shorted if U3 is to be omitted. RN1 should be 10k or ideally 100k, as Peter mentioned earlier.
Hopefully there's no obvious mistakes and can start working on alternative layouts (so it is insert-able in different angles).
DRC Check fails on S1, S2 and U3. It thinks the distance is to shallow. That said, DRC check passes when I set the copper width/distance to 7mil's instead of the current 8 mils.
I'm planning on having these PCB's manufactured by Seeed studio and their minimal width is much smaller.
Minimum trace width: 6mil Minimum trace/vias/pads space : 6mil Minimum silkscreen width : 4mil Minimum silkscreen text size : 32mil
I've used a grid size of 10mil and distances of 8 mils, as I didn't want to rely on the minimum of seed. The silkscreen I positioned using a grid size of 5 mil's however. Not sure what they mean with a 'minimum silkscreen text size' however.
Anyhow, feedback greatly appreciated, so I can start working on alternative layouts :)