So after a weekend and some playing with gEDA and pcb (learning curve that was) I drew up a schema [1] from what we talked about earlier.
After spending some hours routing I decided to make a second version (there is plenty of room on a 5x5 pcb) with the header in the middle, instead of the edge and thus a 2 design PCB was born [2]. Before I send this off to the PCB fab and have some boards made, I was hoping what you guys thought and whether it is sound. I've attached a more or less 'complete' render [3] and one without the silkscreen [4] (probably most usefull).
(M)any pointers appreciated, this being my first board ever designed :)
[1] dspif_sch.png [2] dspif_photo.png [3] dspif.png [4] dspif_nosilk.png
On 03/07/12 16:28, Oliver Schinagl wrote:
On 06-03-12 19:33, Peter Stuge wrote:
Oliver Schinagl wrote:
Pin 1, 'chip select enable' is an inverted? pin. enables and disables device operation. When chip select is high, the device is de-selected and the serial data pins are at 'high impedance'.
Correct.
So if I understand all this correctly, the chip can be connected in parallel with the exception of the Chip Select Enable. A simple switch to either connect it directly to the board/socket/other end and toggle it to connect to ground (via 'some' resistor').
Right. This is what you can see demonstrated in the photos linked to at the bottom of http://stuge.se/m57sli/ i.e.:
http://stuge.se/m57sli/overview.jpg http://stuge.se/m57sli/U5.jpg http://stuge.se/m57sli/U9.jpg
These photos are not from a PC mainboard but the principle hopefully shows. The connection you describe is indeed how GIGABYTE boards implement Dual BIOS. What is not shown in my photos are the resistors, which are mounted onto the GIGABYTE board on pads for that very purpose.
After this mail-conversation, those images make perfect sense!
I tried to make a simple schematic in ascii, but failed horribly so i've attached it to this message as monochrome BMP (only format that I could quickly think of to be smallest in size).
Hint: png
I thought I tried and came out to 54kb, I redid them in this new version and it is only 998 bytes! Nice!
I don't know what value those resistors need to be (and if the schematic can be even more simplified, with a single resistor), but I belive this is the schematic used for the dual-SPI flash 'module'
Not quite, the resistors need to be pull-up and not pull-down. See e.g. http://stuge.se/flash_switch.png which shows the principle with resistors, but connects the switch common to GND, instead of to the mainboard as must be done.
Hmm, I made a new 'design' and I put the common of the switch to the GND, but you say it should connect to the motherboard? Why is this?
This seems sensible to me, but my knowledge in this field is very limited.
You're already learning more. Your schematic is correct, but resistors need to pull up to 3.3V and not down to GND. The values are, as I wrote earlier, not really critical, just don't go too much under 1k or you will potentially waste some current.
Also make sure that your switch is the break-before-make type.
Learn I did, I'll now try to learn some gEDA and design a basic PCB for this purpose!
//Peter
