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Re:Re:Re: rtl8139 NIC IRQ is 0 on m758lmr+ mainboard
by riskin＠263.net 11 Feb '03

11 Feb '03

Hi,ron The IRQ of sis900 NIC embedded in the mainboad isn't zero,and it can work normally.But the IRQ of rtl8139 NIC in pci sockets (including socket #1, socket #2,socket #3 ) is zero.It seems that these devices are not configed by the kernel,either I set "direct" or "any" mode to probe pci devices. lspci: 00:00.0 Class 0600: 1039:0630 (rev 30) 00:00.1 Class 0101: 1039:5513 (rev d0) 00:01.0 Class 0601: 1039:0008 00:01.1 Class 0200: 1039:0900 (rev 84) 00:01.2 Class 0c03: 1039:7001 (rev 07) 00:01.3 Class 0c03: 1039:7001 (rev 07) 00:01.4 Class 0401: 1039:7018 (rev 02) 00:01.6 Class 0703: 1039:7013 (rev a0) 00:02.0 Class 0604: 1039:0001 00:0b.0 Class 0200: 10ec:8139 (rev 10) 00:0f.0 Class 0401: 13f6:0111 (rev 10) 00:0f.1 Class 0780: 13f6:0211 (rev 20) 01:00.0 Class 0300: 1039:6300 (rev 21) I am confused by it.

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DoC Error
by Paulo Richards 10 Feb '03

10 Feb '03

ioctl(MEMGETINFO): Inappropriate ioctl for device What does this means?, The DoC was working ok, (i used to be able to erase, format, burn, etc), but after i change the kernel (for the Cwlinux developer one), it's stop working, i can't erase (seems ok, but don't erase), format (give me the mentioned error), and not burn. I change back the kernel to my old one, and the same error happens. So, what happend? I'm forgetting somethig (i don't think so, i'm doing the same than before), or the DoC blows up? Thanx Paulo Richards

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Re:Re: rtl8139 NIC IRQ is 0 on m758lmr+ mainboard
by riskin＠263.net 10 Feb '03

10 Feb '03

Hi,ron Which version is stable and latest ? Thanks. riskin

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Re:Re: rtl8139 NIC IRQ is 0 on m758lmr+ mainboard
by riskin＠263.net 10 Feb '03

10 Feb '03

Hi,ron This is my config file. Thanks. riskin # Sample config file for PCCHIPS m758lmr+ with DoC Millennium (as root) # This will make a target directory of m758lmr+ target /opt/cwlinux/buildrom/m758lmr+ # PCCHIPS m758lmr+ mainboard pcchips/m758lmr+ # Enable Serial Console for debugging option SERIAL_CONSOLE=1 # enable debugging support option DEBUG=1 # enable serial post for debugging option SERIAL_POST=1 # set default consol loglevel option DEFAULT_CONSOLE_LOGLEVEL=9 # enable floppy support # option MUST_ENABLE_FLOPPY # enable keyboard support # option NO_KEYBOARD # use ELF boot # option USE_ELF_BOOT=1 # enable RAM test # option RAMTEST # PIRQ tables option HAVE_PIRQ_TABLE=1 # I8259 INITITIAL option I8259=1 # don't use old kernel hack option OLD_KERNEL_HACK=1 # Enable MicroCode update and L2 Cache init for PII and PIII option UPDATE_MICROCODE=1 option CONFIGURE_L2_CACHE=1 option ENABLE_FIXED_AND_VARIABLE_MTRRS=1 # Use the internal VGA frame buffer device #option HAVE_FRAMEBUFFER=1 # Path to your kernel (vmlinux) linux /opt/cwlinux/linux option DISABLE_INTERNAL_DEVICES=0 option CONFIG_COMPRESS=0 #support loading initrd option LOAD_INITRD_FROM_MIL=1 # Kernel command line parameters # enable serial console commandline auto BOOT_IMAGE=Image root=100 ramdisk=26000 console=ttyS0,115200 console=tty0 BOOTSTEP=0 BOOTDEVICE=fla1 #commandline root=/dev/ram0 ramdisk=14000 init=/linuxrc console=ttyS0,115200 console=tty0 #commandline root=/dev/nftla1 console=ttyS0,115200 console=tty0 video=sisfb:640x480-8@60,font:VGA8x16 # disable serial console #commandline root=/dev/nftla1 console=/dev/tty5 CONSOLE=/dev/tty5 video=sisfb:640x480-8@60,font:VGA8x16 docipl northsouthbridge/sis/630/ipl.S #option USE_DOC_2000_TSOP=1 option USE_DOC_MIL=1

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Re:Re:Re: rtl8139 NIC IRQ is 0 on m758lmr+ mainboard
by riskin＠263.net 09 Feb '03

09 Feb '03

Ok,I will try it by setting "direct" mode. My linuxbios version don't support CONFIG_COMPRESS option. I have get it from the cwlinux packages. So,I have checked out the latest cvs version,but I failed to compile it successfully. The file "Liuxbios_c.o" failed to resolve symbol "console_tx_al" and "console_tx_hex8" in the "_start" function when my linker linked these files.Maybe somewhere goes wrong.

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Booting VxWorks from LinuxBios
by Felix Radensky 09 Feb '03

09 Feb '03

Hi, folks I'm trying to boot our VxWorks based application from using LinuxBios. On our board we have 512K Flash and 16M CF. VxWorks image is several megs in size, so I put it on CF. I use linuxbios and VxWorks boot loader, which is essentially a stripped down VxWorks kernel with 32-byte a.out header removed, to create a flash romimage. The idea is to let linuxbios load VxWorks boot loader into memory and let it load VxWorks from CF. Essentially, I've simply mimicked the romimage creation steps, just instead of linux kernel I use VxWorks bootloader. I can see that bootloader is successfully uncompressed into RAM, but nothing happens after I jump to it's code. According to VxWorks docs, bootloader should be copied to address 0x8000. I've tried to modify do_inflate.c and linuxbiosmain.c to load and jump to this address, but gunzip returned error. Now the question. Do you think this approach can work, or I am I doing something entirely wrong ? Should I convert a.out image of VxWorks bootloader into binary image. Can I modify linuxbios code to allow VxWorks boot loader to be loaded at 0x8000 ? Any other ideas will be much appreciated. TIA. Felix.

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[ANNOUNCE] mkelfImage-2.3
by ebiederman＠lnxi.com 09 Feb '03

09 Feb '03

mkelfImage 2.3 is a bug fix release, available at: ftp://ftp.lnxi.com/pub/src/mkelfImage/mkelfImage-2.3.tar.gz rpm -bb mkelfImage-2.3.tar.gz builds a binary rpm. This release disables debugging code that can crash some itaniums. Eric

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rtl8139 NIC IRQ is 0 on m758lmr+ mainboard
by riskin＠263.net 09 Feb '03

09 Feb '03

Hi!All, My rtl8139 NIC IRQ is 0 on m758lmr+ mainboard. I used getpir to get new irq_table.c,but the IRQ still is 0. Who can tell me what should I do? Thanks. LinuxBIOS-1.0.0 Sat Feb 8 23:31:46 HKT 2003 starting... Copying LinuxBIOS to ram. POST: 0x39, TSC Lo: 3, Hi: 3 LinuxBIOS-1.0.0 Sat Feb 8 23:31:46 HKT 2003 booting... POST: 0x40, TSC Lo: 55, Hi: 55 Finding PCI configuration type. PCI: Using configuration type 1 POST: 0x5f, TSC Lo: 44912, Hi: 44912 handle_superio start, s 0000d240 nsuperio 1 s->super 0000e578 handle_superio Pass 0, check #0, s 0000d240 s->super 0000e578 handle_superio: Pass 0, Superio SiS 950 handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 POST: 0x24, TSC Lo: 0, Hi: 0 PCI: 00:00.0 [1039/0630] PCI: 00:00.1 [1039/5513] PCI: 00:01.0 [1039/0008] PCI: 00:01.1 [1039/0900] PCI: 00:01.2 [1039/7001] PCI: 00:01.3 [1039/7001] PCI: 00:01.4 [1039/7018] PCI: 00:01.6 [1039/7013] PCI: 00:02.0 [1039/0001] PCI: 00:0d.0 [10ec/8139] PCI: 00:0f.0 [13f6/0111] PCI: 00:0f.1 [13f6/0211] POST: 0x25, TSC Lo: -1, Hi: -1 PCI: pci_scan_bus for bus 1 POST: 0x24, TSC Lo: 0, Hi: 0 PCI: 01:00.0 [1039/6300] POST: 0x25, TSC Lo: -1, Hi: -1 PCI: pci_scan_bus returning with max=01 POST: 0x55, TSC Lo: 40, Hi: 40 PCI: pci_scan_bus returning with max=01 POST: 0x55, TSC Lo: 40, Hi: 40 done POST: 0x66, TSC Lo: 5, Hi: 5 POST: 0x70, TSC Lo: 60036, Hi: 60036 totalram: 126M Initializing CPU #0 Updating microcode microcode_info: sig = 0x00000686 pf=0x00000010 rev = 0x00000000 POST: 0x60, TSC Lo: 64, Hi: 64 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB Setting variable MTRR 1, base: 64MB, range: 32MB, type WB Setting variable MTRR 2, base: 96MB, range: 16MB, type WB Setting variable MTRR 3, base: 112MB, range: 8MB, type WB Setting variable MTRR 4, base: 120MB, range: 4MB, type WB Setting variable MTRR 5, base: 124MB, range: 2MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs POST: 0x6a, TSC Lo: 18, Hi: 18 done. Max cpuid index : 2 Vendor ID : GenuineIntel Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x08 Processor Mask : 0x00 Processor Stepping : 0x06 Feature flags : 0x0383fbff Cache/TLB descriptor values: 1 reads required Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x41 : L2 Unified cache: 128K bytes, 4-way set assoc, 32 byte line size Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size POST: 0x92, TSC Lo: 1, Hi: 1 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled POST: 0x93, TSC Lo: 1, Hi: 1 Configuring L2 cache...CPU signature of 680 so no L2 cache configuration Enable Cache done. Disabling local apic...done. POST: 0x9b, TSC Lo: 6, Hi: 6 CPU #0 Initialized POST: 0x75, TSC Lo: 0, Hi: 0 POST: 0x77, TSC Lo: 117, Hi: 117 Allocating PCI resources... PCI: 00:0f.0 register 10(0000ff01), read-only ignoring it PCI: 00:0f.1 register 10(0000ffc1), read-only ignoring it PCI: 00:0f.0 register 10(0000ff01), read-only ignoring it PCI: 00:0f.1 register 10(0000ffc1), read-only ignoring it PCI: 00:0f.0 register 10(0000ff01), read-only ignoring it PCI: 00:0f.1 register 10(0000ffc1), read-only ignoring it PCI: 00:0f.0 register 10(0000ff01), read-only ignoring it PCI: 00:0f.1 register 10(0000ffc1), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:00.0 10 <- [0xf8000000 - 0xfbffffff] mem PCI: 00:00.1 10 <- [0x00003090 - 0x00003097] io PCI: 00:00.1 14 <- [0x000030b0 - 0x000030b3] io PCI: 00:00.1 18 <- [0x000030a0 - 0x000030a7] io PCI: 00:00.1 1c <- [0x000030c0 - 0x000030c3] io PCI: 00:00.1 20 <- [0x00003080 - 0x0000308f] io PCI: 00:01.1 10 <- [0x00002000 - 0x000020ff] io PCI: 00:01.1 14 <- [0xfc100000 - 0xfc100fff] mem PCI: 00:01.2 10 <- [0xfc101000 - 0xfc101fff] mem PCI: 00:01.3 10 <- [0xfc102000 - 0xfc102fff] mem PCI: 00:01.4 10 <- [0x00002400 - 0x000024ff] io PCI: 00:01.4 14 <- [0xfc103000 - 0xfc103fff] mem PCI: 00:01.6 10 <- [0x00002800 - 0x000028ff] io PCI: 00:01.6 14 <- [0x00003000 - 0x0000307f] io PCI: 00:02.0 1c <- [0x00001000 - 0x00001fff] bus 1 io PCI: 00:02.0 24 <- [0xf0000000 - 0xf7ffffff] bus 1 prefmem PCI: 00:02.0 20 <- [0xfc000000 - 0xfc0fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:00.0 10 <- [0xf0000000 - 0xf7ffffff] prefmem PCI: 01:00.0 14 <- [0xfc000000 - 0xfc01ffff] mem PCI: 01:00.0 18 <- [0x00001000 - 0x0000107f] io PCI: 00:0d.0 10 <- [0x00002c00 - 0x00002cff] io PCI: 00:0d.0 14 <- [0xfc104000 - 0xfc1040ff] mem Allocating VGA resource done. POST: 0x88, TSC Lo: 6, Hi: 6 Enabling PCI resourcess...PCI: 00:00.0 cmd <- 07 PCI: 00:00.1 cmd <- 01 PCI: 00:01.0 cmd <- 0c PCI: 00:01.1 cmd <- 03 PCI: 00:01.2 cmd <- 02 PCI: 00:01.3 cmd <- 02 PCI: 00:01.4 cmd <- 03 PCI: 00:01.6 cmd <- 01 PCI: 00:02.0 cmd <- 07 PCI: 00:0d.0 cmd <- 03 PCI: 00:0f.0 cmd <- 80 PCI: 00:0f.1 cmd <- 00 PCI: 01:00.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized POST: 0x89, TSC Lo: 24, Hi: 24 POST: 0x91, TSC Lo: 137, Hi: 137 POST: 0x92, TSC Lo: 251, Hi: 251 Enabled in SIS 503 regs 0x40 and 0x45 Now try to turn off shadow device for SiS 630 is 0x12b6c Shadow memory disabled in SiS 630 POST: 0x00, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 POST: 0x04, TSC Lo: 2, Hi: 2 handle_superio start, s 0000d240 nsuperio 1 s->super 0000e578 handle_superio Pass 1, check #0, s 0000d240 s->super 0000e578 handle_superio: Pass 1, Superio SiS 950 handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e handle_superio Pass 1, done #0 handle_superio done PCCHIPS m758lmr+ (and similar)...Remapping IRQ on southbridge for OLD_KERNEL_HACK Entering the initregs process Southbridge fixup done for SIS 503 POST: 0xec, TSC Lo: 35, Hi: 35 handle_superio start, s 0000d240 nsuperio 1 s->super 0000e578 handle_superio Pass 2, check #0, s 0000d240 s->super 0000e578 handle_superio: Pass 2, Superio SiS 950 handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Call finishup handle_superio Pass 2, done #0 handle_superio done POST: 0x9a, TSC Lo: 20, Hi: 20 Checking IRQ routing tables.../opt/cwlinux/freebios/src/arch/i386/lib/pirq_routing.c: 23:check_pirq_routing_table() - irq_routing_table located at: 0x0000ac80 done. Copying IRQ routing tables to 0xf0000...done. POST: 0x96, TSC Lo: 983168, Hi: 983168 Wrote linuxbios table at: 00000500 - 00000690 checksum 4dfd Jumping to linuxbiosmain()... POST: 0xed, TSC Lo: 30, Hi: 30 Welcome to start32, the open sourced starter. This space will eventually hold more diagnostic information. January 2000, James Hendricks, Dale Webster, and Ron Minnich. Version 0.1 ......... ........ Jumping to boot code POST: 0xfe, TSC Lo: 21, Hi: 21 Linux version 2.2.14-5.0 (root@Grow) (gcc version egcs-2.91.66 19990314/Linux (egcs-1.1.2 release)) #42 Tue Jan 14 11:59:11 CST 2003 Ignoring bogus EBDA pointer 3FFF000 Detected 634784426 Hz processor. Console: colour EGA 80x25 Calibrating delay loop... 634.06 BogoMIPS Memory: 99624k/128000k available (1308k kernel code, 416k reserved, 1588k data, 64k init, 0k bigmem) Dentry hash table entries: 262144 (order 9, 2048k) Buffer cache hash table entries: 131072 (order 7, 512k) Page cache hash table entries: 32768 (order 5, 128k) VFS: Diskquotas version dquot_6.4.0 initialized CPU: Intel Pentium III (Coppermine) stepping 06 Checking 386/387 coupling... OK, FPU using exception 16 error reporting. Checking 'hlt' instruction... OK. Checking for popad bug... OK. POSIX conformance testing by UNIFIX mtrr: v1.35a (19990819) Richard Gooch (rgooch(a)atnf.csiro.au) PCI: Using configuration type 1 PCI: Probing PCI hardware PCI: Enabling I/O for device 00:78 PCI: Enabling I/O for device 00:79 Linux NET4.0 for Linux 2.2 Based upon Swansea University Computer Society NET3.039 NET4: Unix domain sockets 1.0 for Linux NET4.0. NET4: Linux TCP/IP 1.0 for NET4.0 IP Protocols: ICMP, UDP, TCP, IGMP TCP: Hash tables configured (ehash 131072 bhash 65536) Linux IP multicast router 0.06 plus PIM-SM Initializing RT netlink socket Starting kswapd v 1.5 Detected PS/2 Mouse Port. Serial driver version 4.27 with MANY_PORTS<4>keyboard: Too many NACKs -- noisy kbd cable? keyboard: Too many NACKs -- noisy kbd cable? MULTIPORT SHARE_IRQ enabled ttyS00 at 0x03f8 (irq = 4) is a 16550A pty: 256 Unix98 ptys configured apm: BIOS not found. Real Time Clock Driver v1.09 RAM disk driver initialized: 16 RAM disks of 26000K size SIS5513: IDE controller on PCI bus 00 dev 01 SIS5513: not 100% native mode: will probe irqs later ide0: BM-DMA at 0x3080-0x3087, BIOS settings: hda:pio, hdb:pio ide1: BM-DMA at 0x3088-0x308f, BIOS settings: hdc:pio, hdd:pio hd0: C/H/S=0/0/0 from BIOS ignored hd0: C/H/S=0/0/0 from BIOS ignored hd0: C/H/S=0/0/0 from BIOS ignored Floppy drive(s): fd0 is 1.44M FDC 0 is a post-1991 82077 md driver 0.90.0 MAX_MD_DEVS=256, MAX_REAL=12 raid5: measuring checksumming speed raid5: MMX detected, trying high-speed MMX checksum routines pII_mmx : 1474.470 MB/sec p5_mmx : 1565.148 MB/sec 8regs : 1090.422 MB/sec 32regs : 619.887 MB/sec using fastest function: p5_mmx (1565.148 MB/sec) scsi : 0 hosts. scsi : detected total. md.c: sizeof(mdp_super_t) = 4096 Partition check: RAMDISK: ext2 filesystem found at block 0 RAMDISK: Loading 25000 blocks [1 disk] into ram disk... done. autodetecting RAID arrays autorun ... ... autorun DONE. VFS: Mounted root (ext2 filesystem). Freeing unused kernel memory: 64k freed fl: Flash disk driver for DiskOnChip fl: DOC device(s) found: 1 fla: fla1 fl: partition: 0: start_sect: 0, nr_sects: 6d90 Fl_blk_size[]: 36c8kb fl: partition: 1: start_sect: 2, nr_sects: 6d7a Fl_blk_size[]: 36bdkb fl: partition: 2: start_sect: 0, nr_sects: 0 Fl_blk_size[]: 0kb fl: partition: 3: start_sect: 0, nr_sects: 0 Fl_blk_size[]: 0kb fla: fla1 sis900.c: v1.06.11 4/30/2002 eth0: SiS 900 PCI Fast Ethernet at 0xb000, IRQ 11, 00:e0:06:09:ff:ff. eth0: SiS 900 Internal MII PHY transceiver found at address 1. eth0: Using transceiver found at address 1 as default The PCI BIOS has not enabled the device at 0/88! Updating PCI command 0003->0007. rtl8139.c:v1.07 5/6/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/rtl8139.html eth1: RealTek RTL8139 Fast Ethernet at 0x2c00, IRQ 0, 00:e0:4c:43:42:c5. .......

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Re: Via EPIA
by russell＠abc9986.demon.co.uk 08 Feb '03

08 Feb '03

I'm having some trouble getting SDRAM to work on this mother board. I have a 256mb DIMM From the data sheet its 32M x 8bit ( 8M x 8-bit X 4 Bank) CL3 PC133 I just can't get it to boot it crashed at the following Initializing PCI devices... PCI devices initialized sizeram: returning 0x3fc00 KB totalram: 64M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC I have the vt8601 Datasheet from VIA's website and i've changed what i think needed changing. Does any one have the BIOS porting guide for this chipset? Is it possible to redo the ram setup code using SPD data? any help or code examples would be most welcome. Cheers Russell

5 4

ms7308e pirq issues
by Jake Page 08 Feb '03

08 Feb '03

Hi, For some reason with the latest LinuxBIOS CVS sources Linux is having trouble with PCI IRQs. I'm using the same old Matsonic MS7308E that has worked in the past. Same thing happens with the irq_tables.c in CVS and one that I generate with getpir. I pasted relevent messages from LB, etherboot, and Linux below. The 'verifying pirq routing table failed' line seems suspicious to me... but I haven't looked at it much yet - I know a lot of people use this or similar board, anyone seen something like this before? Thanks, Jake >From LinuxBIOS messages: ... Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 0000063c checksum f4eb ... >From Etherboot: ... Probing...[SIS900]Found SIS 900 ROM address 0x0000 The PCI BIOS has not enabled this device! Updating PCI command 0003->0007. pci_bus 00 pci_device_fn 09 ... Linux startup messages: ... sis900.c: v1.08.04 4/25/2002 PCI: No IRQ known for interrupt pin C of device 00:01.1. Please try using pci=b. eth0: SiS 900 Internal MII PHY transceiver found at address 1. eth0: Using transceiver found at address 1 as default eth0: SiS 900 PCI Fast Ethernet at 0x2000, IRQ 0, 00:d0:09:a2:0b:f0. ...

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