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Re: [epia] Unknown bootloader class
by Jarmo Tulonen 31 Mar '03

31 Mar '03

Hello If this problem is not solved yet, I would suggest trying a newer mkelfImage. I have been using version 2.2 from ftp://ftp.lnxi.com/pub/src/mkelfImage/ and that one works fine (I'm also using an Epia card.) I tried with the version in the freebios tree and got a similar "Unknown bootloader class" error. With regards Jarmo

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Information about BIOS and the boot process
by Ivan Gustavo 31 Mar '03

31 Mar '03

I am writing some code to fixup the video chipset trident cyberblade and V1621 RGB->CS encoder , and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so I am looking for information about the real bios process, and about the layout of the common bios files, and of course, any information about bios as possible. My main problem is to find good documentation about the post, the boot process. I read on some places which the CS is set F000 and EIP FFF0, so in other websites I had seen CS is FFF0, in other 000F , causing some confusion with me. I need some documentation about 20bits addressing lines, and the GATE A20 function also. Tanks in advance.

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Fabiatech FB2510 Geode GX1 motherboard.
by Joey Nelson 30 Mar '03

30 Mar '03

Hello, I'm hoping to get Linuxbios running on a Fabiatech FB2510 PC/104 cpu board. It's quite similar too the existing advantech/pcm-5823 motherboard. It has a GX1 Northbridge/CPU, CS5530 Southbridge, SMC FDC37B787 SuperIO, and RTL8139C 10/100 Ethernet. It has a 2-MBit SST39SF020A flash in a PLC-32 package, so DOC is not an option. But it appears there are included utilities for writing this flash in the Linuxbios cvs tree. Alternately I have a Universal programmer. I'm figuring I can base my work off the pcm-5823 and other GX1/CS5530 based motherboard configurations. What are the areas I may have to customize for FB2510? I'm willing and able to dig into the source code if necessary. Just point me to where it is necessary. Is there any information I'm going to have to ask Fabiatech for? My goal is to boot with Linuxbios along with the ide_disk driver from Etherboot. The Linux kernel and initrd/rootfs will be on an IDE flash drive. I'm currently using a FAT16 formatted IDE Flash with the very simple syslinux bootloader, which loads a bzImage and gzipped initrd/rootfs. How do I get Linux onto an IDE device so Etherboot's ide_disk driver will load the kernel and my initrd? Thanks, Joey Nelson

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RE: Information about BIOS and the boot process
by dkotian3＠vsnl.net 30 Mar '03

30 Mar '03

Thanks Greg, I think, that is very good overview about the flow. It may be good idea to continue this flow on this thread or somewhere else. I think,One cannot expect Greg to do all the documentation as Peter said 8-10 hours is a lot of time. May be out of the many implementors in this forum, if one contributes by giving more details about any one of these files in detail of one's own choice ,basically significance,flow about it and Do's and Dont's,etc and any experiences. Probably a structure needs to be proposed as well and rest should fall in place for documentation at least. If not 8 hours by one person, atleast an hour can be contributed may not be an issue. As Greg has listed the files flow in the order of execution. cpu/i386/entry16.inc cpu/i386/entry32.inc superio/sis/950/setup_serial.inc pc80/serial.inc arch/i386/lib/console.inc cpu/k7/earlymtrr.inc northsouthbridge/sis/735/raminit.inc arch/i386/config/crt0.base May in the top of the mail, one can take list his favourite file and contribute his knowledge on it. So that in future, if one reads this thread or one integrates these inputs into a formal document, it would be easy for him or her. This again a suggestion to further get more documentation on this. Thanks and Regards Deepak -----Original Message----- From: linuxbios-admin(a)clustermatic.org [mailto:linuxbios-admin@clustermatic.org]On Behalf Of Greg Watson Sent: Friday, March 28, 2003 10:20 PM To: linuxbios(a)clustermatic.org Subject: Re: Information about BIOS and the boot process Other people probably know much more about this than me, but here's my experience. There seem to be two main parts to linuxbios. The first is arch/{arch}/config/ctr0.base which does the very low level initialization, like turning on memory, etc. The second is arch/{arch}/lib/c_start.S which does whatever else is necessary to call the C function hardwaremain(). hardwaremain() then does whatever else is necessary to load linux. c_start.S is linked with linuxbios.a, a library containing generic support routines (those found in the lib directory) and anything specified using the 'object' directive in a Config file (and other stuff). The resultant 'executable' is called linuxbios_c. The loader script used to link linuxbios_c is config/linuxbios_c.ld, and is configured to be loaded relative to _RAMBASE. crt0.base is not linked against anything. Any additional assembly routines you need must be specified using the 'mainboardinit' directive in a Config file. This causes the specified assembly file to be added to "crt0_includes.h" which is in turn included at the start of crt0.base (or at the end in the case of the ppc version). The loader script used to link crt0.base is in arch/{arch}/config/ldscript.base. The resultant 'executable' is called linuxbios and will be loaded at _ROMBASE. The tricky thing is that this loader script will also load the linuxbios_c 'executable' at a location called _payload in this file. The main task of crt0.base is then to initialize enough hardware so that this payload can be copied from rom into ram (which may also involve uncompressing code). Then control is transferred to _start, which is the first location in linuxbios_c. To get an idea of how crt0.base works, look at the following files. This is the order of execution specified by the configuration file for sis735. cpu/i386/entry16.inc cpu/i386/entry32.inc superio/sis/950/setup_serial.inc pc80/serial.inc arch/i386/lib/console.inc cpu/k7/earlymtrr.inc northsouthbridge/sis/735/raminit.inc arch/i386/config/crt0.base Next look at c_start.S which will show you what happens once control is transferred to _start. Finally, look at arch/{arch}/lib/hardwaremain.c to see what other stuff is done to get linux loaded. Most other files are specific to particular hardware, so it can be pretty confusing to just browse the tree. Hope this helps, Greg At 7:00 PM +0500 3/28/03, dkotian3(a)vsnl.net wrote: >Agreed, I am also looking for a good documention. >Atleast the flow in terms of implemented functions >or assembly code and some kind of Do's and Dont's >if any. >One good advantage would be more and more people >would be easily aware about the code architecture and >would get invovled in LinuxBIOS if one is interested. > > > >ivan(a)munix.com.br wrote > I am writing some code to fixup the video chipset trident >cyberblade and V1621 RGB->CS encoder , >and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so >I am looking for information >about the real bios process, and about the layout of the common bios >files, and of course, any information >about bios as possible. > >My main problem is to find good documentation about the post, the boot >process. > > I read on some places which the CS is set F000 and EIP FFF0, so >in other websites I had seen CS is FFF0, > in other 000F , causing some confusion with me. > >I need some documentation about 20bits addressing lines, and the GATE >A20 function also. > >Tanks in advance. > > >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios > >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org

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Re: Information about BIOS and the boot process
by dkotian3＠vsnl.net 28 Mar '03

28 Mar '03

Agreed, I am also looking for a good documention. Atleast the flow in terms of implemented functions or assembly code and some kind of Do's and Dont's if any. One good advantage would be more and more people would be easily aware about the code architecture and would get invovled in LinuxBIOS if one is interested. ivan(a)munix.com.br wrote I am writing some code to fixup the video chipset trident cyberblade and V1621 RGB->CS encoder , and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so I am looking for information about the real bios process, and about the layout of the common bios files, and of course, any information about bios as possible. My main problem is to find good documentation about the post, the boot process. I read on some places which the CS is set F000 and EIP FFF0, so in other websites I had seen CS is FFF0, in other 000F , causing some confusion with me. I need some documentation about 20bits addressing lines, and the GATE A20 function also. Tanks in advance. _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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Re: Information about BIOS and the boot process
by Deepak Kotian 28 Mar '03

28 Mar '03

Thanks Ron. The documentation would do a lot of good to many in the forum for the new comers (including me) Lot of queries should get resolved automatically. The cvs seems to have support of lot of motherboards now, but I guess, the knowledge/experience seems to be with the one who have supported those boards only. If the implementator of LinuxBIOS for the respective motherboard spends even 8/10 hours to produce a document of his flow or Design, it would benefit a lot. To start with, If not very formal,atleast informal documentations can be shared in the cvs from everyone or somewhere else on the site. Based on the various documentation , may be a good document could be produced and shared easily. These are just suggestions, there may be better way or means to do it though. Regards Deepak ----- Original Message ----- From: "ron minnich" <rminnich(a)lanl.gov> To: <dkotian3(a)vsnl.net> Cc: <linuxbios(a)clustermatic.org>; <ivan(a)munix.com.br> Sent: Friday, March 28, 2003 7:55 PM Subject: Re: Information about BIOS and the boot process > On Fri, 28 Mar 2003 dkotian3(a)vsnl.net wrote: > > > Agreed, I am also looking for a good documention. > > Atleast the flow in terms of implemented functions > > or assembly code and some kind of Do's and Dont's > > if any. > > Until the architecture of the system started to stabilize this was hard. > It is still hard due to some changes coming up. I'll try to write > something in the next while .... > > oh if only Frame would run under Crossover Office this would be so much > easier ... > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios >

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Why cann't I read SPD for SiS 745 chipset?
by Charlie Song 28 Mar '03

28 Mar '03

Hello, I'm trying to read SPD of DIMM on a motherboard with SiS745 chipset. But I cann't read it. I've checked the ACPI enable bit. It is 0xD8. The ACPI Base Address is 0xE400. Can anyone help me to fix the problem ? Thanks, Charlie

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flash_rom patches.
by ron minnich 27 Mar '03

27 Mar '03

I have finally finished a bunch of paperwork exercise here at the Lab and can now work on linuxbios again :-) I have applied and committed the flash_rom patches you sent. Will the person who recently sent me the new motherboard patches please resend ... I lost them. :-( Nice to be back doing something technical ... ron

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semi-ot: sis900 lan support
by Alessio Sangalli 27 Mar '03

27 Mar '03

Hi. I've experienced some problems with sis900 ethernet performances. Though this is not *directly* linuxbios related, I think here I can find interesteds people. I'm here with my pcchips 810 motherboard, but I've found the same problem on other TWO motheboards. I load the sis900 module or I compile it into the kernel, but the performances are incredibly low: if I transfer a huge file, the transfer starts at 5MB/s more or less, but after few seconds it drammatically drops to 60KB/s. I would need more that two hours to transfer an ISO image. I've changed the cable, connected the computers with a cross cable, but the problem is always there. The other computer has a rtl8139 card and works fine with other non-sis900 hosts. ifconfig or iptraf show NO errors but the transfer rate is no more than 60KB/s. I'm using kernel 2.4.20, pcchips810lmr with 256MB memory and athlon2000+... bye bye, thank you as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc

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small c compiler status...
by ebiederman＠lnxi.com 27 Mar '03

27 Mar '03

O.k. I have been going incrementally and have just finished the register allocator. I built the compiler on an optimization framework which took a little more work than I expected but things have been going good so far. My test code base is the L440GX ram initialization in C, that I wrong a while ago. With a small change smbus_read_byte so that it does not take a pointer argument but instead does the classic getchar trick for return a status and a data byte in the same return value. So far it compiles it all with just 8 registers except for 2 lines of code. So a little bit of tweaking of will probably be called for. I will publish the code as soon as I have it generating x86 assembly. The big thing I want to measure now is how much of a code size increase all of that unconditional inline gives. If it significant I have a optimization on the back burner that will not inline a function if there are sufficient registers available to call it out of line. Upgrading the compiler to optionally use the MMX and/or the SSE registers for additional storage should take about an hour. The generic code really does not care. Of almost as much usefulness I have not yet implemented constant propagation which should reduce the register pressure as well. The compiler itself is probably not especially shareable with other projects as it first and foremost optimizes register usage. But I don't think it will be a major maintenance burden either. So far it comes to about 8000 lines of code with a noticeable chunk of that being code to dump the the various forms of intermediate code. Though I expect it to probably stabilize around 10000 lines of code. My tentative name for the compiler is romcc. If anyone has a better one I'm all ears. So far romcc is the only name I have thought of that someone else isn't already using. Eric

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