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Etherboot/LinuxBios on Supermicro P4DPE
by Atherton, Stephen 10 Apr '03

10 Apr '03

I'm trying to get etherboot and linuxbios running on a supermicro p4dpe. The config file I'm using is below. It builds okay, and I get a romimage of around 460k (not sure why it isn't 524288), but when I burn it (using flash_and_burn), it doesn't seem to work. I get no output on the serial port. Note that I have BOOT_IDE set to 1 because at this point I would be happy just to see it boot anything, and I have linux on the ide hard disk. Does BOOT_IDE do what I think it does, or is that for something else? Is there something wrong with my config file, or should I use some other flash program for this board? I tried the one from supermicro, and doesn't seem to like my romimage file, it exits with "cannot close filehandle". Also, a few other questions... Does linuxbios cause a beep or do anything so that when the machine is powered on I would have some clue that it is working? Since I'm using the etherboot elf image as a payload, the linux and commandline directives in the config file do nothing, right? What does USE_FALLBACK_IMAGE do exactly? LinuxBios Config file: target supermicro mainboard supermicro/p4dpe option USE_FALLBACK_IMAGE=0 option ROM_SIZE=524288 option ROM_IMAGE_SIZE=49152 option SERIAL_CONSOLE=1 option TTYS0_BAUD=9600 option TTYS0_BASE=0x3f8 option TTYS0_LCS=0x3 option DEFAULT_CONSOLE_LOGLEVEL=9 option MAXIMUM_CONSOLE_LOGLEVEL=8 option USE_ELF_BOOT=1 option BOOT_IDE=1 payload ../eepro100.elf option CPU_CLOCK_MULTIPLIER=XEON_X17 option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON linux /usr/src/linux-2.4.18-14 commandline root=/dev/hda2 console=ttyS0,9600 single

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RE: 533Mhz FSB of E7501
by Terry B. Chen 10 Apr '03

10 Apr '03

We tested s2723 that use E7501 source code; I find linuxbios can not support dual channel memory. Then I try to disable hyper threading, the spot_check meet error again！ I have compare the E7501 with E7500 Bios spec, it have a lot of differences between these two chipsets including RCOMP programming. I suppose it need to modify in many site. This is the two the lspci file. I suppose you just need 00:00;0 400 FSB: 00:00.0 Host bridge: Intel Corp.: Unknown device 254c (rev 01) 00: 86 80 4c 25 06 01 90 00 01 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 60 0d 00 00 00 00 00 00 10 11 01 00 00 33 33 60: 00 00 08 08 08 08 08 08 00 00 00 00 00 00 00 00 70: 00 03 00 00 00 00 00 00 1f 04 01 39 79 02 67 20 80: b1 0b 71 00 00 00 00 00 00 98 10 d2 0d 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 1a 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 20 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 01 01 e0: 1d 1d 00 00 00 00 00 00 56 46 00 00 00 00 00 00 f0: 00 00 00 00 74 00 30 40 40 0f 00 00 00 00 00 00 533 MHZ: 00:00.0 Host bridge: Intel Corp.: Unknown device 254c (rev 01) 00: 86 80 4c 25 06 01 90 00 01 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 60 0d 00 00 00 00 00 00 10 11 01 00 00 33 33 60: 00 00 08 08 08 08 08 08 00 00 00 00 00 00 00 00 70: 00 03 00 00 00 00 00 00 04 02 01 28 79 02 67 20 80: 62 06 71 00 00 00 00 00 00 98 10 d2 8d 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 1a 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 20 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 01 01 e0: 1d 1d 00 00 00 00 00 00 54 4a 00 00 00 00 00 00 f0: 00 00 00 00 74 00 30 40 40 0f 00 00 00 00 00 00 -----Original Message----- From: steven james [mailto:pyro@linuxlabs.com] Sent: 2003年4月8日 23:16 To: Terry B. Chen Cc: linuxbios(a)clustermatic.org Subject: Re: 533Mhz FSB of E7501 Greetings, Most likely, there is an undocumented register issue in the northbridge. With the OEM BIOS, can you send me an lspci with a 400 FSB and a 533 FSB. That should narrow things down. G'day, sjames On Tue, 8 Apr 2003, Terry B. Chen wrote: > Dear all; > I am trying the Tyan 2723(E7501), but I find it will report > spot_check error if the board run in 533 FSB. But if the CPU or the > memory is 400 FSB it will be ok. Does anyone else meet the same problem? > > Best regards > Terry chen > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 -----------------------------------------------------------------------

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PIRQ problems on Geode GX1 board.
by Joey Nelson 10 Apr '03

10 Apr '03

Thanks to lots of great help from Eric on the Etherboot list I have my system mostly working, except there appear to be some problems with the PCI IRQ routing stuff. I ran getpir on the target with its standard bios, and got a good irq_tables.c, and HAVE_PIRQ_TABLE=1 is set in the Config. But this line is troubling: Verifing priq routing tables copy at 0xf0000...failed Any idea why this is failing? When the kernel is loading I get the following complaint: PCI: No IRQ known for interrupt pin A of device 00:0d.0. Please try using pci=biosirq. I'm also hoping this be why my IDE does not appear to be working. I don't imagine it is the memcpy call that is bad, so I'm guessing there is a problem with my memory setup. Any suggestions? Thanks, Joey Nelson LinuxBIOS-1.0.0 Wed Apr 2 15:06:02 PST 2003 starting... Setting up default parameters for memory Sizing memory Probing for DIMM0 Found DIMM0 Page Size: 00000800 Component Banks: 4 Module Banks: 1 DIMM size: 02000000 Probing for DIMM1 Memory sizing done, MC_BANK_CFG = 0x00701310 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Wed Apr 2 15:06:02 PST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 0000a920 s->super 0000ab64 handle_superio: Pass 0, Superio SMC fdc37b78x handle_superio port 0x3f0, defaultport 0x3f0 handle_superio Using port 0x3f0 handle_superio Pass 0, done #0 handle_superio done Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1078/0001] PCI: 00:0d.0 [10ec/8139] PCI: 00:12.0 [1078/0100] PCI: 00:12.1 [1078/0101] PCI: 00:12.2 [1078/0102] PCI: 00:12.3 [1078/0103] PCI: 00:12.4 [1078/0104] PCI: 00:13.0 [0e11/a0f8] PCI: pci_scan_bus returning with max=00 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:0d.0 10 <- [0x00001000 - 0x000010ff] io PCI: 00:0d.0 14 <- [0xfebfd000 - 0xfebfd0ff] mem PCI: 00:12.1 10 <- [0xfebfe000 - 0xfebfe0ff] mem PCI: 00:12.2 20 <- [0x00001400 - 0x0000147f] io PCI: 00:12.3 10 <- [0xfebff000 - 0xfebff07f] mem PCI: 00:12.4 10 <- [0xfebfb000 - 0xfebfbfff] mem PCI: 00:13.0 10 <- [0xfebfc000 - 0xfebfcfff] mem ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 07 PCI: 00:0d.0 cmd <- 03 PCI: 00:12.0 cmd <- 0f PCI: 00:12.1 cmd <- 02 PCI: 00:12.2 cmd <- 01 PCI: 00:12.3 cmd <- 02 PCI: 00:12.4 cmd <- 03 PCI: 00:13.0 cmd <- 02 done. Initializing PCI devices... PCI devices initialized DIMM0: 32MB (2kB page size, 4 component banks, 1 module banks) DIMM1: empty Reserving 4096kB for video memory BC_DRAM_TOP = 0x01bfffff MC_GBASE_ADD = 0x00000038 totalram: 28M Initializing CPU #0 Enabling cache...done. Max cpuid index : 2 Vendor ID : Geode by NSC Processor Type : 0x00 Processor Family : 0x05 Processor Model : 0x04 Processor Mask : 0x00 Processor Stepping : 0x00 Feature flags : 0x00808131 Cache/TLB descriptor values: 1 reads required Desc 0x70 : UNKNOWN Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x80 : UNKNOWN Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null done. CPU #0 Initialized Enable FLASH Set F0/0x52 to 0xee cs5530: Enabling Primary IDE Controller cs5530: Enabling Secondary IDE Controller Set F0/0x5b to |= 1 << 5(0x38) handle_superio start, nsuperio 1 handle_superio Pass 1, check #0, s 0000a920 s->super 0000ab64 handle_superio: Pass 1, Superio SMC fdc37b78x handle_superio port 0x3f0, defaultport 0x3f0 handle_superio Using port 0x3f0 Call init Enabling com device: 04 Com1 configured Disabling com device: 05 handle_superio Pass 1, done #0 handle_superio done Final southbridge fixup F0/5b = 0x38 cs5530: Enabling Primary IDE Controller cs5530: Enabling Secondary IDE Controller F0/5b = 0x38 Final mainboard fixup handle_superio start, nsuperio 1 handle_superio Pass 2, check #0, s 0000a920 s->super 0000ab64 handle_superio: Pass 2, Superio SMC fdc37b78x handle_superio port 0x3f0, defaultport 0x3f0 handle_superio Using port 0x3f0 handle_superio Pass 2, done #0 handle_superio done Checking IRQ routing tables... /home/highfreq/tt/freebios/src/arch/i386/lib/pirq_routing.c: 24:check_pirq_routing_table() - irq_routing_table located at: 0x00008c20 done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 00000634 checksum f470 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 203:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000ffff Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 3 init_bytes found 0 tags Found ELF candiate at offset 0 Loading Etherboot version: 5.1.7 Dropping non PT_LOAD segment New segment addr 0x20000 size 0xeaa4 offset 0xb0 filesize 0x5d60 (cleaned up) New segment addr 0x20000 size 0xeaa4 offset 0xb0 filesize 0x5d60 Loading Segment: addr: 0x0000000001b825a8 memsz: 0x000000000000eaa4 filesz: 0x0000000000005d60 Clearing Segment: addr: 0x0000000001b88308 memsz: 0x0000000000008d44 Jumping to boot code at 0x20000 ROM segment 0x0002 length 0x0ce4 reloc 0x00020000 CPU 138 Mhz Etherboot 5.1.7 (GPL) ELF for [IDE] Relocating _text from: [00020000,0002eab0) to [01bf1550,01c00000) Probing pci disk... [IDE]disk-1 7872k cap: 0200 Searching for image... ................................(ELF)... Loading Linux version: Loading image... ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ ........................................................................ .......................................done Unknown bootloader class! type=0x00000000 data=0x00000000 Firmware type: LinuxBIOS Uncompressing Linux... Ok, booting the kernel. BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 0000000000000678 (reserved) BIOS-e820: 0000000000000678 - 00000000000a0000 (usable) BIOS-e820: 0000000000100000 - 0000000001c00000 (usable) 28MB LOWMEM available. hm, page 00000000 reserved twice. On node 0 totalpages: 7168 zone(0): 4096 pages. zone(1): 3072 pages. zone(2): 0 pages. Kernel command line: console=ttyS0,38400n8 debug root=/dev/hda2 Initializing CPU#0 Working around Cyrix MediaGX virtual DMA bugs. Detected 133.636 MHz processor. Linux version 2.4.19 (root@bender) (gcc version 2.96 20000731 (Red Hat Linux 7.3 2.96-110)) #21 Wed Apr 9 16:46:42 PDT 2003 BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 0000000000000678 (reserved) BIOS-e820: 0000000000000678 - 00000000000a0000 (usable) BIOS-e820: 0000000000100000 - 0000000001c00000 (usable) 28MB LOWMEM available. hm, page 00000000 reserved twice. On node 0 totalpages: 7168 zone(0): 4096 pages. zone(1): 3072 pages. zone(2): 0 pages. Kernel command line: console=ttyS0,38400n8 debug root=/dev/hda2 nitializing CPU#0 Working around Cyrix MediaGX virtual DMA bugs. Detected 133.636 MHz processor. Calibrating delay loop... 266.24 BogoMIPS Memory: 26504k/28672k available (860k kernel code, 1780k reserved, 335k data, 52k init, 0k highmem) Checking if this processor honours the WP bit even in supervisor mode... Ok. Dentry cache hash table entries: 4096 (order: 3, 32768 bytes) Inode cache hash table entries: 2048 (order: 2, 16384 bytes) Mount-cache hash table entries: 512 (order: 0, 4096 bytes) Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 8192 (order: 3, 32768 bytes) CPU: Before vendor init, caps: 00808131 01818131 00000000, vendor = 8 Working around Cyrix MediaGX virtual DMA bugs. CPU: After vendor init, caps: 00808131 00818131 00000000 00000001 CPU: After generic, caps: 00808131 00818131 00000000 00000001 CPU: Common caps: 00808131 00818131 00000000 00000001 CPU: NSC Geode(TM) Integrated Processor by National Semi stepping 02 Checking 'hlt' instruction... OK. POSIX conformance testing by UNIFIX PCI: Using configuration type 1 PCI: Probing PCI hardware Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket Starting kswapd Installing knfsd (copyright (C) 1996 okir(a)monad.swb.de). pty: 256 Unix98 ptys configured Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled ttyS00 at 0x03f8 (irq = 4) is a 16550A hda: 0MB, CHS=0/0/0 RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize 8139too Fast Ethernet driver 0.9.25 PCI: No IRQ known for interrupt pin A of device 00:0d.0. Please try using pci=biosirq. eth0: RealTek RTL8139 Fast Ethernet at 0xc2800000, 00:04:a7:02:0c:af, IRQ 0 eth0: Identified 8139 chip type 'RTL-8139C' NET4: Linux TCP/IP 1.0 for NET4.0 IP Protocols: ICMP, UDP, TCP, IGMP IP: routing cache hash table of 512 buckets, 4Kbytes TCP: Hash tables configured (established 2048 bind 2048) NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. end_request: I/O error, dev 03:02 (hard disk), sector 2 EXT2-fs: unable to read superblock end_request: I/O error, dev 03:02 (hard disk), sector 0 FAT: unable to read boot sector Kernel panic: VFS: Unable to mount root fs on 03:02

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RE: about BOOT_IDE
by Terry B. Chen 10 Apr '03

10 Apr '03

Thank you for your advice, I did as you say, but the ide_init() failed, do you meet the problem ? or you have change the code? -----Original Message----- From: Steve Gehlbach [mailto:steve@nexpath.com] Sent: 2003年4月10日 13:26 To: Terry B. Chen Cc: LinuxBIOS Subject: Re: about BOOT_IDE Terry B. Chen wrote: > Dear all: > > I decide to elf_boot use BOOT_IDE, because the rom is too small > to settle a big kernel that support. > > Can some one tell me the usage of the options such as ONE_TRACK and how > to put the elf to hard disk, I think it must be dangerous, it seem to > read the sector directly. Someone can teach me a little? > > See pcchips787.config in util/config for complete configuration. option BOOT_IDE=1 This enables booting from IDE, the file to use is linux.bin.gz: option IDE_BOOT_DRIVE=2 If you do not use drive 0 (default), then you can set which drive to boot; (0,1,2,3) are the four standard PC drives: option ONE_TRACK=32 The linux.bin.gz file is put in raw form at partition 1, ie, the first partition on the disk. This is located just past the partition table. The partition table size varies, it is "one track" from the beginning of the disk. "one track" in c/h/s notation is "s" or the number of sectors per track. ONE_TRACK is in sectors, the software multiplies by 512. Most disks are 63 sectors per track (the default), but my CF is 32 sectors per track. eg, the partion table is 63x512 or 32x512 bytes. You can partition your disk as you want, but linux goes raw in partition 1; just make sure partition 1 is big enough, not a problem on today's disks. You could put the linux root file system on partition 2, for example. In pcchips787.config, I put the linux root file system on IDE 0, partition 2 (I was experimenting with linux in partition 1), but I eventually put linux on drive 2 using CF. You are right, copying of linux.bin.gz raw to the partition is dangerous, and something like "cat linux.bin.gz > /dev/hda1" will definitely screw the disk if you put the wrong disk or partition. I recommend a shell script, fingers cannot be trusted. You can also use "dd" but "cat" works.

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Re: newbie question: where to begin with the code ?
by dkotian3＠vsnl.net 09 Apr '03

09 Apr '03

This question comes almost every alternate week . Please follow this overview documentation here, may be this should do some good. This quite a good overview discussed 2 weeks back. -----Original Message----- From: linuxbios-admin(a)clustermatic.org [mailto:linuxbios-admin@clustermatic.org]On Behalf Of Greg Watson Sent: Friday, March 28, 2003 10:20 PM To: linuxbios(a)clustermatic.org Subject: Re: Information about BIOS and the boot process Other people probably know much more about this than me, but here's my experience. There seem to be two main parts to linuxbios. The first is arch/{arch}/config/ctr0.base which does the very low level initialization, like turning on memory, etc. The second is arch/{arch}/lib/c_start.S which does whatever else is necessary to call the C function hardwaremain(). hardwaremain() then does whatever else is necessary to load linux. c_start.S is linked with linuxbios.a, a library containing generic support routines (those found in the lib directory) and anything specified using the 'object' directive in a Config file (and other stuff). The resultant 'executable' is called linuxbios_c. The loader script used to link linuxbios_c is config/linuxbios_c.ld, and is configured to be loaded relative to _RAMBASE. crt0.base is not linked against anything. Any additional assembly routines you need must be specified using the 'mainboardinit' directive in a Config file. This causes the specified assembly file to be added to "crt0_includes.h" which is in turn included at the start of crt0.base (or at the end in the case of the ppc version). The loader script used to link crt0.base is in arch/{arch}/config/ldscript.base. The resultant 'executable' is called linuxbios and will be loaded at _ROMBASE. The tricky thing is that this loader script will also load the linuxbios_c 'executable' at a location called _payload in this file. The main task of crt0.base is then to initialize enough hardware so that this payload can be copied from rom into ram (which may also involve uncompressing code). Then control is transferred to _start, which is the first location in linuxbios_c. To get an idea of how crt0.base works, look at the following files. This is the order of execution specified by the configuration file for sis735. cpu/i386/entry16.inc cpu/i386/entry32.inc superio/sis/950/setup_serial.inc pc80/serial.inc arch/i386/lib/console.inc cpu/k7/earlymtrr.inc northsouthbridge/sis/735/raminit.inc arch/i386/config/crt0.base Next look at c_start.S which will show you what happens once control is transferred to _start. Finally, look at arch/{arch}/lib/hardwaremain.c to see what other stuff is done to get linux loaded. Most other files are specific to particular hardware, so it can be pretty confusing to just browse the tree. Hope this helps, Greg At 7:00 PM +0500 3/28/03, dkotian3(a)vsnl.net wrote: >Agreed, I am also looking for a good documention. >Atleast the flow in terms of implemented functions >or assembly code and some kind of Do's and Dont's >if any. >One good advantage would be more and more people >would be easily aware about the code architecture and >would get invovled in LinuxBIOS if one is interested. > > > >ivan(a)munix.com.br wrote > I am writing some code to fixup the video chipset trident >cyberblade and V1621 RGB->CS encoder , >and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so >I am looking for information >about the real bios process, and about the layout of the common bios >files, and of course, any information >about bios as possible. > >My main problem is to find good documentation about the post, the boot >process. > > I read on some places which the CS is set F000 and EIP FFF0, so >in other websites I had seen CS is FFF0, > in other 000F , causing some confusion with me. > >I need some documentation about 20bits addressing lines, and the GATE >A20 function also. > >Tanks in advance. > > >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios > >_______________________________________________ >Linuxbios mailing list >Linuxbios(a)clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios yenneo(a)oreka.com wrote IŽm currently trying to understand the code. IŽve tried with the file crt0.s in my build directory but i really have big difficulties. I wonder if itŽs the way to begin with this file. Other question : how does work ljmp **,** ? Cause i only know ljmp with one argument. I didnŽt find this information. Thanks in advance -------------------------------------------------- Oreka ! Nous sommes l'internet moins cher ! Surfez 25% moins cher avec http://www.oreka.com _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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How to get LinuxBIOS work with Xwindows?
by bendany 09 Apr '03

09 Apr '03

HI,all I am trying to use LinuxBIOS work with my machine, My mainboard is K7SEM. And When I start the Xwindows, I get a blank screen. Does any idea that LinuxBIOS can work with the Xwindows? thanks! ---- Bendany Qian bendany(a)mistdl.com "Let's make life easy!"

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(no subject)
by Devi Priya 09 Apr '03

09 Apr '03

_________________________________________________________________ Visit Malaysia. Win a free trip! http://server1.msn.co.in/msnspecials/malaysiatourism/index.asp Have an exotic holiday

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newbie question: where to begin with the code ?
by Philippe CABANNES 09 Apr '03

09 Apr '03

I´m currently trying to understand the code. I´ve tried with the file crt0.s in my build directory but i really have big difficulties. I wonder if it´s the way to begin with this file. Other question : how does work ljmp **,** ? Cause i only know ljmp with one argument. I didn´t find this information. Thanks in advance -------------------------------------------------- Oreka ! Nous sommes l'internet moins cher ! Surfez 25% moins cher avec http://www.oreka.com

1 0

Driver
by Priya 09 Apr '03

09 Apr '03

Hello, I need a driver for audio codec (National's LM4550) Linux OS. Where shall I get one

2 1

about BOOT_IDE
by Terry B. Chen 09 Apr '03

09 Apr '03

Dear all: I decide to elf_boot use BOOT_IDE, because the rom is too small to settle a big kernel that support. Can some one tell me the usage of the options such as ONE_TRACK and how to put the elf to hard disk, I think it must be dangerous, it seem to read the sector directly. Someone can teach me a little? Best regards Terry chen

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