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Commit on freebios2
by ron minnich 04 Aug '03

04 Aug '03

I have made the initial commits for the items Stefan requested; comments welcome. Here is the log. Commits for the new config static device design, to allow more than one static cpu of a certain type and to eliminate the cpu p5 cpu p6 cpu k7 nonsense in the old config files. Next step is to hook into Eric's pci device stuff. CVS: ---------------------------------------------------------------------- CVS: Enter Log. Lines beginning with `CVS:' are removed automatically CVS: CVS: Committing in . CVS: CVS: Modified Files: CVS: src/cpu/k7/Config.lb src/cpu/k8/Config.lb CVS: src/cpu/k8/cpufixup.c src/cpu/p6/Config.lb CVS: src/mainboard/arima/hdama/Config.lb CVS: src/mainboard/arima/hdama/mainboard.c util/newconfig/config.g CVS: ---------------------------------------------------------------------- Here is the fragment of the arima mainboard file that uses the new code; note that it is incomplete, I hope to fill it in. cpu k8 "cpu0" register "up" = "{.chip = &amd8111, .ht_width=8, .ht_speed=200}" end cpu k8 "cpu1" end Here is the code produced. struct chip static_root = { /* mainboard /home/rminnich/src/bios/freebios2/src/mainboard/arima/hdama */ .next = 0, .children = &cpu1, .control= &mainboard_arima_hdama_control, .chip_info = (void *) &mainboard_arima_hdama_config_0, }; struct cpu_k8_config cpu1_config; struct chip cpu1 = { /* cpu /home/rminnich/src/bios/freebios2/src/cpu/k8 */ .next = &cpu0, .children = 0, .control= &cpu_k8_control, .chip_info = (void *) &cpu1_config, }; struct cpu_k8_config cpu0_config = { .up = {.chip = &amd8111, .ht_width=8, .ht_speed=200}, }; struct chip cpu0 = { /* cpu /home/rminnich/src/bios/freebios2/src/cpu/k8 */ .next = &superio_NSC_pc87360_dev5, .children = 0, .control= &cpu_k8_control, .chip_info = (void *) &cpu0_config, }; thanks ron

2 2

Yh Lu's patches
by ron minnich 04 Aug '03

04 Aug '03

Can Eric and Stefan and others interested please take a quick look at this, it is the non-tyan mods from Yh Lu. I am going to commit the tyan mods in a few minutes. thanks ron diff -uNr ./freebios2/src/cpu/k8/cpufixup.c ../freebios2/src/cpu/k8/cpufixup.c --- ./freebios2/src/cpu/k8/cpufixup.c 2003-08-04 17:57:43.000000000 -0400 +++ ../freebios2/src/cpu/k8/cpufixup.c 2003-08-04 19:41:18.000000000 -0400 @@ -29,15 +29,28 @@ mmio_basek = tomk; } - /* Setup TOP_MEM */ - msr.hi = mmio_basek >> 22; - msr.lo = mmio_basek << 10; - wrmsr(TOP_MEM, msr); +#if 1 + /* Report the amount of memory. */ + print_debug("cpufixup RAM: 0x"); + print_debug_hex32(tomk); + print_debug(" KB\r\n"); +#endif + + /* Now set top of memory */ + msr.lo = (tomk & 0x003fffff) << 10; + msr.hi = (tomk & 0xffc00000) >> 22; + wrmsr(TOP_MEM2, msr); + + /* Leave a 64M hole between TOP_MEM and TOP_MEM2 + * so I can see my rom chip and other I/O devices. + */ + if (tomk >= 0x003f0000) { + tomk = 0x3f0000; + } // tom_k = 0x3c0000; + msr.lo = (tomk & 0x003fffff) << 10; + msr.hi = (tomk & 0xffc00000) >> 22; + wrmsr(TOP_MEM, msr); - /* Setup TOP_MEM2 */ - msr.hi = tomk >> 22; - msr.lo = tomk << 10; - wrmsr(TOP_MEM2, msr); /* zero the IORR's before we enable to prevent * undefined side effects. diff -uNr ./freebios2/src/include/console/console.h ../freebios2/src/include/console/console.h --- ./freebios2/src/include/console/console.h 2003-07-19 00:28:21.000000000 -0400 +++ ../freebios2/src/include/console/console.h 2003-08-02 01:40:57.000000000 -0400 @@ -92,34 +92,34 @@ #define print_debug_char(CH) printk_debug ("%c", (CH)) #define print_spew_char(CH) printk_spew ("%c", (CH)) -#define print_emerg_hex8(HEX) printk_emerg ("%08x", (HEX)) -#define print_alert_hex8(HEX) printk_alert ("%08x", (HEX)) -#define print_crit_hex8(HEX) printk_crit ("%08x", (HEX)) -#define print_err_hex8(HEX) printk_err ("%08x", (HEX)) -#define print_warning_hex8(HEX) printk_warning("%08x", (HEX)) -#define print_notice_hex8(HEX) printk_notice ("%08x", (HEX)) -#define print_info_hex8(HEX) printk_info ("%08x", (HEX)) -#define print_debug_hex8(HEX) printk_debug ("%08x", (HEX)) -#define print_spew_hex8(HEX) printk_spew ("%08x", (HEX)) +#define print_emerg_hex8(HEX) printk_emerg ("%02x", (HEX)) +#define print_alert_hex8(HEX) printk_alert ("%02x", (HEX)) +#define print_crit_hex8(HEX) printk_crit ("%02x", (HEX)) +#define print_err_hex8(HEX) printk_err ("%02x", (HEX)) +#define print_warning_hex8(HEX) printk_warning("%02x", (HEX)) +#define print_notice_hex8(HEX) printk_notice ("%02x", (HEX)) +#define print_info_hex8(HEX) printk_info ("%02x", (HEX)) +#define print_debug_hex8(HEX) printk_debug ("%02x", (HEX)) +#define print_spew_hex8(HEX) printk_spew ("%02x", (HEX)) -#define print_emerg_hex16(HEX) printk_emerg ("%016x", (HEX)) -#define print_alert_hex16(HEX) printk_alert ("%016x", (HEX)) -#define print_crit_hex16(HEX) printk_crit ("%016x", (HEX)) -#define print_err_hex16(HEX) printk_err ("%016x", (HEX)) -#define print_warning_hex16(HEX) printk_warning("%016x", (HEX)) -#define print_notice_hex16(HEX) printk_notice ("%016x", (HEX)) -#define print_info_hex16(HEX) printk_info ("%016x", (HEX)) -#define print_debug_hex16(HEX) printk_debug ("%016x", (HEX)) -#define print_spew_hex16(HEX) printk_spew ("%016x", (HEX)) +#define print_emerg_hex16(HEX) printk_emerg ("%04x", (HEX)) +#define print_alert_hex16(HEX) printk_alert ("%04x", (HEX)) +#define print_crit_hex16(HEX) printk_crit ("%04x", (HEX)) +#define print_err_hex16(HEX) printk_err ("%04x", (HEX)) +#define print_warning_hex16(HEX) printk_warning("%04x", (HEX)) +#define print_notice_hex16(HEX) printk_notice ("%04x", (HEX)) +#define print_info_hex16(HEX) printk_info ("%04x", (HEX)) +#define print_debug_hex16(HEX) printk_debug ("%04x", (HEX)) +#define print_spew_hex16(HEX) printk_spew ("%04x", (HEX)) -#define print_emerg_hex32(HEX) printk_emerg ("%032x", (HEX)) -#define print_alert_hex32(HEX) printk_alert ("%032x", (HEX)) -#define print_crit_hex32(HEX) printk_crit ("%032x", (HEX)) -#define print_err_hex32(HEX) printk_err ("%032x", (HEX)) -#define print_warning_hex32(HEX) printk_warning("%032x", (HEX)) -#define print_notice_hex32(HEX) printk_notice ("%032x", (HEX)) -#define print_info_hex32(HEX) printk_info ("%032x", (HEX)) -#define print_debug_hex32(HEX) printk_debug ("%032x", (HEX)) -#define print_spew_hex32(HEX) printk_spew ("%032x", (HEX)) +#define print_emerg_hex32(HEX) printk_emerg ("%08x", (HEX)) +#define print_alert_hex32(HEX) printk_alert ("%08x", (HEX)) +#define print_crit_hex32(HEX) printk_crit ("%08x", (HEX)) +#define print_err_hex32(HEX) printk_err ("%08x", (HEX)) +#define print_warning_hex32(HEX) printk_warning("%08x", (HEX)) +#define print_notice_hex32(HEX) printk_notice ("%08x", (HEX)) +#define print_info_hex32(HEX) printk_info ("%08x", (HEX)) +#define print_debug_hex32(HEX) printk_debug ("%08x", (HEX)) +#define print_spew_hex32(HEX) printk_spew ("%08x", (HEX)) diff -uNr ./freebios2/src/northbridge/amd/amdk8/raminit.c ../freebios2/src/northbridge/amd/amdk8/raminit.c --- ./freebios2/src/northbridge/amd/amdk8/raminit.c 2003-08-04 17:59:30.000000000 -0400 +++ ../freebios2/src/northbridge/amd/amdk8/raminit.c 2003-08-04 18:47:31.000000000 -0400 @@ -1124,6 +1124,23 @@ } } +//BY LYH //Fill next base reg with right value +static void fill_last(unsigned long node_id,unsigned long base) +{ + unsigned i; + unsigned base_reg; + base &=0xffff0000; + device_t device; + for(device = PCI_DEV(0, 0x18, 1); device <= PCI_DEV(0, 0x1f, 1); device ++= PCI_DEV(0, 1, 0)) { + for(i=node_id+1;i<=7;i++) { + base_reg=0x40+(i<<3); + pci_write_config32(device,base_reg,base); + } + } +} +//BY LYH END + static void route_dram_accesses(const struct mem_controller *ctrl, unsigned long base_k, unsigned long limit_k) { @@ -1276,6 +1293,9 @@ print_debug("\r\n"); #endif route_dram_accesses(ctrl, base_k, tom_k); +//BY LYH + fill_last(ctrl->node_id, tom_k<<2); +//BY LYH END set_top_mem(tom_k); } diff -uNr ./freebios2/src/southbridge/amd/amd8111/config.lb ../freebios2/src/southbridge/amd/amd8111/config.lb --- ./freebios2/src/southbridge/amd/amd8111/config.lb 2003-06-17 12:51:05.000000000 -0400 +++ ../freebios2/src/southbridge/amd/amd8111/config.lb 1969-12-31 19:00:00.000000000 -0500 @@ -1,4 +0,0 @@ -driver amd8111_usb.o -driver amd8111_lpc.o -driver amd8111_ide.o -driver amd8111_acpi.o

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Re: Fixes for Tyan s2880
by YhLu 04 Aug '03

04 Aug '03

Eric, It works on 12G too. Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB Setting variable MTRR 2, base: 3072MB, range: 512MB, type WB Setting variable MTRR 3, base: 3584MB, range: 256MB, type WB Setting variable MTRR 4, base: 4096MB, range: 4096MB, type WB Setting variable MTRR 5, base: 8192MB, range: 4096MB, type WB But I think you need to optimize mtrr.c now, otherwise it may not work with arima Hadama. 8*2=16G, will use out MTRR. It may be Setting variable MTRR 0, base: 3840MB, range: 256MB, type WC Setting variable MTRR 1, base: 4096MB, range: 4096MB, type WB Setting variable MTRR 2, base: 8192MB, range: 4096MB, type WB Setting variable MTRR 3, base: 4096MB, range: 4096MB, type WB Regards Yinghai Lu -----邮件原件----- 发件人: YhLu 发送时间: 2003年7月31日 21:08 收件人: ebiederman(a)lnxi.com 抄送: ron minnich; Stefan Reinauer; linuxbios(a)clustermatic.org 主题: re: Fixes for Tyan s2880 Eric, It works. For 6G. Tommorrow I will try 12G. Thanks. Yinghai Lu

2 1

Yh Lu patch
by ron minnich 04 Aug '03

04 Aug '03

I took a long look and it looked ok. I have patched and tested my linuxbios for HDAMA and it works fine. I am going to commit these patches. ron

1 0

Re: Weird behaviour with new config method
by YhLu 04 Aug '03

04 Aug '03

Etherboot images (5.1.8) built with RH 9 doesn't work. I think RH 8 the same. Only Etherboot images(5.1.8) built with Suse 8.2 can work. Different gcc?? Regards Yinghai Lu -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2003年8月4日 13:57 收件人: Eric W. Biederman 抄送: Stefan Reinauer; YhLu; gwatson(a)lanl.gov; LinuxBIOS 主题: Re: Weird behaviour with new config method On 4 Aug 2003, Eric W. Biederman wrote: > Previously when we had this conversation we tried for a minimum python > of 1.5 and the old config tool manages that. We may need to bump the > python requirement but we this needs investigation to see why the earlier > versions of python have problems. > we're going to have to bump minimums anyway. romcc fails for me on RH 7.3. ron

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Re: IO ports assign
by YhLu 04 Aug '03

04 Aug '03

Eric, Thanks, it works. Regards Yinghai Lu ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00003fff] bus 1 io PCI: 00:01.0 24 <- [0xfe300000 - 0xfe2fffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfe100000 - 0xfe1fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:07.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:07.0 14 <- [0xfe180000 - 0xfe181fff] mem PCI: 01:07.0 1c <- [0x00001400 - 0x000014ff] io PCI: 01:07.1 10 <- [0x00001800 - 0x000018ff] io PCI: 01:07.1 14 <- [0xfe182000 - 0xfe183fff] mem PCI: 01:07.1 1c <- [0x00001c00 - 0x00001cff] io PCI: 01:08.0 10 <- [0x00002000 - 0x000020ff] io PCI: 01:08.0 14 <- [0xfe184000 - 0xfe185fff] mem PCI: 01:08.0 1c <- [0x00002400 - 0x000024ff] io PCI: 01:08.1 10 <- [0x00002800 - 0x000028ff] io PCI: 01:08.1 14 <- [0xfe186000 - 0xfe187fff] mem PCI: 01:08.1 1c <- [0x00002c00 - 0x00002cff] io PCI: 01:09.0 10 <- [0xfe100000 - 0xfe10ffff] mem PCI: 01:09.0 18 <- [0xfe110000 - 0xfe11ffff] mem PCI: 01:09.1 10 <- [0xfe120000 - 0xfe12ffff] mem PCI: 01:09.1 18 <- [0xfe130000 - 0xfe13ffff] mem PCI: 01:0a.0 10 <- [0x00003000 - 0x000030ff] io PCI: 01:0a.0 14 <- [0xfe140000 - 0xfe14ffff] mem PCI: 01:0a.0 1c <- [0xfe150000 - 0xfe15ffff] mem PCI: 01:0a.1 10 <- [0x00003400 - 0x000034ff] io PCI: 01:0a.1 14 <- [0xfe160000 - 0xfe16ffff] mem PCI: 01:0a.1 1c <- [0xfe170000 - 0xfe17ffff] mem ASSIGNED RESOURCES, bus 1

1 0

IO ports assign
by YhLu 04 Aug '03

04 Aug '03

Eric, I have tested s2880 with all addon cards, and found interesting problem. When I plug Adaptec 29320 PCI X scsi card into slot 3 and 4. That share BUS_A of 8131 with LSI SCSI. Linux bios got IO port allocation problem on bus 1. BUS 1: 1000-2fff LSI will use 3000 later... Regards Yinghai Lu Allocating resources... ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00002fff] bus 1 io PCI: 00:01.0 24 <- [0xfe300000 - 0xfe2fffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfe100000 - 0xfe1fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:07.0 10 <- [0x00001000 - 0x000010ff] io PCI: 01:07.0 14 <- [0xfe180000 - 0xfe181fff] mem PCI: 01:07.0 1c <- [0x00001400 - 0x000014ff] io PCI: 01:07.1 10 <- [0x00001800 - 0x000018ff] io PCI: 01:07.1 14 <- [0xfe182000 - 0xfe183fff] mem PCI: 01:07.1 1c <- [0x00001c00 - 0x00001cff] io PCI: 01:08.0 10 <- [0x00002000 - 0x000020ff] io PCI: 01:08.0 14 <- [0xfe184000 - 0xfe185fff] mem PCI: 01:08.0 1c <- [0x00002400 - 0x000024ff] io PCI: 01:08.1 10 <- [0x00002800 - 0x000028ff] io PCI: 01:08.1 14 <- [0xfe186000 - 0xfe187fff] mem PCI: 01:08.1 1c <- [0x00002c00 - 0x00002cff] io PCI: 01:09.0 10 <- [0xfe100000 - 0xfe10ffff] mem PCI: 01:09.0 18 <- [0xfe110000 - 0xfe11ffff] mem PCI: 01:09.1 10 <- [0xfe120000 - 0xfe12ffff] mem PCI: 01:09.1 18 <- [0xfe130000 - 0xfe13ffff] mem PCI: 01:0a.0 10 <- [0x00003000 - 0x000030ff] io PCI: 01:0a.0 14 <- [0xfe140000 - 0xfe14ffff] mem PCI: 01:0a.0 1c <- [0xfe150000 - 0xfe15ffff] mem PCI: 01:0a.1 10 <- [0x00003400 - 0x000034ff] io PCI: 01:0a.1 14 <- [0xfe160000 - 0xfe16ffff] mem PCI: 01:0a.1 1c <- [0xfe170000 - 0xfe17ffff] mem ASSIGNED RESOURCES, bus 1

2 1

Re: Weird behaviour with new config method
by ebiederman＠lnxi.com 04 Aug '03

04 Aug '03

Greg Watson <g.watson(a)computer.org> writes: > You need to provide a 'format' string for the option. This bit Ron too. I think > it needs to be made mandatory. If I was not using the stock hdama configuration I would not have a problem with that. It looks like Ron did not check in the fix or whatever. I don't know yet which option it is having a problem with. Eric

2 1

How can I transfer file to LinuxBIOS machine
by gimyung han 04 Aug '03

04 Aug '03

I'm trying to enable vgabios on my LinuxBIOS machine. Currently, my EPIA computer is not supporting vga bios and I didn't backup my original BIOS. Fortunately, I have another machine(EPIA-M), so I extract vgabios from BIOS on EPIA-M. I transfered vga bios to my host computer hooked up with EPIA machine. According to the HOWTO, EPIA machine is given a static IP address from host computer. (by its MAC address). so, I tried to connect to host computer via telnet, but I failed. I think network card on EPIA board is not detected. (I compiled kernel image on other computer) is there any way to connect to EPIA computer and transfer vga bios to it. Thanks for any help. >From poor beginner _________________________________________________________________ MSN Messenger를 통해 온라인상에 있는 친구와 대화를 나누세요. http://messenger.msn.co.kr

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Open Firware for Laptop Keyboard Scan/Super I/O's
by Bari Ari 02 Aug '03

02 Aug '03

One of the final hurdles in open firmware for laptops is having support for the "super I/O keyboard scan controllers". Closed source offerings include: http://www.insydesw.com/solutions/pc/keyboard.htm http://www.phoenix.com/en/products/phoenix+cme+firstbios/system+firmware/te… Has anyone come across any open source projects that have started work on this? Bari

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