coreboot January 2018

coreboot@coreboot.org

60 participants
155 discussions

Re: [coreboot] 16 GPUs on one board
by Taiidan＠gmx.com 07 Jan '18

07 Jan '18

I have had this issue in regards to SR-IOV, - at the moment coreboot only supports 32Bit MMIO unfortunately one can't have too many graphics devices or network interfaces apparently. Considering the success of the OpenBMC port fund it would be nice if we could get a fund going to fix this if it wouldn't cost too much as I would really like to be able to use SR-IOV and many more PCI-e devices on my board via a cyclone PCI-e expansion system eventually. I am not sure if there is a work-around in linux but post back if you find one.

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Logging from within romstage? Problems initializing uart
by Hal Martin 07 Jan '18

07 Jan '18

Hi all, I have been asked to clean up my patch enabling SuperIO uart on the intense-pc: https://review.coreboot.org/#/c/coreboot/+/22737/ The SIO1007 is supposed to properly initialize the UART in the sio1007_enable_uart_at(), but when I call it nothing seems to happen and the uart doesn't end up in a working state. To diagnose why this isn't working, I want to add some logging statements to sio1007_enable_uart_at(), but it seems that printk() doesn't work in romstage because the cbmem region isn't yet allocated? Can anyone provide some pointers for how I might add some debugging statements while in romstage? It's really quite annoying because the uart works if I duplicate some SuperIO code borrowed from an Intel board in romstage.c, but if I rely entirely on the initialization code from sio1007, I have no uart and nothing in the cbmem logs to help me diagnose why it's failing. Any tips you have would be appreciated. Having uart is extremely helpful for debugging when making modifications to coreboot. Unfortunately my problem involves uart, which makes it much more difficult for me to debug! Thanks, Hal

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Re: [coreboot] Can coreboot for KabyLake rvp11 work on Intel Sasby Island kit?
by Naresh G. Solanki 07 Jan '18

07 Jan '18

Hi Toan Le, For Sasby Island, which is based on KBL U, you'll need corresponding blobs(me descriptor & ucode). Use kblrvp7 as starting point. And based on schematic(of Sasby Island) & your requirement(interface/device), you may have change settings(like gpio, devicetree.cb etc). Make sure you are using right config & blobs. For this you can get in touch with Intel FAE. Regards, Naresh G Solanki On Jan 6, 2018 7:45 AM, "Toan Le manh" <lemanhtoantb(a)gmail.com> wrote: Hi Naresh, Thanks a lot for your reply. Could you please advise which settings should be modified for sasby island? Thanks. 2018-01-06 2:33 GMT+07:00 Naresh G. Solanki <naresh.solanki.2011(a)gmail.com>: > I guess you have coreboot working on rvp11. > > You may have to modify few settings based on sasby island. > > > > On Jan 4, 2018 7:58 AM, "Toan Le manh" <lemanhtoantb(a)gmail.com> wrote: > >> Hi, >> >> I had a Intel Sasby Island kit, which has CPU family: SkyLake, model >> i7-6600U, Memory: LPDDR4. >> Do you think coreboot for Intel rvp11 (Kabylake U, LPDDR4) can work on >> that Sasby Island kit? >> >> Thanks & BRs, >> Toan Le >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot >> >

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Recommended workflow with Chromebook support
by tturne＠codeaurora.org 07 Jan '18

07 Jan '18

Folks, This question is directed at the Coreboot developers who target a Chromebook device. Do you tend to do bulk of development and testing within chromiumos coreboot tree or directly in coreboot.org tree? As we get going we are trying to decide if it makes more sense to work directly in chromium tree and then rebase our commits onto coreboot tree and test compile prior to submission upstream? Cheers, T.mike

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Re: [coreboot] Can coreboot for KabyLake rvp11 work on Intel Sasby Island kit?
by Toan Le manh 06 Jan '18

06 Jan '18

Hi Naresh, Thanks a lot for your reply. Could you please advise which settings should be modified for sasby island? Thanks. 2018-01-06 2:33 GMT+07:00 Naresh G. Solanki <naresh.solanki.2011(a)gmail.com>: > I guess you have coreboot working on rvp11. > > You may have to modify few settings based on sasby island. > > > > On Jan 4, 2018 7:58 AM, "Toan Le manh" <lemanhtoantb(a)gmail.com> wrote: > >> Hi, >> >> I had a Intel Sasby Island kit, which has CPU family: SkyLake, model >> i7-6600U, Memory: LPDDR4. >> Do you think coreboot for Intel rvp11 (Kabylake U, LPDDR4) can work on >> that Sasby Island kit? >> >> Thanks & BRs, >> Toan Le >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot >> >

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Re: [coreboot] 16 GPUs on one board
by Adam Talbot 05 Jan '18

05 Jan '18

What will CoreBoot do if it runs out of room in the PCI_MMIO region? On Fri, Jan 5, 2018 at 8:49 AM, Adam Talbot <ajtalbot1(a)gmail.com> wrote: > "linear address space" != DRAM, got it. > > Interesting. > VGA compatible controller: NVIDIA Corporation GP104 [GeForce GTX 1070] > (rev a1) (prog-if 00 [VGA controller]) > Subsystem: NVIDIA Corporation GP104 [GeForce GTX 1070] > Flags: bus master, fast devsel, latency 0, IRQ 325 > Memory at d8000000 (32-bit, non-prefetchable) [size=16M] > Memory at c0000000 (64-bit, prefetchable) [size=256M] > Memory at b8000000 (64-bit, prefetchable) [size=32M] > I/O ports at b000 [size=128] > [virtual] Expansion ROM at d9000000 [disabled] [size=512K] > > So it looks like the current GP104 chips take 256M+16M+32M (304M). > > A few of the mining specific BIOS's have an "above 4G decoding." Now I > understand why this is required. > > So what would happen if I tweaked CoreBoot so it did not map VGA devices? > Would the Linux kernel clean up the mess? I have no problems doing > everything over serial console. >

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Re: [coreboot] 16 GPUs on one board
by Arthur Heymans 05 Jan '18

05 Jan '18

Adam Talbot <ajtalbot1(a)gmail.com> writes: > Arthur: Thanks for the details. I have a board that with give me a "missing memory" beep code with more then 6 GPUs. Now I understand why! > > How can I track down how much system DRAM a GPU is using? These are > all the newest Nvidia Pascal based cards. Mostly GTX 1070's. The answer is none unless onboard GPU which uses some. What you are interested in is how much linear address space it uses and how much you can fit in PCI_MMIO (memory mapped input output) region. You can use 'lspci -vvv' for that e.g. 00:02.0 VGA compatible controller: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller (rev 07) (prog-if 00 [VGA controller]) Subsystem: Lenovo Mobile 4 Series Chipset Integrated Graphics Controller Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 0: Memory at e1000000 (64-bit, non-prefetchable) [size=4M] Region 2: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 4: I/O ports at 3400 [size=8] [virtual] Expansion ROM at 000c0000 [disabled] [size=128K] Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- Address: 00000000 Data: 0000 Capabilities: [d0] Power Management version 3 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: i915 Kernel modules: i915 so for instance this device has 2 BAR's (base address reference) in memory space, the largest one being Region 2 which takes up 256M in linear memory space starting at the address 0xd0000000 (which is below 4G). (note this is NOT ram) sidenote: when working in 32bit mode with PAE, the cpu can only address 4G (2^32) of address space. Given that that PCI devices (and other non ram stuff) take up some place in this 4G address space, you are left with less than 4G usable ram (if your system has 4G or more). The remainder of the ram is mapped above 4G which the cpu cannot address in 32bit mode. What you want for such a setup is a BIOS/UEFI/boot_firmware that can allocate these BAR above 4G. coreboot afaik cannot do that. > > On an interesting note, one of my oldest motherboards, a Gigabyte GA-970A-UD3 will boot with all 8 cards, but gives me the no VGA beep code. Serial console for the win! > > Is this just a BIOS level issue? Or is there some hardware component I should be aware of? > > Thanks for the help. > -Adam > -- Arthur Heymans

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usb3/xhci issues with coreboot on Thinkpad x230
by merino＠aaathats3as.com 05 Jan '18

05 Jan '18

Hello, I noticed that OpenBSD 6.2 doesn't work well with the usb3 ports on my Thinkpad x230. Filled a bug report on the openbsd-bugs ml[1]. After some more debugging, it seems that this is an OS independent problem related to coreboot[2]. Flashing the Thinkpad with stock BIOS made the usb3 ports work without issues. I tested it with the coreboot build as seen in the dmesg output[1] and with a coreboot directly built from git. The issue exists with both builds. Build from git was done by: $ git clone https://review.coreboot.org/coreboot $ cd coreboot $ git submodule update --init --checkout Set the following options: - Mainboard vendor (Lenovo) - Mainboard model (ThinkPad X230) - [*] PS/2 keyboard init - (10) PS/2 keyboard controller initialization timeout (milliseconds) Everything else was left on the default setting. $ make crossgcc-x64 CPUS=4 $ make -j4 I still have one x230 equipped with coreboot to play with. Please let me know what tests I should do with it to debug this. -merino [1] https://marc.info/?l=openbsd-bugs&m=151482559023666&w=2 [2] https://marc.info/?l=openbsd-bugs&m=151491851711586&w=2

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Re: [coreboot] 16 GPUs on one board
by Zoran Stojsavljevic 05 Jan '18

05 Jan '18

> Yep, I am another crypto currencies miner. But in all truth, > I find the hardware challenge more fun then the bitcoin stuff. Thank you for conforming. Nothing wrong with it, as far as I can tell. :-) But for the sake of time, you should have this setup working ASAP. This is the aim, isn't it? > Power is not the issue (any more). I have 2Kw worth of PSU. > 2X HP Common slot 750W PSU + Thermaltake 500W PSU. > Currently, with all 8 cards running full tilt, across two motherboards, > and I am drawing 960~1000W. Those numbers are according to a > Kill-A-Watt meter. Thank you for the update. > Hardware wise, this is all x86_64. Which CPU are you using there? i3? i5? i7? Which code name, or Core number? And how much of system memory are you using? I guess, not less then 8GB (in two $GB DIMMs). > Arthur: Thanks for the details. I have a board that with give me a > "missing memory" beep code with more then 6 GPUs. Now I > understand why! So, each of the newest GTX 1070s need lot of memory from the host?! I always thought that all these GFX cards have their own GFX memory, dedicated to themselves?! And, YES, there is some system (buffer) memory dedicated to GFX processing. > How can I track down how much system DRAM a GPU is using? > These are all the newest Nvidia Pascal based cards. Mostly GTX 1070's. I can tell, I am also interested in this to know! > Is this just a BIOS level issue? Or is there some hardware component I > should be aware of? BIOS issue? Might be. You need to find video memory buffer dedicated for GFX cards. in this lieu, here is one perfect article for you: http://smallbusiness.chron.com/change-memory-allocated-graphics-card-58676.… Namely paragraph: Changing the Memory Allocation Typical values listed in the BIOS these days are 32MB, 64MB, 128MB, 256MB, 512MB and 1024MB. For your configuration, it is obvious that you need to set in BIOS the maximum size: 1024MB (since you have 16 PCIe GFX cards to support)! I hope this helps (waiting for you to report after you change the GFX system (buffer) memory area)! Zoran _______ On Fri, Jan 5, 2018 at 5:51 AM, Adam Talbot <ajtalbot1(a)gmail.com> wrote: > Yep, I am another crypto currencies miner. But in all truth, I find the > hardware challenge more fun then the bitcoin stuff. > > Power is not the issue (any more). I have 2Kw worth of PSU. 2X HP Common > slot 750W PSU + Thermaltake 500W PSU. Currently, with all 8 cards running > full tilt, across two motherboards, and I am drawing 960~1000W. Those > numbers are according to a Kill-A-Watt meter. > > Hardware wise, this is all x86_64. > > Arthur: Thanks for the details. I have a board that with give me a "missing > memory" beep code with more then 6 GPUs. Now I understand why! > > How can I track down how much system DRAM a GPU is using? These are all the > newest Nvidia Pascal based cards. Mostly GTX 1070's. > > On an interesting note, one of my oldest motherboards, a Gigabyte > GA-970A-UD3 will boot with all 8 cards, but gives me the no VGA beep code. > Serial console for the win! > > Is this just a BIOS level issue? Or is there some hardware component I > should be aware of? > > Thanks for the help. > -Adam > > > On Thu, Jan 4, 2018 at 8:14 PM, Zoran Stojsavljevic > <zoran.stojsavljevic(a)gmail.com> wrote: >> >> > I am totally off the deep end and don't know where else to turn >> > for help/advice. I am trying to get 16 GPU's on one motherboard. >> >> Hmmmm. Yet another crypto currencies miner. ;-) >> >> > Whenever I attach more then 3~5 GPU's to a single motherboard, >> > it fails to post. To make matters worse, my post code reader(s) don't >> > seem to give me any good error codes. Or at least nothing I can go on. >> >> You should have at minimum 1KW PSU for this job. At least... I guess, >> even more (for 16 discrete GPUs) 2 x 1KW would be reasonable. >> >> Zoran >> _______ >> >> On Thu, Jan 4, 2018 at 8:38 PM, Adam Talbot <ajtalbot1(a)gmail.com> wrote: >> > -Coreboot >> > I am totally off the deep end and don't know where else to turn for >> > help/advice. I am trying to get 16 GPU's on one motherboard. Whenever I >> > attach more then 3~5 GPU's to a single motherboard, it fails to post. >> > To >> > make matters worse, my post code reader(s) don't seem to give me any >> > good >> > error codes. Or at least nothing I can go on. >> > >> > I am using PLX PEX8614 chips (PCIe 12X switch) to take 4 lanes and pass >> > them >> > to 8 GPU's, 1 lane per GPU. Bandwidth is not an issues as all my code >> > runs >> > native on the GPUs. Depending on the motherboard, I can get up to 5 >> > GPU's to >> > post. After many hours of debugging, googling, and trouble shooting, I >> > am >> > out of ideas. >> > >> > At this point I have no clue. I think there is a hardware, and a BIOS >> > component? Can you help me understand the post process and where the >> > hang up >> > is occurring? Do you think Coreboot will get around this hangup and, if >> > so, >> > can you advise a motherboard for me to test with? >> > >> > Its been a long time sense I last compiled linuxbios. ;-) >> > >> > Thanks >> > -Adam >> > >> > -- >> > coreboot mailing list: coreboot(a)coreboot.org >> > https://mail.coreboot.org/mailman/listinfo/coreboot > >

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Re: [coreboot] BDX-DE PCI init fail
by Hilbert Tu(杜睿哲_Pegatron) 05 Jan '18

05 Jan '18

Hi David, After trying to use SeaBIOS as payload, I got more information about reboot issue as attached file. While U-Boot just reboots directly and Grub hangs, the SeaBIOS’s dump complains “No bootable device” at the end. Do you think is it the cause of reboot? Can I say my U-Boot and Grub versions are not supporting BDX-DE? -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊，僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件，請立即回覆郵件通知寄件人，並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為，皆嚴格禁止。

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coreboot January 2018