I have had this issue in regards to SR-IOV, - at the moment coreboot only supports 32Bit MMIO unfortunately one can't have too many graphics devices or network interfaces apparently.
Considering the success of the OpenBMC port fund it would be nice if we could get a fund going to fix this if it wouldn't cost too much as I would really like to be able to use SR-IOV and many more PCI-e devices on my board via a cyclone PCI-e expansion system eventually.
I am not sure if there is a work-around in linux but post back if you find one.
Lets take a slight differently tactic. What would happen if we removed the ROM from a GPU/NIC? Would the GPU's still require 256MB~304MB of PCI_MMIO?
On Sat, Jan 6, 2018 at 3:00 PM, Taiidan@gmx.com Taiidan@gmx.com wrote:
I have had this issue in regards to SR-IOV, - at the moment coreboot only supports 32Bit MMIO unfortunately one can't have too many graphics devices or network interfaces apparently.
Considering the success of the OpenBMC port fund it would be nice if we could get a fund going to fix this if it wouldn't cost too much as I would really like to be able to use SR-IOV and many more PCI-e devices on my board via a cyclone PCI-e expansion system eventually.
I am not sure if there is a work-around in linux but post back if you find one.
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Adam Talbot -
Taiidan＠gmx.com