coreboot March 2017

coreboot@coreboot.org

79 participants
267 discussions

Re: [coreboot] Coreboot wiki: what license is the content under?
by Sam Kuper 16 Mar '17

16 Mar '17

On 16/03/2017, Sam Kuper <sam.kuper(a)uclmail.net> wrote: > Looks like there are only 172 additional Coreboot wiki contributors to > account for :) > > curl -s \ > 'https://www.coreboot.org/index.php?title=Special:ListUsers&offset=&limit=500' > \ > | grep '^<option value="widgeteditor">' coreboot_users.html \ > | sed 's/<li>/\n/g' \ > | grep 'Special:Contributions/[^"]*">' \ > | perl -pe 's/^(.+?User:)([^"&]+?)(["&].*$)/$2/g' \ > | wc -l Sorry for the typo on line 3 of the above script. That should have been: curl -s \ 'https://www.coreboot.org/index.php?title=Special:ListUsers&offset=&limit=500' \ | grep '^<option value="widgeteditor">' \ | sed 's/<li>/\n/g' \ | grep 'Special:Contributions/[^"]*">' \ | perl -pe 's/^(.+?User:)([^"&]+?)(["&].*$)/$2/g' \ | wc -l N.B. If you want to see the usernames of the Coreboot wiki users who have actually made contributions, just leave off the last line.

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Re: [coreboot] Coreboot wiki: what license is the content under?
by Timothy Pearson 16 Mar '17

16 Mar '17

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 03/16/2017 02:27 PM, Sam Kuper wrote: > Hi folks, > > I have looked at a number of pages on the Coreboot wiki, though not all of them. > > None of the pages I have looked at mentioned the license (if any) > under which their content is available. > > My understanding is that means that much (maybe all) of the > documentation in the Coreboot wiki is proprietary (at least, in the > overwhelming majority of jurisdictions). IANAL, though. > > If my understanding is incorrect, please could you point me towards > information that should correct it? > > Alternatively, it would be great if Coreboot could license the > documentation in the wiki under one or more free culture licenses: > https://freedomdefined.org/Licenses > > Ideally, Coreboot would dual-license the content under the GFDL and CC > BY-SA 3.0, making the content entirely license compatible with content > from Wikipedia and from the Stack Exchange network of websites. > > Thanks, > > Sam > This is a good point. For what it's worth, anything contributed by Raptor Engineering to the Wiki should be considered at least dual licensed CC BY-SA 3.0 and GDFL; we'd love to see our content remixed / improved by the community as long as attribution and share-alike is maintained. - -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) https://www.raptorengineering.com -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJYyukfAAoJEK+E3vEXDOFb244H/2WGSbawK+jIHgtcfYJCCFbp 0yBpaIzA74341d5Jz5/Ip+K47l0u/WIDui2XGvjFViLY8HYljWjjtfYOghR4EvoY V+1TvBBv1USm/xfpmuCEYUqqJ+2gMwUjLynX7F3k56UQxhz8aY+Dz930GjZI1XvK TR66LZ7vSUoaN4YAJbLCaR1266jBV7lA5S2YScWgh2zwZCWJ5DmnM/JIlrc0fIaJ x+GTcoGvSWEzXK4TmMMoslYO+A5Yso0JGodsuYVL2FLRFS6vIfaDQeJwBd2z9Qj4 IcK26OsEf72mYo6SIOp9pXThkhUp3ZsPR8XNAkpN/XTODXqCmTe2WtBepyXRbzk= =JFBD -----END PGP SIGNATURE-----

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Re: [coreboot] Question about PK location
by Andrey Petrov 16 Mar '17

16 Mar '17

Hi, On 03/16/2017 07:44 AM, Rafael Machado wrote: > /"Intel Boot Guard is intended to protect against this scenario. When > your CPU starts up, it reads some code out of flash and executes it. > With Intel Boot Guard, the CPU verifies a signature on that code before > executing it[1]. The hash of the public half of the*_signing key is > flashed into fuses on the CPU_*. It is the system vendor that owns this > key and chooses to flash it into the CPU, not Intel. "/ > / > / > / > / > I would just like to know if some intel spec or something similar has > more details about the place this key can be stored. > Does anyone here have this information? I believe that is stored in FPF (Field Programmable Fuses). There are some details here: https://embedded.communities.intel.com/thread/8670 Best, Andrey

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Coreboot wiki: what license is the content under?
by Sam Kuper 16 Mar '17

16 Mar '17

Hi folks, I have looked at a number of pages on the Coreboot wiki, though not all of them. None of the pages I have looked at mentioned the license (if any) under which their content is available. My understanding is that means that much (maybe all) of the documentation in the Coreboot wiki is proprietary (at least, in the overwhelming majority of jurisdictions). IANAL, though. If my understanding is incorrect, please could you point me towards information that should correct it? Alternatively, it would be great if Coreboot could license the documentation in the wiki under one or more free culture licenses: https://freedomdefined.org/Licenses Ideally, Coreboot would dual-license the content under the GFDL and CC BY-SA 3.0, making the content entirely license compatible with content from Wikipedia and from the Stack Exchange network of websites. Thanks, Sam

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Re: [coreboot] [ANNOUNCEMENT] Please join today’s CCM
by Timothy Pearson 16 Mar '17

16 Mar '17

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 03/16/2017 11:41 AM, Martin Roth wrote: > The meeting is happening in 20 minutes. > > https://bluejeans.com/616384323 > > Phone bridge call in numbers: https://www.bluejeans.com/numbers > Meeting ID: 616384323 > > Current agenda & history: > https://coreboot-meeting.pads.ccc.de/CommunityMeetingTopics > > Martin Getting a certificate error on that pads.ccc.de site: NET::ERR_CERT_AUTHORITY_INVALID Chromium 53. Thanks! - -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) https://www.raptorengineering.com -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJYysKHAAoJEK+E3vEXDOFbhroH/RzFBAdIAEJpLkzSqQUOsENz pnRrMzKj2AB9g5v8iUoDFGIzUBwa72bIG8g6lpVXh4qy4hbi7Uf/PQLrKcYg7ZvO w/LCxQGbQgioPF50MObN1Ntp0ONLIwM9zGLk/QBguphqpZ1kFoRxspYzeZs480CF It4sssC0wSAQbWlwuginfhQrGtuc9m0TzfrD/qhEG3IXMW9N9wo/tturZ9ROmxiH CaQVk9lnuulJ77zWCkZgcaG9EyLUrGClQhTnsygUASWXsdLNHVwskDk/8bnmjXiC FBBd5MTJw0wwzUEkRVrmwg2J9ShTdIp7AQlaohoal5CvFONgHRi0jzL4kojW+co= =bgR3 -----END PGP SIGNATURE-----

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[ANNOUNCEMENT] Please join today’s CCM
by Paul Menzel 16 Mar '17

16 Mar '17

Dear coreboot folks, Another two weeks have past since the last coreboot community meeting [1]. So please join today’s community meeting. Please add your topics to the pad [2]. I am looking forward to talk to you there. Thanks, Paul [1] https://www.coreboot.org/Coreboot_community_meeting [2] https://coreboot-meeting.pads.ccc.de/CommunityMeetingTopics?

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Question about PK location
by Rafael Machado 16 Mar '17

16 Mar '17

Hi everyone I have a question, not 100% related to coreboot, but since the more skilled persons I know are here, I would like to ask someone's help if possible. I was search and trying to understand how does secureboot works. And during this work I found this post: https://mjg59.dreamwidth.org/33981.html And since this post is from someone I really respect (Mathew Garret), I believed on what was said. There we have the following sentence: *"Intel Boot Guard is intended to protect against this scenario. When your CPU starts up, it reads some code out of flash and executes it. With Intel Boot Guard, the CPU verifies a signature on that code before executing it[1]. The hash of the public half of the signing key is flashed into fuses on the CPU. It is the system vendor that owns this key and chooses to flash it into the CPU, not Intel. "* I would just like to know if some intel spec or something similar has more details about the place this key can be stored. Does anyone here have this information? Thanks and Regards Rafael R. Machado

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Re: [coreboot] RYZen single APU design
by qma ster 16 Mar '17

16 Mar '17

As far as I know, AMD does not have any "evil brother" of Intel ME. It only has AMD PSP (Platform Secure Processor) that is built-in to CPU. So, I don't think that cutting a PCH from AMD CPU has any practical value: even if the platform will boot after such a radical change to computer's hardware, you'll lose a lot of essential stuff like USB ports 2017-03-16 8:03 GMT+03:00 Zoran Stojsavljevic <zoran.stojsavljevic(a)gmail.com >: > Hello Coreboot folks, > > I have couple of interesting questions here. > > Recently, I have started learning about AMD (RYZen did not live me > unemotional), so after reading several articles (especially one with AMD > architecture): > http://www.anandtech.com/show/11182/how-to-get-ryzen-working > -on-windows-7-x64 > > I found/got from this article very interesting thought: AMD's APU, as > shown on this picture, could be left alone, even not connecting > Chipset/PCH!? > > I know that for INTEL this is impossible to do. With early INTEL ME > involvement to HW bring up (wrt PMIC and EC), I am wondering if this is > very similar architecture with AMD? > > [image: Inline image 1] > > [1] Did anybody try some proprietary embedded design, with AMD's APU all > alone (is it at all possible)? > [2] if [1] true, does anybody have some HW schema showing in details how > this is done/designed? > [3] if [1] is true. does Coreboot support such AMD designs (sans > chipsets/PCHs)? > > Thank you, > Zoran > > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot >

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[Regression] Asus M2V does not boot anymore
by Paul Menzel 16 Mar '17

16 Mar '17

Dear coreboot folks, This is just a small heads-up, that coreboot master doesn’t boot on the Asus M2V. If anybody has this board, or the similar board Asus M2V-MX SE, I’d appreciate any feedback and help in debugging. Thanks, Paul [1] https://ticket.coreboot.org/issues/101

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RYZen single APU design
by Zoran Stojsavljevic 16 Mar '17

16 Mar '17

Hello Coreboot folks, I have couple of interesting questions here. Recently, I have started learning about AMD (RYZen did not live me unemotional), so after reading several articles (especially one with AMD architecture): http://www.anandtech.com/show/11182/how-to-get-ryzen- working-on-windows-7-x64 I found/got from this article very interesting thought: AMD's APU, as shown on this picture, could be left alone, even not connecting Chipset/PCH!? I know that for INTEL this is impossible to do. With early INTEL ME involvement to HW bring up (wrt PMIC and EC), I am wondering if this is very similar architecture with AMD? [image: Inline image 1] [1] Did anybody try some proprietary embedded design, with AMD's APU all alone (is it at all possible)? [2] if [1] true, does anybody have some HW schema showing in details how this is done/designed? [3] if [1] is true. does Coreboot support such AMD designs (sans chipsets/PCHs)? Thank you, Zoran

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coreboot March 2017