coreboot November 2017

coreboot@coreboot.org

61 participants
110 discussions

I2C slave driver for Intel Appololake SOC
by chinmoy ghosh 16 Nov '17

16 Nov '17

Hi , I am new to coreboot .I am in need to write a I2c slave driver or Intel Appololake SOC . Here i am able to compile only coreboot/payloads/libpayload but src/drivers/ is not compiling - Do i need create slave driver under src/driver and how to compile ? - Is lpss_i2c.c(./src/soc/intel/common/lpss_i2c.c) is i2c master driver ? Waiting for your reply. Regards Chinmoy

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M5A97 R2.0 support?
by Myself 13 Nov '17

13 Nov '17

Hello. I was wondering if it is possible to use coreboot on my motherboard? Vendor: ASUS Board name: M5A97 R2.0 CPU: AMD FX(tm)-6300 Six-Core Processor Northbridge: AMD 970 Southbridge: not sure lspci output: -[0000:00]-+-00.0 Advanced Micro Devices, Inc. [AMD/ATI] RD890 PCI to PCI bridge (external gfx0 port B) [1002:5a14] +-00.2 Advanced Micro Devices, Inc. [AMD/ATI] RD990 I/O Memory Management Unit (IOMMU) [1002:5a23] +-02.0-[01]--+-00.0 NVIDIA Corporation GK104 [GeForce GTX 760] [10de:1187] | \-00.1 NVIDIA Corporation GK104 HDMI Audio Controller [10de:0e0a] +-04.0-[02]----00.0 Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] +-05.0-[03]----00.0 ASMedia Technology Inc. ASM1042 SuperSpeed USB Host Controller [1b21:1042] +-07.0-[04]----00.0 ASMedia Technology Inc. ASM1042 SuperSpeed USB Host Controller [1b21:1042] +-09.0-[05]----00.0 Qualcomm Atheros AR9287 Wireless Network Adapter (PCI-Express) [168c:002e] +-11.0 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 SATA Controller [AHCI mode] [1002:4391] +-12.0 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] +-12.2 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] +-13.0 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] +-13.2 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] +-14.0 Advanced Micro Devices, Inc. [AMD/ATI] SBx00 SMBus Controller [1002:4385] +-14.2 Advanced Micro Devices, Inc. [AMD/ATI] SBx00 Azalia (Intel HDA) [1002:4383] +-14.3 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 LPC host controller [1002:439d] +-14.4-[06]-- +-14.5 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI2 Controller [1002:4399] +-16.0 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB OHCI0 Controller [1002:4397] +-16.2 Advanced Micro Devices, Inc. [AMD/ATI] SB7x0/SB8x0/SB9x0 USB EHCI Controller [1002:4396] +-18.0 Advanced Micro Devices, Inc. [AMD] Family 15h Processor Function 0 [1022:1600] +-18.1 Advanced Micro Devices, Inc. [AMD] Family 15h Processor Function 1 [1022:1601] +-18.2 Advanced Micro Devices, Inc. [AMD] Family 15h Processor Function 2 [1022:1602] +-18.3 Advanced Micro Devices, Inc. [AMD] Family 15h Processor Function 3 [1022:1603] +-18.4 Advanced Micro Devices, Inc. [AMD] Family 15h Processor Function 4 [1022:1604] \-18.5 Advanced Micro Devices, Inc. [AMD] Family 15h Processor Function 5 [1022:1605] Superiotool output: superiotool r6637 Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x2e... Found ITE IT8721F (id=0x8721, rev=0x1) at 0x2e No dump available for this Super I/O Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x164e... Failed. Returned data: port=0xff, port+1=0xff Probing for Nuvoton Super I/O at 0x164e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x2e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x4e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found. Probing for Server Engines Super I/O at 0x2e... Failed. Returned data: id=0xffff, rev=0xff flashrom output: flashrom v0.9.9-rc1-r1942 on Linux 4.10.0-38-generic (x86_64) flashrom is free software, get the source code at https://flashrom.org flashrom was built with libpci 3.3.1, GCC 5.3.1 20160225, little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 1 usecs, 1368M loops per second, 10 myus = 10 us, 100 myus = 103 us, 1000 myus = 1001 us, 10000 myus = 10103 us, 4 myus = 5 us, OK. Initializing internal programmer No coreboot table found. Using Internal DMI decoder. DMI string chassis-type: "Desktop" DMI string system-manufacturer: "To be filled by O.E.M." DMI string system-product-name: "To be filled by O.E.M." DMI string system-version: "To be filled by O.E.M." DMI string baseboard-manufacturer: "ASUSTeK COMPUTER INC." DMI string baseboard-product-name: "M5A97 R2.0" DMI string baseboard-version: "Rev 1.xx" Found ITE Super I/O, ID 0x8721 on port 0x2e Found chipset "AMD SB7x0/SB8x0/SB9x0" with PCI ID 1002:439d. Enabling flash write... SPI base address is at 0xfec10000 SB8xx/SB9xx/Hudson-1 detected. SpiRomEnable=1, PrefetchEnSPIFromIMC=0, PrefetchEnSPIFromHost=1 (0x0f4c2105) SpiArbEnable=1, SpiAccessMacRomEn=1, SpiHostAccessRomEn=0, ArbWaitCount=7, SpiBridgeDisable=1, SpiBusy=0 ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access. ROM strap override is not active PROBLEMS, continuing anyway The following protocols are supported: LPC, FWH. Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH00B4, 512 kB: probe_82802ab: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH004, 512 kB: probe_82802ab: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10ms/40us. probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW080, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0x0b, id2 0xff, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Mainboard specs: https://www.asus.com/us/Motherboards/M5A97_R20/ Note: I used the tools available from the Ubuntu 16.04 repositories. If something looks wrong because of my use of outdated tools inform me and I'll try again with newer tools.

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Re: [coreboot] KGPE-D16 AMD-vi fails because combined sata is enabled
by Taiidan＠gmx.com 12 Nov '17

12 Nov '17

Hmm it works for me on Xen 4.10 (I don't normally use xen but I installed it to check for you) (XEN) AMD-Vi: Disabled HAP memory map sharing with IOMMU (XEN) AMD-Vi: IOMMU 0 Enabled. (XEN) I/O virtualisation enabled (XEN) - Dom0 mode: Strict (XEN) Interrupt remapping enabled Btw does anyone know what the difference is between strict and relaxed dom0 mode?

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Re: [coreboot] 2nd attempt: Coreboot + Windows (with Resume working)
by Matt DeVillier 11 Nov '17

11 Nov '17

On Sat, Nov 11, 2017 at 4:03 AM, [799] via coreboot <coreboot(a)coreboot.org> wrote: > Hello, > > I had to reflash my stock original BIOS after I couldn't get Sleep&Resume > working on my Lenovo X230. > > I am in a situation where I was able to get 2 situations: > > 1) Situation 1: > working sleep+resume in Linux. > Additional Payloads works. > Booting into windows (I have a dual boot setup) results in a black screen > (no video output) > I assume you're using native graphics init here? In the non-VBIOS init case, the Intel Windows driver expects that the IGD OpRegion ACPI data will be valid/populated, and one of the things needed is the VBT (video bios table) data. This data can be extracted by coreboot from an included (but not executed) VBIOS, or via a separate vbt.bin file. Without one of these two options, you get a black screen. There might also be some other fields in the IGD OpRegion that need to be set correctly. I have all of this working in my own tree, but haven't had a chance to determine which are essential and upstream them. > > 2) Situation 2: > Extracting the BLOBs from the original ROM and adding them to my Coreboot > Bios and using SeaBIOS I was able to boot into windows with graphics. > Unfortunately this breaks: > - Sleep & Resume > - additional Payloads won't work > define "breaks sleep and resume." Breaks how? what OS(es)? Are you re-running the VBIOS on S3 resume? If so, I'd deselect that option/ > > As I really need to get sleep & resume working an I also want to be able > to boot into windows for special use cases (business) I want to rebuild > Coreboot from scratch. > Unfortunately I did so several times, no results. > > I don't think that the Use Case "Coreboot + Windows + Sleep Resume" is so > uncommon and would like to hear if someone has a running setup and what you > did to make it work. > I have suspend/resume working under both Windows and Linux, using the following: VBIOS + SeaBIOS NGI + vbt.bin + SeaBIOS NGI + vbt.bin + Tianocore VBIOS + Tianocore vbt.bin + UEFI GOP driver + Tianocore so it's just figuring out what you're missing > > Giving up sleep/resume to get the additional freedom of Coreboot is a big > trade-off. > > Regards > > [799] > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot >

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Re: [coreboot] 2nd attempt: Coreboot + Windows (with Resume working)
by Taiidan＠gmx.com 11 Nov '17

11 Nov '17

I am sure someone here has this working and should reply soon but I want to add this - I assume you can't use a windows VM due to the crappy emulated 3d graphics driver performance: Something cool you can do is get an eGPU setup (I got mine from bplus taiwan) so that you can have another "computer" on your laptop by assigning the eGPU to a windows VM with IOMMU-GFX (and thus you can play games and use 3d apps in that windows VM).

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Coreboot support on H8SGL-F
by Lucian Cojocar 11 Nov '17

11 Nov '17

Hi, Is coreboot working on the H8SGL-F motherboard[1] with AMD Opteron 6168 (10h Family)? I know there is support for the H8SCM-F[2] board, which is very similar. The only difference between the two boards seems to be the socket. It seems there was some interest in this direction a while back ago[3]. Thanks, Lucian [1]H8SGL-F motherboard, http://www.supermicro.com/Aplus/motherboard/Opteron6100/SR56x0/H8SGL-F.cfm [2]H8SCM-F motherboard, http://www.supermicro.nl/Aplus/motherboard/Opteron4000/SR56x0/H8SCM-F.cfm [3]https://mail.coreboot.org/pipermail/coreboot/2013-April/075629.html

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Verify option rom non-execution?
by Taiidan＠gmx.com 11 Nov '17

11 Nov '17

Hi! how can I verify the non-execution of option roms? I recently noticed that I had somehow turned that on with one of my latest compiles (without yabel secure mode either) The idea is that a hostile firmware update could flash a PCI-e card assigned to a VM and then mess with the host after the PC is rebooted (can be solved by using SR-IOV devices, but KGPE-D16/KCMA-D8 lacks SR-IOV support in coreboot despite the chipset supporting ARI) I realize that I am a nobody and this is very unlikely to happen but OFC I still want max security >:3

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2nd attempt: Coreboot + Windows (with Resume working)
by [799] 11 Nov '17

11 Nov '17

Hello, I had to reflash my stock original BIOS after I couldn't get Sleep&Resume working on my Lenovo X230. I am in a situation where I was able to get 2 situations: 1) Situation 1: working sleep+resume in Linux. Additional Payloads works. Booting into windows (I have a dual boot setup) results in a black screen (no video output) 2) Situation 2: Extracting the BLOBs from the original ROM and adding them to my Coreboot Bios and using SeaBIOS I was able to boot into windows with graphics. Unfortunately this breaks: - Sleep & Resume - additional Payloads won't work As I really need to get sleep & resume working an I also want to be able to boot into windows for special use cases (business) I want to rebuild Coreboot from scratch. Unfortunately I did so several times, no results. I don't think that the Use Case "Coreboot + Windows + Sleep Resume" is so uncommon and would like to hear if someone has a running setup and what you did to make it work. Giving up sleep/resume to get the additional freedom of Coreboot is a big trade-off. Regards [799]

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Re: [coreboot] ast2400 / ast2500
by Taiidan＠gmx.com 11 Nov '17

11 Nov '17

On 10/20/2017 10:00 PM, Tirumalesh wrote: > Thanks for the information. > > As I understand correctly, the main support is for x86 only. So if we want to run coreboot as the only firmware, we have to do it our self. > Coreboot supports ARM, which is the usual BMC processor of choice - although as I have said you'd be much better off porting OpenBMC (preferably the better IBM version for even more features) and having a management stack ready to go vs having to make your own with coreboot (this is the first time I have heard of that)

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How to use setpci to enable ARI on a root port? (KGPE-D16/SR5690 northbridge)
by Taiidan＠gmx.com 11 Nov '17

11 Nov '17

The developers documentation for the KGPE-D16's SR5690 northbridge says it supports ARI but coreboot doesn't implement this and I lack the knowledge to DIY as there isn't any documentation on the internet as to how to do the PCI flags etc. I want to know how to enable this so I can use SR-IOV and it seems one can do so with the "setpci" command. If anyone has the skills to add PCI-e ARI to coreboot myself and others would be eternally grateful - it would make the D8 and D16 so much better. Thnx :D

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coreboot November 2017