coreboot November 2017

coreboot@coreboot.org

61 participants
110 discussions

Where do we stand for Thinkpad X230 Tablet?
by Keith Hui 25 Nov '17

25 Nov '17

Hi coreboot, I am still using the Thinkpad X230 Tablet I first mentioned in 2012. [1] Now we have pretty decent support for Thinkpad X230, but it seems to be for the regular variant, with only a passiing mention of digitizer working on X230T. Mine is now set up for UEFI booting. So, where do we stand on support for UEFI (Tianocore?) and coreboot x230? Can I use the same build for both X230 and X230T? What else would I miss? Except the wifi whitelist, my X230T has been better than all my previous laptops. I know I need to find a SOIC8 test clip and a SPI programmer (I think I'll try an Arduino solution first, with a Mega 2560 lying around) and most of what I need to do to build a working image. Appreciate any insights. Keith [1] https://mail.coreboot.org/pipermail/coreboot/2012-September/071499.html

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Re: [coreboot] ASUS P2-99 with P2B config
by Branden Waldner 25 Nov '17

25 Nov '17

I tried the acpi patches again, and this time it worked properly. I don't know if I had just missed running make clean, ended up flashing the wrong rom with aflash, or messed something else up. As for flashrom, I'd posted logs from my attempts at running it on its mailing list

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Re: [coreboot] booting from msata on t420/how to change boot order
by Arian Sanusi 24 Nov '17

24 Nov '17

Hi Marcus, I have a running T420 with coreboot running from an msata ssd. Works like a charm. However, I have grub as payload. Do you intend to run windows, or why do you want seabios? Hope that helps. Cheers, Ari

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booting from msata on t420/how to change boot order
by Marcus Walsh 24 Nov '17

24 Nov '17

Hi, I see on the wiki that mSATA works on the T420. I am wondering has anyone tried booting from an msata drive? was seaBIOS able to detect the mSATA drive? Also how would I go about changing the default boot order for coreboot? Thanks

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BIOS log in coreboot
by ingegneriaforense＠alice.it 23 Nov '17

23 Nov '17

Normal 0 14 false false false IT X-NONE X-NONE MicrosoftInternetExplorer4 Hello Guys ! I apologize with you if my question seems silly: can you tell me if Coreboot stores a log of the POST phase in its EPROM memory ? If so, is it possible to retrive the log by the Operative System and read it ? Thanks in advance. Vincenzo. /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Tabella normale"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-priority:99; mso-style-qformat:yes; mso-style-parent:""; mso-padding-alt:0cm 5.4pt 0cm 5.4pt; mso-para-margin:0cm; mso-para-margin-bottom:.0001pt; mso-pagination:widow-orphan; font-size:11.0pt; font-family:"Calibri","sans-serif"; mso-ascii-font-family:Calibri; mso-ascii-theme-font:minor-latin; mso-fareast-font-family:"Times New Roman"; mso-fareast-theme-font:minor-fareast; mso-hansi-font-family:Calibri; mso-hansi-theme-font:minor-latin; mso-bidi-font-family:"Times New Roman"; mso-bidi-theme-font:minor-bidi;} Forensic Consultant Tribunale di Lecce Studio: Strada di Garibaldi - Contrada Paradisi 73010 Lequile (LE) cell: 339.7968555 skype: vincenzo.di_salvo

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Question about Qemu and Tianocore
by 戴，曉政 22 Nov '17

22 Nov '17

從 Windows 10 的郵件傳送 Dear All, I use qemu and tianocore payload to research coreboot but I found qemu can not show vga message in bios post phase. I found tianocore function named“gST->ConOut->OutputString( )”can not show any string on qemu screen under bios post phase, I already add vbios named“vgabios-cirrus.bin”by“make menuconfig”, anyone can tell me how to bring up qemu vga so that show gST->ConOut->OutputString( )”message on qemu screen under post time, my qemu setting as below : qemu-system-x86_64 -machine accel=kvm:tcg -bios build/coreboot.rom -vga cirrus -m 2048 -drive file=/dev/sdb,index=0,media=disk,format=raw P.S. My virtualbox does not install kvm Best Regard --- Avast 防毒軟體已檢查此封電子郵件的病毒。 https://www.avast.com/antivirus

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blobs: is there a reason for intel microcode version 20150121?
by Martin Kepplinger 21 Nov '17

21 Nov '17

Since there are many releases of Intel's cpu microcode since 2015-01, I was wondering if there's a reason why coreboot, if at all, uses this one. I know very little about it really. It may well be potentially bad to simply use the latest version, but in case it's really only because nobody did it, I might prepare a patch to use downloadmirror.intel.com/27337/eng/microcode-20171117.tgz instead (someday, after I testing it on my device). thanks martin

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Re: [coreboot] blobs: is there a reason for intel microcode version 20150121?
by Martin Kepplinger 21 Nov '17

21 Nov '17

Am 21.11.2017 12:42 schrieb Zoran Stojsavljevic: >> I know very little about it really. It may well be potentially bad > to simply use the latest version, >> but in case it's really only because nobody did it, I might prepare > a patch to use >> downloadmirror.intel.com/27337/eng/microcode-20171117.tgz [1] > instead (someday, after >> I testing it on my device). > > To understand what is really going on, I did the following > investigation on my only coreboot clone version, > I have on my current SSD the following: WIN10, using VMware® > Workstation 12 Player, version 12.5.8 build-7098237 > with Fedora 26 VM, where the coreboot is located. > > CLI transcript follows: > > _[user@localhost coreboot]$ pwd_ > _/home/user/projects/coreboot/coreboot_ > _[user@localhost coreboot]$ git describe_ > _4.5-1006-gef7e98a2ac_ > _[user@localhost coreboot]$ grep -r 20150121 *_ > _3rdparty/blobs/cpu/intel/microcode/update-microcodes.sh:MICROCODE_VERSION=20150121_ > _[user@localhost coreboot]$ cd 3rdparty/blobs/cpu/intel/microcode_ > _[user@localhost microcode]$ ls -al_ > _total 24_ > _drwxrwxr-x. 2 user user 12288 Nov 21 12:27 ._ > _drwxrwxr-x. 24 user user 4096 Feb 18 2017 .._ > _-rwxrwxr-x. 1 user user 1782 Feb 18 2017 microcode2bin.sh_ > _-rwxrwxr-x. 1 user user 2989 Nov 21 12:27 update-microcodes.sh_ > _[user@localhost microcode]$ tail -10 update-microcodes.sh _ > _}_ > > _get_microcode_ > _separate_microcode_ > _move_microcode_ > _DUMP_CPUIDS <<=========================== I ADDED THIS LINE OF CODE > TO SEE WHICH CPUIDS'S MCUS ARE ADDED HERe: _ > > _rm -f $MICROCODE_ARCHIVE_ > _rm -f $MICROCODE_FILE_ > > _[user@localhost microcode]$ _ > > Now, you can substitute 20150121.tgz with 20171117 [1].tgz in bash > shell script update-microcodes.sh and see what will happen?! > That's not enough. The integers in the url of https://review.coreboot.org/cgit/blobs.git/tree/cpu/intel/microcode/update-… change aswell, not just MICROCODE_VERSION. So if you're suggesting that a download fails, that's not the issue. But maybe I got you wrong. Anyways, I haven't tried to change and run it. I might. so... thanks martin

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Re: [coreboot] ASUS P2-99 with P2B config
by Branden Waldner 21 Nov '17

21 Nov '17

I'm not sure that I'm setting up the acpi patches correctly then. I had just ran: git fetch https://review.coreboot.org/coreboot refs/changes/73/22473/1 && git checkout FETCH_HEAD originally. I think I had run make clean as well. I tried doing: git fetch https://review.coreboot.org/coreboot refs/changes/71/21671/2 && git fetch https://review.coreboot.org/coreboot refs/changes/73/22473/1 && git checkout FETCH_HEAD but I don't know if that's how it's supposed to work. My experience with git is just using it to pull trunk versions of software and that's about it. I finally started to read Pro Git though, to try to actually learn how git works.

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Re: [coreboot] What’s the release plan for coreboot 4.7?
by Martin Roth 20 Nov '17

20 Nov '17

The release will be happening, but I haven't had time to get it done. Mainly we need to find someone to do the release notes. If we have any volunteers to wade through the 2000+ changes and write something up, I'd be glad to walk you through the process of what needs to be done. Martin On Mon, Nov 20, 2017 at 2:42 PM, Youness Alaoui <kakaroto(a)kakaroto.homelinux.net> wrote: > Hi, > > What happened with the plan for the 4.7 release? I thought it was > supposed to be out at the end of October, now we're approaching the > end of November. > Was it forgotten, delayed or cancelled ? If delayed, what's the > blocking issue ? > > Thanks, > Youness. > > On Wed, Oct 4, 2017 at 11:24 AM, Martin Roth <gaumless(a)gmail.com> wrote: >> The release will happen towards the end of the month. Generally I >> try to have the release scheduled a bit before the month ends so >> there's a little room to slip. I'll sit down this weekend and start >> sorting out where we are and send out another email with release >> plans. >> >> If there are any bugs in the bug tracker that people would >> specifically like help with getting fixed before the next release, >> please reply here. >> >> If developers could take a look at coverity and see if there are any >> issues there that they can fix, that would be great. >> >> Please start testing any boards that you have and uploading the >> results to the board-status repo so we know what's working. If you >> have boards that don't boot, please reply here, and try to bisect the >> issue to find where it stopped working. >> >> Martin >> >> >> >> On Tue, Oct 3, 2017 at 9:33 AM, Paul Menzel >> <paulepanter(a)users.sourceforge.net> wrote: >>> Dear coreboot folks, >>> >>> >>> It’s October and coreboot 4.7 is supposed to be tagged in this month. >>> >>> Are there more specific plans already, when the release will happen? >>> >>> >>> Thanks, >>> >>> Paul >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> https://mail.coreboot.org/mailman/listinfo/coreboot >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot

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coreboot November 2017