coreboot January 2017

coreboot@coreboot.org

75 participants
186 discussions

Lenovo T410 Coreboot
by A. Veek 14 Dec '18

14 Dec '18

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Re: [coreboot] No VGA output on e350m1 after flashing. what to do?
by Reiner Luett 12 Sep '17

12 Sep '17

Hi! On 30.06.2013 19:28, Christian Weinz wrote: > Maybe I didn't include the VGA option in the make menuconfig process. > How can I solve this problem? You need to add the VGA Option ROM (VGA BIOS -> Add VGA BIOS image). I've extracted it from the UEFI, but you also could use these: http://www.coreboot.org/index.php?title=ASRock_E350M1&oldid=11114 at the end of the page or you also may be able to use the default AMD fam14 (Persimmon) vbios. You will need to agree to the click through: http://wwwd.amd.com/support/vbioslic.nsf/userverify?openform http://www.coreboot.org/AMD_DB-FT1_PERSIMMON It's a pity, that bios_extract didn't work for now. You could use the AMI Aptio EFI MMTool with wine: http://win-lite.de/benutzer/fernando/BIOS-Tools/AMI_Aptio_EFI_MMTool_v4.50.… You need to extract OntarioEFIVbios with PCI ID 1002,9802 as Option ROM. Regards, Reiner --

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Re: [coreboot] KGPE-D16 BMC Port Offer (was: Fund a TALOS Secure Workstation as coreboot build system)
by Timothy Pearson 17 Apr '17

17 Apr '17

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 01/19/2017 11:36 AM, Martin Roth wrote: > Hey Merlin, > I was taking and keeping track of the pledges for Talos, so I'd be > happy to continue. > > Martin I just wanted to bring this back up for discussion. Raptor is chipping in funding for over half of the development work, and Martin is matching pledges, so if there's interest in this port your contributions will go a long way, but it still depends on community interest. Are you willing to contribute to this development project? It is a limited time offer, so the quicker we can reach the relatively low goal to get this work underway the better. :-) Thanks! - -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 (direct line) +1 (512) 690-0200 (switchboard) https://www.raptorengineering.com -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJYijUnAAoJEK+E3vEXDOFbQKAIAKPqeHZylATs3aZXC2QeTmUG p0bnwfU4G+0qkXEwApoYk+y8WRKEkhBsug5EvzEXw65fAAmwi4COVjUBvm2l9kUI m3/51sfrZRpo+H8c1lXld0WiwomTGapm9FX3rqAjLZn354TOqnrfoGYoJQC+ovKm 0AYXCGN8fmWkr6nTj9Q1tWwxEXrRv48YudF8bDFZhbMjOswnagNzImQNTC6wLgnY +7UyqBgpihc8vh3GoGuPQT1mNpAtUwv1PS8HFGnDO86zW9gWB7+xHEGBhMyy+Rys CTNWkI15X4dy8pz6XIsqjuBNSUcgTnVVAelecdm1BfykpgSyPyOf/39JQc/O41M= =HzeR -----END PGP SIGNATURE-----

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CPU Turbo [KGPE-D16]
by Taiidan＠gmx.com 16 Mar '17

16 Mar '17

I am wondering as to: * Why 6274 cpu refuses to turbo to the second turbo state with half of the cores in use (it stops around 100mhz before the first turbo state) * Is it possible to force enable second turbo state for all cpu cores, assuming adequate cooling? Or is it controlled on the CPU itself? Off topic but would rather not make another thread: * Does NUMA ram alignment matter performance wise with only one physical CPU? (RAM being split half and half per core set at the moment) * Does anyone know where I could get a reasonably priced 6287SE or 6284SE? or (even better) an engineering model of 62xx?

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Saving truncated preram CBMEM messages
by Paul Menzel 12 Feb '17

12 Feb '17

Dear coreboot folks, looking at the coreboot CBMEM console messages board status repository, you’ll find a lot of truncated preram CBMEM console messages. Currently the buffer size is 0xc00 – 3 kB, right –, which is too small for quite some boards. The mainboard *Kabylake LPDDR3 RVP3* overrides it to 0xd00. So I am thinking about increasing it [1], but it’s of course not that simple, especially as I don’t understand all the implications. > Increasing this buffer reduces amount of available CAR stack, and > apparently DDR3 raminit already struggles with the amount of > cachelines available on fam10/15 My first question is, what other downsides are there of increasing the buffer size? I assume it’s unrelated to resulting usable RAM size, as RAM sizes nowadays are much, much bigger? So would one megabyte be reasonable/possible as a goal on boards supporting that? So if their is consensus that it should be increased, what would a way be forward? I assume, overriding it per mainboard is not so useful, as these messages are mostly from the chipset, so it should be chipset dependent? Should that option be moved there? Thanks, Paul [1] https://review.coreboot.org/18049/ "arch/x86: Increase preram CBMEM console buffer size"

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Best supported modern laptop?
by Philipp Stanner 07 Feb '17

07 Feb '17

I'm going to buy a new laptop soon (has to have a touchscreen) and am considering buying one which supports coreboot. Which model would that be? >From what the wiki tells me The X220 is supported best, thanks to Vladimir, but also the X201 is listed in the green area. The wiki lists some noticeable issues for the X201, though. Still it's green. Are those issues (especially "The X201 immedeatly powers off after resuming from suspend resulting a completely lost session sometimes (Race condition)" still unsolved? thx

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ASUS KGPE-D16 Automated Test Failure [master]
by Raptor Engineering Automated Coreboot Test Stand 31 Jan '17

31 Jan '17

The ASUS KGPE-D16 fails verification for branch master as of commit 78a5f22994da63bb02882aacb68cbbb70c2606ac The following tests failed: BOOT_FAILURE Commits since last successful test: 78a5f22 build system: mark sub-make invocations as parallelizable be182ad util/xcompile: parallelize compiler checks See attached log for details This message was automatically generated from Raptor Engineering's ASUS KGPE-D16 test stand Want to test on your own equipment? Check out https://www.raptorengineering.com/content/REACTS/intro.html Raptor Engineering also offers coreboot consulting services! Please visit https://www.raptorengineering.com for more information Please contact Timothy Pearson at Raptor Engineering <tpearson(a)raptorengineering.com> regarding any issues stemming from this notification

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R: Re: !IS_TOP_ALIGNED_ADDRESS failure
by giuseppe.ferrigni＠inwind.it 31 Jan '17

31 Jan '17

Hi Marshall, thanks a lot for your advice. It works great! This week I'll receive the flash programmer and then I'll start to test everything! Giuseppe ----Messaggio originale---- Da: "Marshall Dawson" <marshalldawson3rd(a)gmail.com> Data: 30/01/2017 16.51 A: "giuseppe.ferrigni(a)inwind.it"<giuseppe.ferrigni(a)inwind.it> Cc: "coreboot"<coreboot(a)coreboot.org> Ogg: Re: [coreboot] !IS_TOP_ALIGNED_ADDRESS failure Hi Giuseppe, When you try building by setting different mainboards, are you running make distclean between those attempts? If not, you can easily wind up with a .config where settings and options aren't appropriate for your board. For your Sapphire system, the AMD Bettong board might be close enough to get you started. If you want to give it a shot, you can try the following. Make sure you have some method for reflashing your original BIOS, of course, because this probably won't work initially. 1) Create a .config file using the following CONFIG_USE_BLOBS=y CONFIG_VENDOR_AMD=y CONFIG_VGA_BIOS_ID="1002,9874" CONFIG_VGA_BIOS=y CONFIG_VGA_BIOS_FILE="3rdparty/blobs/northbridge/amd/00660F01/CarrizoGenericVbios.bin" CONFIG_HUDSON_UART=y CONFIG_VGA_ROM_RUN=y 2) Run make olddefconfig 3) I've assumed the board's two serial connectors are connected to the APU and not on a SuperIO (CONFIG_HUDSON_UART=y). Unfortunately, the Merlin Falcon binaryPI has a "feature" that prevents this from working. Ricardo has an easy workaround to allow the UART to function. Cherry-pick the patch here: https://review.coreboot.org/#/c/17924/ Thanks, Marshall On Sun, Jan 29, 2017 at 5:50 PM, giuseppe.ferrigni--- via coreboot <coreboot(a)coreboot.org> wrote: Hello to all, I'm getting confidence with coreboot for the first time. I followed instruction in the "Lesson1" article for a very basic build and everything gone well. Now I'm trying to build coreboot for a real board (amd ipc_fp4_dp not present in current release) but setting several mainbord devices results in different errors. One of these is the following: cbfstool: /home/oxboxes/coreboot/util/cbfstool/cbfstool_image.c:666: cbfs_add_entry: Assertion '' !IS_TOP_ALIGNED_ADDRESS(content_offset)' failed Due to lack of tutorial to understand the coreboot structure, can someone help me to understand why the building process fail? Giuseppe -- coreboot mailing list: coreboot(a)coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

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!IS_TOP_ALIGNED_ADDRESS failure
by giuseppe.ferrigni＠inwind.it 30 Jan '17

30 Jan '17

Hello to all, I'm getting confidence with coreboot for the first time. I followed instruction in the "Lesson1" article for a very basic build and everything gone well. Now I'm trying to build coreboot for a real board (amd ipc_fp4_dp not present in current release) but setting several mainbord devices results in different errors. One of these is the following: cbfstool: /home/oxboxes/coreboot/util/cbfstool/cbfstool_image.c:666: cbfs_add_entry: Assertion '' !IS_TOP_ALIGNED_ADDRESS(content_offset)' failed Due to lack of tutorial to understand the coreboot structure, can someone help me to understand why the building process fail? Giuseppe

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Lenovo T410s
by Stefan Tauner 30 Jan '17

30 Jan '17

Hi, Nicolas Reinecke ported the x201 coreboot code to support the T410s many moons ago (during/after the Prague hackathon). Eventually I came around to test it and it boots fine into Linux with a GRUB2 payload and memtest works fine too. I had to forward port it and add some changes done to similar boards but nothing too complicated. SeaBIOS currently does not boot for unknown reasons and due to missing debug output this will be rather unpleasant to figure out. One thing I am currently looking at and where I am pretty stuck is ACPI. At boot Linux prints the following lines: [ 0.222549] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.222704] ACPI Exception: AE_NOT_FOUND, Could not execute arguments for [GNVS] (Region) (20150930/nsinit-355) [ 0.222972] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.223125] ACPI Error: Method parse/execution failed [\_SB._INI] (Node ffff88012f499280), AE_NOT_FOUND (20150930/psparse-542) [ 0.223505] ACPI : EC: EC started [ 0.223608] ACPI: Interpreter enabled [ 0.223683] ACPI: (supports S0 S3 S4 S5) [ 0.223739] ACPI: Using IOAPIC for interrupt routing [ 0.223822] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug [ 0.227171] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.227326] ACPI Error: Method parse/execution failed [\_SB.PCI0.LPCB.HPET._STA] (Node ffff88012f4ac9d8), AE_NOT_FOUND (20150930/psparse-542) [ 0.227542] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.227693] ACPI Error: Method parse/execution failed [\_SB.PCI0.LPCB.HPET._STA] (Node ffff88012f4ac9d8), AE_NOT_FOUND (20150930/psparse-542) […] [ 0.247375] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.247536] ACPI Error: Method parse/execution failed [\_SB.PCI0.LPCB.HPET._STA] (Node ffff88012f4ac9d8), AE_NOT_FOUND (20150930/psparse-542) [ 0.247810] ACPI: PCI Root Bridge [UNCR] (domain 0000 [bus ff]) [ 0.247875] acpi PNP0A03:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] [ 0.247968] acpi PNP0A03:00: _OSC failed (AE_NOT_FOUND); disabling ASPM […] [ 0.267614] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active) [ 0.268028] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.268183] ACPI Error: Method parse/execution failed [\_SB.PCI0.LPCB.HPET._STA] (Node ffff88012f4ac9d8), AE_NOT_FOUND (20150930/psparse-542) […] [ 0.994884] ACPI: Power Button [PWRF] [ 0.995007] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.995162] ACPI Error: Method parse/execution failed [\_PR.CP00._TPC] (Node ffff88012f4ad5f0), AE_NOT_FOUND (20150930/psparse-542) [ 0.995419] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.995610] ACPI Error: Method parse/execution failed [\_PR.CP01._TPC] (Node ffff88012f4ad758), AE_NOT_FOUND (20150930/psparse-542) [ 0.995850] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.996003] ACPI Error: Method parse/execution failed [\_PR.CP02._TPC] (Node ffff88012f4ad8c0), AE_NOT_FOUND (20150930/psparse-542) [ 0.996237] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 0.996390] ACPI Error: Method parse/execution failed [\_PR.CP03._TPC] (Node ffff88012f4ada28), AE_NOT_FOUND (20150930/psparse-542) […] [ 1.058181] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 1.058339] ACPI Error: Method parse/execution failed [\_PR.CP00._PPC] (Node ffff88012f4ad528), AE_NOT_FOUND (20150930/psparse-542) [ 1.058619] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 1.058773] ACPI Error: Method parse/execution failed [\_PR.CP01._PPC] (Node ffff88012f4ad690), AE_NOT_FOUND (20150930/psparse-542) [ 1.059040] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 1.059192] ACPI Error: Method parse/execution failed [\_PR.CP02._PPC] (Node ffff88012f4ad7f8), AE_NOT_FOUND (20150930/psparse-542) [ 1.059454] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 1.059617] ACPI Error: Method parse/execution failed [\_PR.CP03._PPC] (Node ffff88012f4ad960), AE_NOT_FOUND (20150930/psparse-542) Also, at suspend from S3 (which worked OK so far), I also get the messages about \PR: [ 239.588752] ACPI: Low-level resume complete [ 239.588798] ACPI : EC: EC started [ 239.588799] PM: Restoring platform NVS memory [ 239.589150] Enabling non-boot CPUs ... [ 239.608626] x86: Booting SMP configuration: [ 239.608627] smpboot: Booting Node 0 Processor 1 APIC 0x1 [ 239.611159] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.611168] ACPI Error: Method parse/execution failed [\_PR.CP01._PPC] (Node ffff88012f4ad690), AE_NOT_FOUND (20150930/psparse-542) [ 239.611212] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.611217] ACPI Error: Method parse/execution failed [\_PR.CP01._TPC] (Node ffff88012f4ad758), AE_NOT_FOUND (20150930/psparse-542) [ 239.611250] cache: parent cpu1 should not be sleeping [ 239.611415] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.611419] ACPI Error: Method parse/execution failed [\_PR.CP01._PPC] (Node ffff88012f4ad690), AE_NOT_FOUND (20150930/psparse-542) [ 239.611440] CPU1 is up [ 239.628643] smpboot: Booting Node 0 Processor 2 APIC 0x4 [ 239.631102] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.631109] ACPI Error: Method parse/execution failed [\_PR.CP02._PPC] (Node ffff88012f4ad7f8), AE_NOT_FOUND (20150930/psparse-542) [ 239.631159] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.631164] ACPI Error: Method parse/execution failed [\_PR.CP02._TPC] (Node ffff88012f4ad8c0), AE_NOT_FOUND (20150930/psparse-542) [ 239.631199] cache: parent cpu2 should not be sleeping [ 239.631365] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.631369] ACPI Error: Method parse/execution failed [\_PR.CP02._PPC] (Node ffff88012f4ad7f8), AE_NOT_FOUND (20150930/psparse-542) [ 239.631390] CPU2 is up [ 239.648678] smpboot: Booting Node 0 Processor 3 APIC 0x5 [ 239.651193] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.651201] ACPI Error: Method parse/execution failed [\_PR.CP03._PPC] (Node ffff88012f4ad960), AE_NOT_FOUND (20150930/psparse-542) [ 239.651248] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.651252] ACPI Error: Method parse/execution failed [\_PR.CP03._TPC] (Node ffff88012f4ada28), AE_NOT_FOUND (20150930/psparse-542) [ 239.651285] cache: parent cpu3 should not be sleeping [ 239.651445] ACPI Error: [NVSA] Namespace lookup failure, AE_NOT_FOUND (20150930/psargs-359) [ 239.651449] ACPI Error: Method parse/execution failed [\_PR.CP03._PPC] (Node ffff88012f4ad960), AE_NOT_FOUND (20150930/psparse-542) [ 239.651471] CPU3 is up [ 239.653717] ACPI: Waking up from system sleep state S3 I tried to figure at least the latter out but couldn't. AFAICT the port uses cpu/intel/model_206ax/acpi/cpu.asl similar to other board from its era (although it hosts CPUs from the previous model_20656 generation). Another thing that I would like to add is support for 8 GB DIMMs (and thus 16 GB of total RAM) which I think should theoretically work on this hardware. I have tested an 8 GB DIMM in a W510 (with a Clarksfield i7-820QM CPU and four DIMM slots) with its vendor firmware and it's working fine there. My T410s has an Arrandale i5-520. cpuid and /proc/cpuinfo reports a maximum physical address bits of 0x24 (36) on both systems (indicating a maximum RAM of 64 GB AFAICT). The DIMM in question does not work with the Lenovo firmware in the T410s and fails during memory training with coreboot. Is this futile and simply not supported on this hardware? Why and how to tell? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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coreboot January 2017