coreboot July 2016

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135 discussions

Re: [coreboot] ARM Trusted Firmware build issue
by Paul Kocialkowski 13 Jul '16

13 Jul '16

Hi, Le mercredi 13 juillet 2016 à 08:57 -0600, Martin Roth a écrit : > Thanks for posting about this. I've spent some time looking into > this as well, but in my usual fashion, I didn't communicate what I > found in a responsible fashion. Here's what I posted in a code > review: Looks like I didn't search long enough to find this ;) > > The current binutils (2.26) is failing to build the current arm-trusted- > > firmware. > > … [View More]This wasn't caught because the jenkins builders haven't been updated to the > > latest build tools. I tested the new release of binutils (2.26.1) and the > > update > > didn't help my build. There's a patch that should fix the issue - See this > > thread for an explanation of the issue and the patch: > > > > https://www.mail-archive.com/linaro-toolchain%40lists.linaro.org/msg05685.ht > > ml > > > > Unfortunately, a different change went into 2.26.1 at that location, so this > > patch > > doesn't directly apply. > > For some reason, I didn't directly test that patch with 2.26 to see if > it actually worked - I tried adding it in to 2.26.1, which did not > help. I'll test it with 2.26 today, and add the patch into the > toolchain build if it works. From what I understood, that patch only allows the build to work when removing the extra 0 to .align (so using ".align x" instead of ".align x, 0"). And it was indeed crafted for an older GAS version. For 2.26, it doesn't apply either and a similar fix was already included, so the workaround above does work. But again, we can't easily patch ATF… > We can't roll the entire toolchain back to binutils 2.25 because of > the RISC-V work. Indeed. > Is it reasonable to roll back to binutils 2.25 for just the ARM toolchain > builds? Someone should definitely try that, I have no idea whether it's a good idea off- hand. If anyone does, please speak up :) I'm running out of time these days, but if nobody else does it, I'll probably have a go at it this week-end. > And then I need to update the toolchains on the builders and figure > out how to keep them up-to-date so this doesn't happen again. That would be nice! > Sorry I didn't post this directly to the mailing list earlier. No problem, it was fun to dig into it. Also, since the affected devices are not public, I guess it doesn't really bother anyone. I just happened to look at it when submitting a crossgcc change, which comes out as unstable because of this issue, but that's about it. Cheers, Paul > On Wed, Jul 13, 2016 at 2:35 AM, Paul Kocialkowski <contact(a)paulk.fr> wrote: > > We spent some time yesterday evening on IRC investigating why the ARM > > Trusted > > Firmware (ATF) doesn't build with the current toolchain from coreboot's > > crossgcc. > > > > It turns out it is a complex issue on the assembler's side. I have opened a > > bug > > upstream about it, with all the details we could find: > > https://sourceware.org/bugzilla/show_bug.cgi?id=20364 > > > > This regression was introduced with binutils 2.26. To get the build going in > > the > > short term, we could either downgrade binutils back to 2.25 (if it still > > meets > > all dependencies from other tools) or patch ATF to replace the ".align x, 0" > > directives to ".align x" in include/common/asm_macros.S (not sure this is a > > possibility). > > > > Cheers, > > > > -- Paul Kocialkowski, developer of low-level free software for embedded > > devices > > > > Website: https://www.paulk.fr/ > > Coding blog: https://code.paulk.fr/ > > Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/ > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > https://www.coreboot.org/mailman/listinfo/coreboot [View Less]

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Re: [coreboot] Help on setting clock speed in coreboot
by Zoran Stojsavljevic 13 Jul '16

13 Jul '16

Mayuri, Yes, the easiest way to check if your custom HW is working, to try TX/RX using Linux Distros Ubuntu or Fedora 24 (I use for all INTEL HW testings ONLY Fedora 14 and up (latest F24), since I am very very familiar with Fedora). With putty package, I (at least, not the last) am very familiar with it. I would advise to check both reference (E3825) and custom (E3845) boards with Linux OSes, to see if everything is OK with serial. If yes, HW is All Cool. Then something else is the problem. … [View More] Peter (Stuge) has also a good idea. You should do the both. But at first, my approach, to save scope measurements (if?). Zoran On Wed, Jul 13, 2016 at 7:49 PM, Mayuri Tendulkar < mayuri.tendulkar(a)aricent.com> wrote: > Hi Zoran > > > > Thanks for ur suggestions. > > > > When I mentioned I got brkthru means- I was able to bringup coreboot with > seabios and Ubuntu linux up on my customized board with E3845. Display > comes up fine. > > > > But serial is still having some issue and keeps giving out some garbage, > not sure what is the problem. > > > > Tiano core payload is still not working, so currently managing with > seabios, but that’s next on the list to debug. Any advice on this? Anybody > has tried this? > > > > > > ‘If you did make it with normal AMI/PHOENIX BIOS, you should try to > install Fedora 24 on the top of it, and install PuTTY terminal (# dnf > install putty). Please, try to receive something on serial over USB (most > likely ttyUSB0 device when you insert the serial to USB gadget), settings: > 115200, 8, 1, no parity, no flow control. BYT in general, especially BYT-I, > has (as I recall) all good with serial ports, which is not always the case > with some other families. > > > > This should work.’ > > > > n This you are saying after loading OS, I shd check if serial works or > not right. I can check that. But main point is if I need to debug more on > coreboot to optimize/tune anything more for my board, I don’t have serial > up. > > n Display comes up and directly shows payload is loaded, so not able to > get whats happening before that. > > > > > > Regards > > Mayuri > > > > *From:* Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com] > *Sent:* 13 July 2016 10:43 > *To:* Naveed Ghori <naveed.ghori(a)dti.com.au> > *Cc:* Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com>; coreboot < > coreboot(a)coreboot.org> > *Subject:* Re: [coreboot] Help on setting clock speed in coreboot > > > > > We got some brkthru today. Though serial still shows garbage, *we got > bios up and then OS also*. > > > USB, display came up, but serial still no luck. > > > > I assumed in my answer that your reference INTEL Valley Island board with > E3825 works with serial port. > > > > Did not get the point. Did you get Coreboot running on custom E3845, then > after Tiano Core as payload, or you just made it work with normal BIOS > (with Intel BIOS Vendors - IBVs helping you) for your custom board? > > > > If you did make it with normal AMI/PHOENIX BIOS, you should try to install > Fedora 24 on the top of it, and install PuTTY terminal (# dnf install > putty). Please, try to receive something on serial over USB (most likely > ttyUSB0 device when you insert the serial to USB gadget), settings: 115200, > 8, 1, no parity, no flow control. BYT in general, especially BYT-I, has (as > I recall) all good with serial ports, which is not always the case with > some other families. > > > > This should work. > > > > I have for you few suggestions: try to swap your E3825 (Dual Core) SoC > with E3845 (Quad Core) SoC (exact one you are using on your custom board) > on your reference board (on Valley Island), and to install/program > appropriate INTEL/AMI BIOS which supports E3845 Reference Valley Island. > These two should be pin-to-pin compatible. Maybe even old BIOS will work... > If you are lucky (so before BIOS reprogramming you should try this)! Then > if E3845 by any chance works, to try again serial tests. > > > > Also you can take another path and swap another (new) E3845 with currenly > used E3845 on your custom board. Maybe your SoC's Serial I/Os on the > board are damaged... Could also happen. > > > > You can also try to place E3825 from Reference Valley Island to your > custom board and try to see if it'll pass BIOS?! If happens, try to test > serial and see what happens them? > > > > Please, do not forget the following: the boards equipped with BYT-i E3845 > Stepping D0, and with E3845 Stepping B3 are DUAL Channel memory SoCs. E3825 > Si D0 is SINGLE channel one. I know it (probably) does not have too much to > do with your problem (just keep this info in mind). This can also influence > your PCB design, since you have different PCBs... Could be also remote > source of the problem?! > > > > My two ad-hoc cent to this problem. ;-) > > > > Best Regards, > > Zoran > > > > On Wed, Jul 13, 2016 at 3:36 AM, Naveed Ghori <naveed.ghori(a)dti.com.au> > wrote: > > Great to hear! Serial does give out some useful information too so it will > be useful. > > Maybe try a different board if you have multiples. > > > > *From:* Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] > *Sent:* Wednesday, 13 July 2016 8:21 AM > *To:* Naveed Ghori; coreboot > *Subject:* Re: Help on setting clock speed in coreboot > > > > Hi > > > > We got some brkthru today. Though serial still shows garbage, we got bios > up and then OS also. USB, display came up, but serial still no luck. > > > > We will continue debugging. Thanks for all support. > > > > We are using serial to USB, we tried putty as well as minicom. > > > > Regards > > Mayuri > > > > *From:* Naveed Ghori [mailto:naveed.ghori@dti.com.au > <naveed.ghori(a)dti.com.au>] > *Sent:* 12 July 2016 17:12 > > > *To:* Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com>; coreboot < > coreboot(a)coreboot.org> > *Subject:* Re: Help on setting clock speed in coreboot > > > > The only thing I can think of is to use an oscilloscope to see if the > signal is clear. > > No changes were made to the USB as it just comes up to as a COM Port and I > connect using putty at the required baud rate. > > Are you using a Serial to USB or a real RS232 serial port? On Windows > there are setting for each serial port (where you can set its baud rate > etc, but I think these are for default connection and do not affect most > terminal software that connect using a particular baud rate. > > > > *From:* Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com > <mayuri.tendulkar(a)aricent.com>] > *Sent:* Wednesday, 13 July 2016 2:18 AM > *To:* Naveed Ghori; coreboot > *Subject:* Re: Help on setting clock speed in coreboot > > > > Hi > > > > Minnowboard also uses the same pin BD14 (GPIO_S0_SC[57]) as TX and 61 as > RX and baud rate 115200. > > > > We have not enabled post codes, but only enabled serial port console o/p. > > > > It works fine on Minnowboard, but not on this. > > > > So not getting any clue. > > > > Regards > > Mayuri > > > > *From:* Naveed Ghori [mailto:naveed.ghori@dti.com.au > <naveed.ghori(a)dti.com.au>] > *Sent:* 11 July 2016 20:03 > *To:* Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com>; coreboot < > coreboot(a)coreboot.org> > *Subject:* Re: Help on setting clock speed in coreboot > > > > First thing is to get serial output as there will probably be other > hurdles before the display works. > > I used coreboot bayleybay as the basis and it had the port mentioned (pin > BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. > > Minnowboard may be different. > > Also, I had to setup the full 8MB of flash using the FITC tool but this > is probably not your issue since you probably have serial output already. > > All I can think of is baud rate setting under console in “make menuconfig”. > > > > Also the output may be setup to output POST codes only in which case to a > text terminal it will like only junk is coming out. Make sure console debug > level is set to DEBUG or SPEW to get a lot more debug initially. > > Also Enable “Serial Port Console output” > > > > > > *From:* Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com > <mayuri.tendulkar(a)aricent.com>] > *Sent:* Tuesday, 12 July 2016 10:53 AM > *To:* Naveed Ghori > *Subject:* Re: Help on setting clock speed in coreboot > > > > We didn’t change anything. Our base is valley island. As it was not having > serial, we took tht part same as Minnowboard (PCU UART) > > > > Tried different rates but doesn’t work. > > > > We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. > > > > Somehow its stuck somewhere as we don’t see USB and display also not > coming, but nt able to get exact data due to serial prints. > > > > *From:* Naveed Ghori [mailto:naveed.ghori@dti.com.au > <naveed.ghori(a)dti.com.au>] > *Sent:* 11 July 2016 19:48 > *To:* Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com> > *Subject:* Re: Help on setting clock speed in coreboot > > > > Did you change anything? Is your base Bayley Bay? The default setting for > it are 115200 with the output pin as per below. > > Check the console settings in the menuconfig. If you are getting junk then > I assume it is already enabled but maybe just the baud is modified by > mistake. > > > > *From:* Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com > <mayuri.tendulkar(a)aricent.com>] > *Sent:* Tuesday, 12 July 2016 10:45 AM > *To:* Naveed Ghori > *Subject:* Re: Help on setting clock speed in coreboot > > > > But what settings to be added in coreboot config? > > > > *From:* Naveed Ghori [mailto:naveed.ghori@dti.com.au > <naveed.ghori(a)dti.com.au>] > *Sent:* 11 July 2016 18:42 > *To:* Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com>; coreboot < > coreboot(a)coreboot.org> > *Subject:* Re: Help on setting clock speed in coreboot > > > > We take the pins direct off the E3845 (only really need the tx (pin BD14 > (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB > serial port converter. > > > > *From:* Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com > <mayuri.tendulkar(a)aricent.com>] > *Sent:* Tuesday, 12 July 2016 9:37 AM > *To:* Naveed Ghori; coreboot > *Subject:* Re: Help on setting clock speed in coreboot > > > > Thanks. We tried 115200, but it didn’t work. We checked TTL levels and > tried to match, but no luck. > > > > Are you using PCU UART (same as minnowboard) or anything different? > > > > *From:* Naveed Ghori [mailto:naveed.ghori@dti.com.au > <naveed.ghori(a)dti.com.au>] > *Sent:* 11 July 2016 18:17 > *To:* Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com>; coreboot < > coreboot(a)coreboot.org> > *Subject:* Re: Help on setting clock speed in coreboot > > > > Hi, > > Garbage usually means baud rate. Did you try 115200baud? > > If you are still getting garbage I would recommend seeing it on the scope > and making sure voltage levels are fine. The output by default would be TTL > level and may need to be converted. > > I have used some TTL (1.8V if I remember correctly (TTL-232RG) to convert > the signal so I could read the output. > > > > Cheers, > > Naveed > > > > *From:* coreboot [mailto:coreboot-bounces@coreboot.org > <coreboot-bounces(a)coreboot.org>] *On Behalf Of *Mayuri Tendulkar > *Sent:* Tuesday, 12 July 2016 8:27 AM > *To:* coreboot > *Subject:* [coreboot] Help on setting clock speed in coreboot > > > > Hi Team > > > > I have a customized board based on Intel valley island design. Reference > design uses Intel Baytrail processor E3825, while my design is using E3845. > > > > I am customizing coreboot for this E3845, but getting just garbage on > coreboot, so not able to debug where it is stuck. > > > > When I add memory test as secondary payload, I cd see some operations > happening on console but not able to decode it. > > > > Tried with all possible baud rates, but no success. USB and display also > not enumerating. > > > > Can you please give some clue? Is it due to different core speed for > E3835(1.33GHZ) vs E3845(1.91GHz). > > > > Where is the option to change this in coreboot? > > > > Appreciate your support. > > > > Regards > > Mayuri > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot > > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > [View Less]

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Re: [coreboot] Help on setting clock speed in coreboot
by Mayuri Tendulkar 13 Jul '16

13 Jul '16

Hi Zoran Thanks for ur suggestions. When I mentioned I got brkthru means- I was able to bringup coreboot with seabios and Ubuntu linux up on my customized board with E3845. Display comes up fine. But serial is still having some issue and keeps giving out some garbage, not sure what is the problem. Tiano core payload is still not working, so currently managing with seabios, but that’s next on the list to debug. Any advice on this? Anybody has tried this? ‘If you did make it with normal AMI/… [View More]PHOENIX BIOS, you should try to install Fedora 24 on the top of it, and install PuTTY terminal (# dnf install putty). Please, try to receive something on serial over USB (most likely ttyUSB0 device when you insert the serial to USB gadget), settings: 115200, 8, 1, no parity, no flow control. BYT in general, especially BYT-I, has (as I recall) all good with serial ports, which is not always the case with some other families. This should work.’ n This you are saying after loading OS, I shd check if serial works or not right. I can check that. But main point is if I need to debug more on coreboot to optimize/tune anything more for my board, I don’t have serial up. n Display comes up and directly shows payload is loaded, so not able to get whats happening before that. Regards Mayuri From: Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com] Sent: 13 July 2016 10:43 To: Naveed Ghori <naveed.ghori(a)dti.com.au> Cc: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com>; coreboot <coreboot(a)coreboot.org> Subject: Re: [coreboot] Help on setting clock speed in coreboot > We got some brkthru today. Though serial still shows garbage, we got bios up and then OS also. > USB, display came up, but serial still no luck. I assumed in my answer that your reference INTEL Valley Island board with E3825 works with serial port. Did not get the point. Did you get Coreboot running on custom E3845, then after Tiano Core as payload, or you just made it work with normal BIOS (with Intel BIOS Vendors - IBVs helping you) for your custom board? If you did make it with normal AMI/PHOENIX BIOS, you should try to install Fedora 24 on the top of it, and install PuTTY terminal (# dnf install putty). Please, try to receive something on serial over USB (most likely ttyUSB0 device when you insert the serial to USB gadget), settings: 115200, 8, 1, no parity, no flow control. BYT in general, especially BYT-I, has (as I recall) all good with serial ports, which is not always the case with some other families. This should work. I have for you few suggestions: try to swap your E3825 (Dual Core) SoC with E3845 (Quad Core) SoC (exact one you are using on your custom board) on your reference board (on Valley Island), and to install/program appropriate INTEL/AMI BIOS which supports E3845 Reference Valley Island. These two should be pin-to-pin compatible. Maybe even old BIOS will work... If you are lucky (so before BIOS reprogramming you should try this)! Then if E3845 by any chance works, to try again serial tests. Also you can take another path and swap another (new) E3845 with currenly used E3845 on your custom board. Maybe your SoC's Serial I/Os on the board are damaged... Could also happen. You can also try to place E3825 from Reference Valley Island to your custom board and try to see if it'll pass BIOS?! If happens, try to test serial and see what happens them? Please, do not forget the following: the boards equipped with BYT-i E3845 Stepping D0, and with E3845 Stepping B3 are DUAL Channel memory SoCs. E3825 Si D0 is SINGLE channel one. I know it (probably) does not have too much to do with your problem (just keep this info in mind). This can also influence your PCB design, since you have different PCBs... Could be also remote source of the problem?! My two ad-hoc cent to this problem. ;-) Best Regards, Zoran On Wed, Jul 13, 2016 at 3:36 AM, Naveed Ghori <naveed.ghori(a)dti.com.au<mailto:naveed.ghori@dti.com.au>> wrote: Great to hear! Serial does give out some useful information too so it will be useful. Maybe try a different board if you have multiples. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com<mailto:mayuri.tendulkar@aricent.com>] Sent: Wednesday, 13 July 2016 8:21 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi We got some brkthru today. Though serial still shows garbage, we got bios up and then OS also. USB, display came up, but serial still no luck. We will continue debugging. Thanks for all support. We are using serial to USB, we tried putty as well as minicom. Regards Mayuri From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 12 July 2016 17:12 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot The only thing I can think of is to use an oscilloscope to see if the signal is clear. No changes were made to the USB as it just comes up to as a COM Port and I connect using putty at the required baud rate. Are you using a Serial to USB or a real RS232 serial port? On Windows there are setting for each serial port (where you can set its baud rate etc, but I think these are for default connection and do not affect most terminal software that connect using a particular baud rate. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Wednesday, 13 July 2016 2:18 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi Minnowboard also uses the same pin BD14 (GPIO_S0_SC[57]) as TX and 61 as RX and baud rate 115200. We have not enabled post codes, but only enabled serial port console o/p. It works fine on Minnowboard, but not on this. So not getting any clue. Regards Mayuri From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 20:03 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had to setup the full 8MB of flash using the FITC tool but this is probably not your issue since you probably have serial output already. All I can think of is baud rate setting under console in “make menuconfig”. Also the output may be setup to output POST codes only in which case to a text terminal it will like only junk is coming out. Make sure console debug level is set to DEBUG or SPEW to get a lot more debug initially. Also Enable “Serial Port Console output” From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:53 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot We didn’t change anything. Our base is valley island. As it was not having serial, we took tht part same as Minnowboard (PCU UART) Tried different rates but doesn’t work. We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. Somehow its stuck somewhere as we don’t see USB and display also not coming, but nt able to get exact data due to serial prints. From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 19:48 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>> Subject: Re: Help on setting clock speed in coreboot Did you change anything? Is your base Bayley Bay? The default setting for it are 115200 with the output pin as per below. Check the console settings in the menuconfig. If you are getting junk then I assume it is already enabled but maybe just the baud is modified by mistake. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:45 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot But what settings to be added in coreboot config? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:42 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot We take the pins direct off the E3845 (only really need the tx (pin BD14 (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB serial port converter. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 9:37 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Thanks. We tried 115200, but it didn’t work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot Hi, Garbage usually means baud rate. Did you try 115200baud? If you are still getting garbage I would recommend seeing it on the scope and making sure voltage levels are fine. The output by default would be TTL level and may need to be converted. I have used some TTL (1.8V if I remember correctly (TTL-232RG) to convert the signal so I could read the output. Cheers, Naveed From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Mayuri Tendulkar Sent: Tuesday, 12 July 2016 8:27 AM To: coreboot Subject: [coreboot] Help on setting clock speed in coreboot Hi Team I have a customized board based on Intel valley island design. Reference design uses Intel Baytrail processor E3825, while my design is using E3845. I am customizing coreboot for this E3845, but getting just garbage on coreboot, so not able to debug where it is stuck. When I add memory test as secondary payload, I cd see some operations happening on console but not able to decode it. Tried with all possible baud rates, but no success. USB and display also not enumerating. Can you please give some clue? Is it due to different core speed for E3835(1.33GHZ) vs E3845(1.91GHz). Where is the option to change this in coreboot? Appreciate your support. Regards Mayuri "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." -- coreboot mailing list: coreboot(a)coreboot.org<mailto:coreboot@coreboot.org> https://www.coreboot.org/mailman/listinfo/coreboot "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." [View Less]

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Re: [coreboot] Help on setting clock speed in coreboot
by Peter Stuge 13 Jul '16

13 Jul '16

Mayuri Tendulkar wrote: > serial is still having some issue and keeps giving out some garbage, > not sure what is the problem. Please share an oscilloscope capture image of the very first character sent out on the TX pin after power-on. //Peter

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Re: [coreboot] Help on setting clock speed in coreboot
by Peter Stuge 13 Jul '16

13 Jul '16

Zoran Stojsavljevic wrote: > (with Intel BIOS Vendors - IBVs helping you) As far as I know the 'I' in IBV stands for Independent. Regarding the original problem that the serial port output is garbled, please share a scope capture of the UART TX pin from power-on to get further help with analyzing the signal. //Peter

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Re: [coreboot] Help on setting clock speed in coreboot
by Naveed Ghori 13 Jul '16

13 Jul '16

Great to hear! Serial does give out some useful information too so it will be useful. Maybe try a different board if you have multiples. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Wednesday, 13 July 2016 8:21 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi We got some brkthru today. Though serial still shows garbage, we got bios up and then OS also. USB, display came up, but serial still no luck. We will continue debugging. … [View More]Thanks for all support. We are using serial to USB, we tried putty as well as minicom. Regards Mayuri From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 12 July 2016 17:12 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot The only thing I can think of is to use an oscilloscope to see if the signal is clear. No changes were made to the USB as it just comes up to as a COM Port and I connect using putty at the required baud rate. Are you using a Serial to USB or a real RS232 serial port? On Windows there are setting for each serial port (where you can set its baud rate etc, but I think these are for default connection and do not affect most terminal software that connect using a particular baud rate. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Wednesday, 13 July 2016 2:18 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi Minnowboard also uses the same pin BD14 (GPIO_S0_SC[57]) as TX and 61 as RX and baud rate 115200. We have not enabled post codes, but only enabled serial port console o/p. It works fine on Minnowboard, but not on this. So not getting any clue. Regards Mayuri From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 20:03 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had to setup the full 8MB of flash using the FITC tool but this is probably not your issue since you probably have serial output already. All I can think of is baud rate setting under console in "make menuconfig". Also the output may be setup to output POST codes only in which case to a text terminal it will like only junk is coming out. Make sure console debug level is set to DEBUG or SPEW to get a lot more debug initially. Also Enable "Serial Port Console output" From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:53 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot We didn't change anything. Our base is valley island. As it was not having serial, we took tht part same as Minnowboard (PCU UART) Tried different rates but doesn't work. We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. Somehow its stuck somewhere as we don't see USB and display also not coming, but nt able to get exact data due to serial prints. From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 19:48 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>> Subject: Re: Help on setting clock speed in coreboot Did you change anything? Is your base Bayley Bay? The default setting for it are 115200 with the output pin as per below. Check the console settings in the menuconfig. If you are getting junk then I assume it is already enabled but maybe just the baud is modified by mistake. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:45 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot But what settings to be added in coreboot config? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:42 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot We take the pins direct off the E3845 (only really need the tx (pin BD14 (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB serial port converter. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 9:37 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Thanks. We tried 115200, but it didn't work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot Hi, Garbage usually means baud rate. Did you try 115200baud? If you are still getting garbage I would recommend seeing it on the scope and making sure voltage levels are fine. The output by default would be TTL level and may need to be converted. I have used some TTL (1.8V if I remember correctly (TTL-232RG) to convert the signal so I could read the output. Cheers, Naveed From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Mayuri Tendulkar Sent: Tuesday, 12 July 2016 8:27 AM To: coreboot Subject: [coreboot] Help on setting clock speed in coreboot Hi Team I have a customized board based on Intel valley island design. Reference design uses Intel Baytrail processor E3825, while my design is using E3845. I am customizing coreboot for this E3845, but getting just garbage on coreboot, so not able to debug where it is stuck. When I add memory test as secondary payload, I cd see some operations happening on console but not able to decode it. Tried with all possible baud rates, but no success. USB and display also not enumerating. Can you please give some clue? Is it due to different core speed for E3835(1.33GHZ) vs E3845(1.91GHz). Where is the option to change this in coreboot? Appreciate your support. Regards Mayuri "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." [View Less]

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ARM Trusted Firmware build issue
by Paul Kocialkowski 13 Jul '16

13 Jul '16

We spent some time yesterday evening on IRC investigating why the ARM Trusted Firmware (ATF) doesn't build with the current toolchain from coreboot's crossgcc. It turns out it is a complex issue on the assembler's side. I have opened a bug upstream about it, with all the details we could find: https://sourceware.org/bugzilla/show_bug.cgi?id=20364 This regression was introduced with binutils 2.26. To get the build going in the short term, we could either downgrade binutils back to 2.25 (if it … [View More]

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Re: [coreboot] Help on setting clock speed in coreboot
by Naveed Ghori 13 Jul '16

13 Jul '16

The only thing I can think of is to use an oscilloscope to see if the signal is clear. No changes were made to the USB as it just comes up to as a COM Port and I connect using putty at the required baud rate. Are you using a Serial to USB or a real RS232 serial port? On Windows there are setting for each serial port (where you can set its baud rate etc, but I think these are for default connection and do not affect most terminal software that connect using a particular baud rate. From: Mayuri … [View More]Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Wednesday, 13 July 2016 2:18 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi Minnowboard also uses the same pin BD14 (GPIO_S0_SC[57]) as TX and 61 as RX and baud rate 115200. We have not enabled post codes, but only enabled serial port console o/p. It works fine on Minnowboard, but not on this. So not getting any clue. Regards Mayuri From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 20:03 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had to setup the full 8MB of flash using the FITC tool but this is probably not your issue since you probably have serial output already. All I can think of is baud rate setting under console in "make menuconfig". Also the output may be setup to output POST codes only in which case to a text terminal it will like only junk is coming out. Make sure console debug level is set to DEBUG or SPEW to get a lot more debug initially. Also Enable "Serial Port Console output" From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:53 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot We didn't change anything. Our base is valley island. As it was not having serial, we took tht part same as Minnowboard (PCU UART) Tried different rates but doesn't work. We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. Somehow its stuck somewhere as we don't see USB and display also not coming, but nt able to get exact data due to serial prints. From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 19:48 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>> Subject: Re: Help on setting clock speed in coreboot Did you change anything? Is your base Bayley Bay? The default setting for it are 115200 with the output pin as per below. Check the console settings in the menuconfig. If you are getting junk then I assume it is already enabled but maybe just the baud is modified by mistake. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:45 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot But what settings to be added in coreboot config? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:42 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot We take the pins direct off the E3845 (only really need the tx (pin BD14 (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB serial port converter. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 9:37 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Thanks. We tried 115200, but it didn't work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot Hi, Garbage usually means baud rate. Did you try 115200baud? If you are still getting garbage I would recommend seeing it on the scope and making sure voltage levels are fine. The output by default would be TTL level and may need to be converted. I have used some TTL (1.8V if I remember correctly (TTL-232RG) to convert the signal so I could read the output. Cheers, Naveed From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Mayuri Tendulkar Sent: Tuesday, 12 July 2016 8:27 AM To: coreboot Subject: [coreboot] Help on setting clock speed in coreboot Hi Team I have a customized board based on Intel valley island design. Reference design uses Intel Baytrail processor E3825, while my design is using E3845. I am customizing coreboot for this E3845, but getting just garbage on coreboot, so not able to debug where it is stuck. When I add memory test as secondary payload, I cd see some operations happening on console but not able to decode it. Tried with all possible baud rates, but no success. USB and display also not enumerating. Can you please give some clue? Is it due to different core speed for E3835(1.33GHZ) vs E3845(1.91GHz). Where is the option to change this in coreboot? Appreciate your support. Regards Mayuri "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." [View Less]

1 0

Re: [coreboot] Help on setting clock speed in coreboot
by Naveed Ghori 12 Jul '16

12 Jul '16

First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had to setup the full 8MB of flash using the FITC tool but this is probably not your issue since you probably have serial output already. All I can think of is baud rate setting under console in "make … [View More]menuconfig". Also the output may be setup to output POST codes only in which case to a text terminal it will like only junk is coming out. Make sure console debug level is set to DEBUG or SPEW to get a lot more debug initially. Also Enable "Serial Port Console output" From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:53 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot We didn't change anything. Our base is valley island. As it was not having serial, we took tht part same as Minnowboard (PCU UART) Tried different rates but doesn't work. We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. Somehow its stuck somewhere as we don't see USB and display also not coming, but nt able to get exact data due to serial prints. From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 19:48 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>> Subject: Re: Help on setting clock speed in coreboot Did you change anything? Is your base Bayley Bay? The default setting for it are 115200 with the output pin as per below. Check the console settings in the menuconfig. If you are getting junk then I assume it is already enabled but maybe just the baud is modified by mistake. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 10:45 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot But what settings to be added in coreboot config? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:42 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot We take the pins direct off the E3845 (only really need the tx (pin BD14 (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB serial port converter. From: Mayuri Tendulkar [mailto:mayuri.tendulkar@aricent.com] Sent: Tuesday, 12 July 2016 9:37 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Thanks. We tried 115200, but it didn't work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.ghori@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>>; coreboot <coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot Hi, Garbage usually means baud rate. Did you try 115200baud? If you are still getting garbage I would recommend seeing it on the scope and making sure voltage levels are fine. The output by default would be TTL level and may need to be converted. I have used some TTL (1.8V if I remember correctly (TTL-232RG) to convert the signal so I could read the output. Cheers, Naveed From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Mayuri Tendulkar Sent: Tuesday, 12 July 2016 8:27 AM To: coreboot Subject: [coreboot] Help on setting clock speed in coreboot Hi Team I have a customized board based on Intel valley island design. Reference design uses Intel Baytrail processor E3825, while my design is using E3845. I am customizing coreboot for this E3845, but getting just garbage on coreboot, so not able to debug where it is stuck. When I add memory test as secondary payload, I cd see some operations happening on console but not able to decode it. Tried with all possible baud rates, but no success. USB and display also not enumerating. Can you please give some clue? Is it due to different core speed for E3835(1.33GHZ) vs E3845(1.91GHz). Where is the option to change this in coreboot? Appreciate your support. Regards Mayuri "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." [View Less]

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RFC: implementing a way to force external EDID use.
by Arthur Heymans 12 Jul '16

12 Jul '16

Hi In Linux it is possible to load an EDID externally. Coreboot can currently not do this. Do you think it is worth implementing this feature? An EDID file is a bit to big (128 bytes) to fit in nvram so it would have to go in cbfs. Where in the code do you think this setting should be implemented: NB code, read_edid in drivers, decode_edid in lib, somewhere else? How do you think this feature should be turned on: nvram option or build option? Thank you for your comments -- Arthur Heymans

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coreboot July 2016