coreboot January 2016

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by WordPress 20 Jan '16

20 Jan '16

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Re: [coreboot] romcc issue with loop execution?
by Alex G. 20 Jan '16

20 Jan '16

On 01/20/2016 09:23 AM, Andrey Korolyov wrote: > Hello, > > during initial bootstrap of an ancient Geode board I found that the > romstage hangs at After observing several issues with romcc, when the same code worked as expected with GCC, our team decided to discontinue use of ROMCC. It was determined it would be less effort to write all of the bootblock in assembly than to work around romcc issues. romcc was issuing nonsensical instructions, like "mov eax, eax". You could try to disassemble your bootblock with "objdump -d" and see if the resulting code makes sense. > src/northbridge/amd/lx/raminit.c: > > 750 volatile unsigned long *ptr; >>>> > 751 for (i = 0; i < 5; i++) { > 752 ptr = (void *)i; > 753 *ptr = (unsigned long)i; Well, the first iteration of the loop causes a NULL pointer dereference. If that's not enough, you also have three unaligned 32-bit writes. I'm not sure how well romcc understands undefined behavior, but disassemby is your best friend here. Make sure the resulting asm does what you think the C code tells it to do. Alex

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romcc issue with loop execution?
by Andrey Korolyov 20 Jan '16

20 Jan '16

Hello, during initial bootstrap of an ancient Geode board I found that the romstage hangs at src/northbridge/amd/lx/raminit.c: 750 volatile unsigned long *ptr; >>> 751 for (i = 0; i < 5; i++) { 752 ptr = (void *)i; 753 *ptr = (unsigned long)i; 754 } just after declaration of a pointer. I have a little clue of the romcc internals yet, neither I do possess romulator for fast and painless rom re-executions in place. Checked against current master and against 4.1 tag with same results. I`ve seen *somehow* simular report at [0] but there is no hints about which code was executed at a time and what was a final fix (if any), also I do think that this issue was probably UART-related. 0. http://www.coreboot.org/pipermail/coreboot/2008-May/034605.html

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Re: [coreboot] Building on 64 Bit Linux
by ron minnich 19 Jan '16

19 Jan '16

Just build the coreboot crossbuild chain and you should be fine. I've been building on 64-bit linux for years. On Tue, Jan 19, 2016 at 7:39 AM Gregg Levine <gregg.drwho8(a)gmail.com> wrote: > Hello! > Not yet. I'm still bringing over my backups from an earlier period of > time so I can't rightfully say. I can state that Slackware travels > with a fully up to date tool chain outside of anything specific so > there shouldn't be a problem in building the whole thing to start > with. > ----- > Gregg C Levine gregg.drwho8(a)gmail.com > "This signature fought the Time Wars, time and again." > > > On Tue, Jan 19, 2016 at 10:21 AM, Martin Roth <gaumless(a)gmail.com> wrote: > > Hi Gregg, > > I'm not sure what tools come installed by default on Slackware, so I > > can't really say. I'd be happy to try to work out any issues you see > > and get any special requirements documented. Is there some issue that > > you're seeing that makes you ask? > > > > Martin > > > > On Tue, Jan 19, 2016 at 7:19 AM, Gregg Levine <gregg.drwho8(a)gmail.com> > wrote: > >> Hello! > >> Is there anything special I need to know when it comes to building > >> releases on a 64 Bit Linux system? This is Slackware64-14.1 as it > >> happens. > >> ----- > >> Gregg C Levine gregg.drwho8(a)gmail.com > >> "This signature fought the Time Wars, time and again." > >> > >> -- > >> coreboot mailing list: coreboot(a)coreboot.org > >> http://www.coreboot.org/mailman/listinfo/coreboot > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

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X86 considered harmfull vs Coreboot
by NTPT 19 Jan '16

19 Jan '16

Hi all I found a paper Intel x86 considered harmful Joanna Rutkowska http://blog.invisiblethings.org/papers/2015/x86_harmful.pdf describing things that are belived are security shorcommings of x86 architecture. Many of them are bios / mb and boot process related. I am just awandering how coreboot as a "opensource bios" deal with this... Any information ? I would glad to hear Yours opinion . Thanx

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Re: [coreboot] MbMax coreboot image
by Ben Gardner 19 Jan '16

19 Jan '16

I should have looked at this URL first: http://wiki.minnowboard.org/Coreboot That covers everything you need to know. Your error is that your path to the IFD/TXE is wrong, so "dd" can't find it. Take a look at src/soc/intel/fsp_baytrail/Makefile.inc in the version of coreboot mentioned in the wiki. That version of coreboot made assumptions about the IFD and ME filename. The config item was called CONFIG_ME_PATH and it should be the folder that contains the files "descriptor.bin" and "txe.bin". Ben On Tue, Jan 19, 2016 at 1:08 PM, Ben Gardner <gardner.ben(a)gmail.com> wrote: > Hi Supriti, > > You are supposed to extract the TXE/ME image (and the IFD) from an > existing MbMax BIOS. > Those files may have been customized by the vendor for your board. > > Use flashrom to extract the existing BIOS and then use idftool to > extract the sections. > You may also be able to find a MbMax BIOS on line (I haven't looked.) > > Example: > ... on the MbMax board ... > $ flashrom -r bios.rom -p internal > ... copy bios.rom to your coreboot build machine ... > $ ifdtool bios.rom -x > File bios.rom is 16777216 bytes > Found Flash Descriptor signature at 0x00000010 > Flash Region 0 (Flash Descriptor): 00000000 - 00000fff > Flash Region 1 (BIOS): 00200000 - 00ffffff > Flash Region 2 (Intel ME): 00001000 - 001fffff > Flash Region 3 (GbE): 00000000 - 00000fff > Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused) > > That creates two files that are then fed into the coreboot build process: > flashregion_0_flashdescriptor.bin <- IFD file > flashregion_2_intel_me.bin <- ME file > > Update these two items in your config: > CONFIG_IFD_BIN_PATH="../path/to/flashregion_0_flashdescriptor.bin" > CONFIG_ME_BIN_PATH="../path/to/flashregion_2_intel_me.bin" > > With the right access at Intel you can get tools that can customize > those files, but unless you are designing a custom board, you > shouldn't need to do that. > > Ben > > On Tue, Jan 19, 2016 at 5:28 AM, Supriti Singh <supritisingh08(a)gmail.com> wrote: >> I am trying to build coreboot image for MbMax along with TXE module >> >> I selected under menuconfig --> chipset --> Add Inteldescriptor.bin file --> >> Add Intel ME/TXE firmware. >> >> When I do a make, I get the error: >> DD Adding Intel Firmware Descriptor >> make: *** [add_intel_firmware] Error 1 >> >> I did a git clone http://review.coreboot.org/p/blobs.git to get the blobs. >> But it does not contain anything for MbMax. >> >> I followed the instructions here http://wiki.minnowboard.org/Coreboot. It >> explains to use ifdtool to extract TXE firmware image. Is this the image >> that should be present in the blobs/mainboard/intel/? If not how to get the >> it? >> >> Thanks, >> Supriti >> >> >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] MbMax coreboot image
by Ben Gardner 19 Jan '16

19 Jan '16

Hi Supriti, You are supposed to extract the TXE/ME image (and the IFD) from an existing MbMax BIOS. Those files may have been customized by the vendor for your board. Use flashrom to extract the existing BIOS and then use idftool to extract the sections. You may also be able to find a MbMax BIOS on line (I haven't looked.) Example: ... on the MbMax board ... $ flashrom -r bios.rom -p internal ... copy bios.rom to your coreboot build machine ... $ ifdtool bios.rom -x File bios.rom is 16777216 bytes Found Flash Descriptor signature at 0x00000010 Flash Region 0 (Flash Descriptor): 00000000 - 00000fff Flash Region 1 (BIOS): 00200000 - 00ffffff Flash Region 2 (Intel ME): 00001000 - 001fffff Flash Region 3 (GbE): 00000000 - 00000fff Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused) That creates two files that are then fed into the coreboot build process: flashregion_0_flashdescriptor.bin <- IFD file flashregion_2_intel_me.bin <- ME file Update these two items in your config: CONFIG_IFD_BIN_PATH="../path/to/flashregion_0_flashdescriptor.bin" CONFIG_ME_BIN_PATH="../path/to/flashregion_2_intel_me.bin" With the right access at Intel you can get tools that can customize those files, but unless you are designing a custom board, you shouldn't need to do that. Ben On Tue, Jan 19, 2016 at 5:28 AM, Supriti Singh <supritisingh08(a)gmail.com> wrote: > I am trying to build coreboot image for MbMax along with TXE module > > I selected under menuconfig --> chipset --> Add Inteldescriptor.bin file --> > Add Intel ME/TXE firmware. > > When I do a make, I get the error: > DD Adding Intel Firmware Descriptor > make: *** [add_intel_firmware] Error 1 > > I did a git clone http://review.coreboot.org/p/blobs.git to get the blobs. > But it does not contain anything for MbMax. > > I followed the instructions here http://wiki.minnowboard.org/Coreboot. It > explains to use ifdtool to extract TXE firmware image. Is this the image > that should be present in the blobs/mainboard/intel/? If not how to get the > it? > > Thanks, > Supriti > > > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] cbfstool: CBFS alignment broken due to FMAP
by Ben Gardner 19 Jan '16

19 Jan '16

Thanks. That also worked. For the benefit of others: I copied build/fmap.fmd to src/mainboard/$VENDOR/$BOARD/ and then updated the FMDFILE config item to point to it. CONFIG_FMDFILE="src/mainboard/$VENDOR/$BOARD/fmap.fmd" It may help to look at util/cbfstool/default-x86.fmd to see the names of the values. Ben On Tue, Jan 19, 2016 at 4:55 AM, Zeh, Werner <werner.zeh(a)siemens.com> wrote: > Hi Ben. > > Alternatively you can use your own flash map setup file where you modify > FMAP_FMAP_SIZE to your needs and point Kconfig to your modified fmd-file. > > In this way you can leave Makefile.inc unchanged and get your image right as well. > > Werner > > -----Ursprüngliche Nachricht----- > Von: coreboot [mailto:coreboot-bounces@coreboot.org] Im Auftrag von Ben Gardner > Gesendet: Montag, 18. Januar 2016 21:54 > An: Patrick Georgi > Cc: coreboot > Betreff: Re: [coreboot] cbfstool: CBFS alignment broken due to FMAP > > Thank you. That worked. > > On Mon, Jan 18, 2016 at 2:46 PM, Patrick Georgi <pgeorgi(a)google.com> wrote: >> 2016-01-18 21:34 GMT+01:00 Ben Gardner <gardner.ben(a)gmail.com>: >>> Is there a work-around for this? For example, is there an option to >>> pad the FMAP out to 4 KB? >> The workaround is indeed to increase the FMAP region's size to 4K. >> >> To do this, edit $(top)/Makefile.inc, line 708 (since you're on x86, >> otherwise line 723): >> FMAP_FMAP_SIZE := 0x100 >> to >> FMAP_FMAP_SIZE := 0x1000 >> >> >> Patrick >> -- >> Google Germany GmbH, ABC-Str. 19, 20354 Hamburg Registergericht und >> -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: Hamburg >> Geschäftsführer: Matthew Scott Sucherman, Paul Terence Manicle > > -- > coreboot mailing list: coreboot(a)coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Building on 64 Bit Linux
by Gregg Levine 19 Jan '16

19 Jan '16

Hello! Not yet. I'm still bringing over my backups from an earlier period of time so I can't rightfully say. I can state that Slackware travels with a fully up to date tool chain outside of anything specific so there shouldn't be a problem in building the whole thing to start with. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again." On Tue, Jan 19, 2016 at 10:21 AM, Martin Roth <gaumless(a)gmail.com> wrote: > Hi Gregg, > I'm not sure what tools come installed by default on Slackware, so I > can't really say. I'd be happy to try to work out any issues you see > and get any special requirements documented. Is there some issue that > you're seeing that makes you ask? > > Martin > > On Tue, Jan 19, 2016 at 7:19 AM, Gregg Levine <gregg.drwho8(a)gmail.com> wrote: >> Hello! >> Is there anything special I need to know when it comes to building >> releases on a 64 Bit Linux system? This is Slackware64-14.1 as it >> happens. >> ----- >> Gregg C Levine gregg.drwho8(a)gmail.com >> "This signature fought the Time Wars, time and again." >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] Building on 64 Bit Linux
by Martin Roth 19 Jan '16

19 Jan '16

Hi Gregg, I'm not sure what tools come installed by default on Slackware, so I can't really say. I'd be happy to try to work out any issues you see and get any special requirements documented. Is there some issue that you're seeing that makes you ask? Martin On Tue, Jan 19, 2016 at 7:19 AM, Gregg Levine <gregg.drwho8(a)gmail.com> wrote: > Hello! > Is there anything special I need to know when it comes to building > releases on a 64 Bit Linux system? This is Slackware64-14.1 as it > happens. > ----- > Gregg C Levine gregg.drwho8(a)gmail.com > "This signature fought the Time Wars, time and again." > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

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coreboot January 2016